
Smartcard MCU with 32-bit ARM Cortex™ M3 CPU
and 256 Kbytes high density Flash memory
Features
Hardware features
■ ARM Cortex™-M3 32-bit RISC core
■ 8 Kbytes of user RAM
■ 256 Kbytes of user Flash memory with OTP
area:
– 10-year data retention
– 100,000 Erase/Write cycles per page
– Page granularity of 128 Bytes
– Block granularity: 1 Kbyte
– 128 Bytes of OTP for User
– Page Erase time 3 ms
– Block Erase 1 Kbyte in 15 ms
– Programming performance up to 10µs/byte
– Flash Erase / Write Protection software
programmable on 64 Kbyte sectors
■ Asynchronous Receiver Transmitter
supporting ISO 7816-3 T=0 and T=1 protocols
■ Two 16-bit timers with interrupt capability
■ 1.8V, 3V and 5V supply voltage ranges
■ External clock frequency from 1 up to 7.5 MHz
■ High performance provided by:
– CPU clock frequency up to 20 MHz
– External clock multiplier (2x, 3x, and 4x)
■ Current consumption compatible with GSM
and ETSI specifications
■ Power-saving Standby state
■ Contact assignment compatible ISO 7816-2
■ ESD protection greater than 4 kV (HBM)
ST32F256
Data brief
Security features
■ Monitoring of environmental parameters
■ Protection against faults
■ ISO 3309 CRC calculation block
■ True random number generator
■ Unique serial number on each die
■ Hardware DES accelerator
Software features
■ Flash Loader
■ Flash drivers
Development environment
Software development and firmware generation
are supported by a comprehensive set of
development tools dedicated to software design
and validation:
■ C Compiler
■ Simulator
■ Emulator
Applications
ST32F256 major applications include:
September 2009 Doc ID 15925 Rev 1 1/4
For further information contact your local STMicroelectronics sales office.
■ Mobile communications (GSM, 3G and CDMA)
■ Java Card™ applications
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1

Description ST32F256
Ai12577
Internal Bus
I/O
IART
GND
Cortex™
M3
CPU
Core
2 x
16-bit
Timers
CRC
Module
CLK
Clock
Gene-
rator
Module
Vcc
Tr u e
Random
Number
Gene-
rator
RAM
ST ROM
Security
Adminis-
trator
RESET
Flash
memory
DES
Accelerator
ST ROM
Firewall
1 Description
1.1 Hardware description
The ST32F256 is a serial access microcontroller designed for secure mobile applications
that incorporates the most recent generation of ARM processors for embedded systems. Its
Cortex™-M3 32-bit RISC core operating at a 20-MHz frequency brings great performance
and excellent code compacity to the application thanks to the Thumb®-2 instruction set.
The high-speed embedded Flash 256 Kbyte memory introduces more flexibility to the
system.
The ST32F256 also offers a serial communication interface fully compatible with the ISO
7816-3 standard (T=0, T=1) for smartcard applications.
Two general purpose 16-bit timers are available.
A hardware Data Encryption Standard (DES) accelerator can be used to the user to
optimize the application performance. A software library is provided for Advanced
Encryption Standard (AES) implementation.
The ST32F family operates in the –25 to +85°C temperature range and 1.8V, 3V and 5V
supply voltage ranges. A comprehensive range of power-saving modes enables the design
of efficient low-power applications.
Figure 1. ST32F256 block diagram
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ST32F256 Revision history
1.2 Software development tools description
Dedicated Cortex™-M3 software development tools are provided by ARM and Keil. This
includes the Instruction Set Simulator (ISS) and C compiler. The documentation is available
on the ARM and Keil web sites.
Moreover, STMicroelectronics provides:
● A time-accurate hardare emulator controlled by the Keil debugger and the ST
development environment.
● A complete product simulator based on Keil’s ISS simulator for the Cortex™-M3 CPU.
● A ROMed Flash Loader with very high-speed software downloading capabilities.
2 Revision history
Table 1. Document revision history
Date Revision Changes
18-Sep-2009 1 Initial release.
Doc ID 15925 Rev 1 3/4

ST32F256
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