ST ST21Y036 User Manual
Features
ST21Y036 major applications include:
■ Mobile communications (GSM and CDMA)
■ Java applications
ST21Y036
Smartcard MCU
with 36 Kbytes high density EEPROM
Data Brief
Hardware features
■ Enhanced 8/16-bit CPU core with 16 Mbytes
linear addressable memory
■ 128 Kbytes User ROM
■ 4 Kbytes User RAM
■ 36 Kbytes User EEPROM including 64 Bytes
User OTP area:
– Highly reliable CMOS EEPROM submicron
technology
– 10-year data retention
– 500,000 Erase/Write cycles endurance
typical at 25°C
– 1 to 64 Bytes Erase or Program in 1.5 ms
■ Asynchronous Receiver Transmitter
supporting ISO 7816-3 T=0 and T=1 protocols
■ Two 8-bit timers with interrupt capability
■ 1.8V, 3V and 5V supply voltage ranges
■ External clock frequency from 1 up to 7.5 MHz
■ High performance provided by:
– CPU clock frequency up to 22 MHz
– External clock multiplier (2x, 3x, and 4x)
■ Current consumption complies with GSM
specifications
■ Power-saving Standby state
■ Contact assignment compatible ISO 7816-2
■ ESD protection greater than 4 kV (HBM)
259a.ai
Micromodule Wafer
Security features
■ Monitoring of environmental parameters
■ Protection against faults
■ ISO 3309 CRC calculation block
■ Cryptographic performances
(1)
:
– Triple DES (with keys loaded): 9.3 µs
– Single DES (with keys loaded): 3.1 µs
■ True Random Number Generator
■ Unique serial number on each die
■ Hardware DES accelerator
Development environment
Software development and firmware generation
are supported by a comprehensive set of
development tools dedicated to software design
and validation:
■ C Compiler
■ Simulator
■ Emulator
1. Typical values at 22 MHz
November 2007 Rev 3 1/4
For further information contact your local STMicroelectronics sales office.
www.st.com
1
Description ST21Y036
1 Description
The ST21Y036 product is a serial access microcontroller specially designed for costeffective secure mobile applications.
It is based on an enhanced STMicroelectronics 8/16-bit CPU core offering 16 MBytes
linear addressing space.
It is manufactured using an advanced highly reliable ST CMOS EEPROM technology.
The device includes a DES accelerator.
A serial interface fully compatible with the ISO 7816-3 standard (T = 0 and T = 1) for
Smartcard applications is available.
A CRC calculation block is also available and is directly accessible by the User.
The product architecture is optimized for low power consumption applications. A flexible
clock generator module provides increased performance for specific current requirements.
Figure 1. ST21Y036 block diagram
RAM
CRC
Module
Clock
Gene-
rator
Module
CLK
EEPROM
2 x
8-bit
timers
User ROM
Internal Bus
Security
Adminis-
trator
RESET
ST ROM
(Boot software)
ST ROM Firewall
True
Random
Number
Gene-
rator
Vcc
8/16-bit
CPU
Core
GND
DES
Accelerator
IART
I/O
579
2/4
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