Features
TSSOP28
■ Single-chip Trusted Platform Module (TPM)
■ Embedded TPM 1.2 firmware
■ 33-MHz Low Pin Count (LPC) interface V1.1
■ Compliant with TCG PC client specific TPM
Implementation Specification (TIS) V1.2
■ Dedicated LPC communication buffer for TPM
commands handling optimization
■ Compliant with Trusted Computing Group
■ Architecture based on ST19N Secure
■ EEPROM-based NVM including 128 Bytes of
■ 5 firmware-controlled general-purpose I/O
(a)
(TCG)
V1.2 specifications
Smartcard IC platform:
– 1088-bit Modular Arithmetic Processor
providing full support for Asymmetric
operations
– Hardware-based SHA-1 accelerator
enabling BIOS related fast hash operations
– AIS-31 compliant True Random Number
Generator
– Active security sensors
OTP area for production configuration
– Highly reliable CMOS EEPROM submicron
technology
– 10 year data retention
– 500,000 Erase/Write cycle endurance
– Storage for up to 9 keys depending on
firmware patch size
(GPIO) pins
ST19NP18-TPM
Trusted Platform Module (TPM)
Data brief
■ Available in recommended TCG PC client 1.2
compatible TSSOP28 ECOPACK® package
(RoHS compliant)
■ 3.3V ± 10% power supply voltage
■ 0 to 70
■ ST19NP18 intrinsic cryptographic
performances
– RSA 1024-bit signature with CRT
– RSA 1024-bit signature without CRT
– RSA 1024-bit verification (e=’$10001’): 3.7 ms
– RSA 1024-bit key generation: 1.6 s
– RSA 2048-bit signature with CRT
– RSA 2048-bit verification (e=’$10001’): 60 ms
o
C operating temperature range
(b)
(c)
:57 ms
(c)
: 382 ms
(c)
: 189 ms
b. Typical values, independent of external clock
frequency and supply voltage.
a. TCG website: www.trustedcomputinggroup.org
September 2011 Doc ID 022252 Rev 1 1/8
For further information contact your local STMicroelectronics sales office.
c. CRT: Chinese Remainder Theorem.
www.st.com
8
Description ST19NP18-TPM
Internal Bus
Memory Access Firewall
Gnd
8-bit
CPU
3 x
8-bit
Timers
CRC
module
LCLK
Clock
Generator
module
ST ROM, MAP and EDES Firewall
RAM User ROM
ST ROM and
Crypto
Libraries
EDES
Accelerator
MAP
1088 bits
537
Vps
TRNG A
&
TRNG B
Security
Admin.
LRESET
EEPROM
SHA
Module
5 x
GPIO
Interface
Gpi02
RAM 2K
LPC
Interface
LFrame
LPCPD
Lad3
Lad2
Lad1
Lad0
PP SERIRQ
Gpi03
Gpi04
Gpi05
Gpi01
I/O
1 Description
The ST19NP18-TPM is a cost-effective Trusted Platform Module (TPM) solution. The
ST19NP18-TPM is designed to provide PC platforms with enhanced security and integrity
mechanisms as defined by Trusted Computing Group standards. The product provides full
support of TCG v1.2 specifications.
The ST19NP18-TPM is based on the ST19NP18 silicon product.
The ST19NP18 is driven from the Smartcard IC ST19N platform. It is manufactured using
the advanced highly reliable STMicroelectronics CMOS EEPROM technology.
The ST19NP18 has an 8-bit CPU architecture and includes the following on-chip memories:
User ROM, User RAM and EEPROM with state of the art security features. ROM, RAM and
EEPROM memories can be configured into partitions with customized access rules.
The ST19NP18 also includes a Modular Arithmetic Processor (MAP). The 1088-bit
architecture of this cryptographic engine allows processing of modular multiplication,
squaring and additional calculations up to 2176 bit operands.
The Modular Arithmetic Processor (MAP) is designed to speed up cryptographic
calculations using Public Key Algorithms.
The Secure Hash Accelerator allows fast SHA-1 computation especially well suited for BIOS
hash operations during early boot stages.
The ST19NP18 is specially designed in line with TCG PC Client Specific TPM
Implementation Specification (TIS) referring to Intel®’s LPC Specification revision 1.1.
Figure 1. ST19NP18-TPM block diagram
2/8 Doc ID 022252 Rev 1
ST19NP18-TPM Description
625
Application 1 Application 3Application 2
MS CAPI
CSP
PKCS# 11
CSP
Cryptographic
Infrastructure Interface
TSP Interface
OS User
Mode
TSS Service Provider - TSP
TSS Core Services - TCS
TPM Device Driver Library - TDDL
TCS Interface
TDDL Interface
TPM Device Driver - TDD
OS Kernel
Mode
ST19NP18 + Embedded TPM Firmware
Hardware
& Firmware
Memory
Absent
Driver - MAD
Subsystems included in the ST19NP18-TPM solution
TPM BIOS
Drivers
Memory
Present
Driver - MPD
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ST19NP18-TPM is provided in a TSSOP28 package compliant with ECOPACK® Level 3
specifications which guarantees RoHS compliancy and that products are both lead- and
halogen-free.
ECOPACK® is an ST trademark.
Embedded TCG TPM firmware
The ST19NP18 includes TPM firmware compatible with TPM V1.2 specifications.
This firmware supports features such as Cryptographic Key Generation, Integrity Metrics
and Secure Storage, as well as Locality, Delegation and Transport Session functions.
This TCG TPM firmware uses an optimized and flexible software architecture that easily
integrates Trusted Computing Framework enhancements or dedicated functions.
The ST19NP18-TPM provides OEMs with a TPM solution for their PC platforms.
Figure 2. ST19NP18-TPM overview
Doc ID 022252 Rev 1 3/8
ST19NP18 pins and signals ST19NP18-TPM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GPIO1
GPIO2
VNC
GND1
NC
GPIO3
PP
NC
GPIO4
VPS
GND2
NC
NC
NC
LPCPD
SERIRQ
LAD0
NC
VPS
LAD1
LFRAME
LCLK
LAD2
NC
GPIO5
LRESET
GND3
LAD3
TSSOP28
2 ST19NP18 pins and signals
Table 1. Pinout description
Note: The CLKRUN signal is not listed on Pin 15 as it is not supported on ST TPM devices.
However, ST TPM devices natively support Clock Stop mode (LCLK stopped). See GPIO5
pin description in table below.
Table 2. Signal descriptions
Signal Type Description
LAD[3:0] Bidir LPC Multiplexed Command, Address and Data (see LPC Spec)
LPCPD
LCLK Input
LFRAME
LRESET
SERIRQ Bidir Serialized IRQ is used by TPM to handle interrupt support (see LPC Spec)
GPIO5/
CLKRUN
PP Input
GPIO4 Bidir General-purpose IOs fully configurable by Firmware
GPIO3 Bidir General-purpose IOs fully configurable by Firmware
4/8 Doc ID 022252 Rev 1
Input
LPC Power Down internal pull-up implemented. Can be left unconnected. Must not be
tied to GND.
LPC Clock Same 33-MHz clock as PCI clock on the host. Same clock phase with typical
PCI skew. (see LPC Spec)
Input LPC Frame indicates start of a new cycle, termination of broken cycle (see LPC Spec)
Input Reset used to re-initialize the device (same as PCI Reset on the host)
General-purpose IO, fully configurable by Firmware.
Bidir
CLKRUN
mastering in a system that can stop the PCI bus (generally in mobile systems).
Physical Presence, active high, internal pull-down. Used to indicate Physical Presence
to the TPM
same as PCI CLKRUN. Only needed by peripherals that need DMA or bus
ST19NP18-TPM ST19NP18 pins and signals
Table 2. Signal descriptions (continued)
Signal Type Description
GPIO2 Bidir General-purpose IOs fully configurable by Firmware
GPIO1 Bidir General-purpose IOs fully configurable by Firmware
VPS Input
3.3V Power supply. VPS has to be connected to 3.3v DC power rail supplied by the
motherboard
GND Input
VNC -
Zero volts ground reference. GND has to be connected to the main motherboard
ground.
Vendor-controlled No Connect: internal pull-up implemented. Can be left unconnected.
Must not be tied to GND.
Doc ID 022252 Rev 1 5/8
Package description ST19NP18-TPM
3 Package description
28-pin Thin Shrink Small Outline Package (TSSOP) with 4.4-mm body width
Dimensional features of the TSSOP28 package: Body width 4.4 mm. Pitch 0.65 mm.
Unless otherwise specified, general tolerance is ± 0.1 mm.
Figure 3. Mechanical drawing
Table 3. Package dimensions
Symbol
Min. Typ. Max. Min. Typ. Max.
A1.200.047
A1 0.05 0.15 0.002 0.006
A2 0.80 1.00 1.05 0.031 0.040 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.008
D 9.60 9.70 9.80 0.378 0.382 0.386
E 6.20 6.40 6.60 0.244 0.252 0.260
E1 4.30 4.40 4.50 0.170 0.173 0.177
e 0.65 0.026
L 0.45 0.60 0.75 0.018 0.024 0.0230
L1 1.00 0.040
k0° 8°0° 8°
aaa 0.10 0.004
6/8 Doc ID 022252 Rev 1
millimeters inches
ST19NP18-TPM Revision history
4 Revision history
Table 4. Document revision history
Date Revision Changes
21-Sep-2011 1 Initial release.
Doc ID 022252 Rev 1 7/8
ST19NP18-TPM
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