ST PSQ001V1 User Manual

STEVAL-PSQ001V1

Power management for CPU, FPGA and memory based on the PM6680A

Features

■Input: 5 - 36 VDC, surge protection

■Output voltages:

–Output1 (Vcore) selectable from: 0.9, 1.0, 1.2, 1.5, 1.8 or 2.5 V, 4 A continuously (6 A peak), tolerance: 3%

–Output2 (Vi/o) selectable from: 1.0, 1.2, 1.5, 1.8, 2.5 V or 3.3 V, 2 A continuously

(3 A peak), tolerance: 3%

–Output3 Vsys: 3.3 V 0.4 A (0.8 A peak), tolerance: 4%

–Output3 Vaux: 2.5 V, 0.4 A, tolerance: 2%

■Analog 5: 5 V, 0.8 A, tolerance: 4%

■Analog 3.3 V: 3.3 V, 0.15 A, tolerance: 2%

Description

The main purpose of this evaluation board is to show basic principles used for design of the power supply and to give users a working prototype for testing and daily use. The trend in recent years in the supply of MCUs, CPUs, memories, FPGAs etc. is to reduce the supply voltage, increase supply current and provide various voltage levels for different devices in one platform. A typical example of this is the FPGA. FPGAs contain core parts which operate with low level voltage, interface parts placed between the core and the output, system parts, etc. It is important to note that each family of parts has a slightly different voltage level and the trend is toward decreasing voltage for each new family. The lowest operating voltage currently is 1 V, and this can be expected to drop to 0.9 V or 0.8 V in the near future. The situation is similar with other parts of digital solutions. Typically, the main CPU, memory, and interfaces require different supply voltage levels. Low operating voltage also bring another challenge - transient. Digital devices are typically sensitive to voltage level. If voltage drops below or crosses over established limits, the device is

Data Brief

STEVAL-PSQ001V1

reset. This limit is typically ± 3 or 5 %. On the other hand, digital device consumption can change very fast (approx. several amps in several hundred nanoseconds). The power supply must be capable of reacting very quickly with a minimum of over/under voltage, especially in cases where very low voltage output is required. There is additional stress placed on power supplies in digital applications for industrial use. The industrial standard bus is 24 V, but this voltage fluctuates and the maximum required input voltage level can be up to 36 V. Additional surge protection is also mandatory for power supply input in industrial applications. The purpose of this evaluation board is to address all of required parameters outlined above. This means satisfying industrial input requirements (operating voltage of up to 36 V) and generating several output voltages for middle power applications (up to several amps). The main output voltage level can be set easily.

February 2008	Rev 1	1/4
For further information contact your local STMicroelectronics sales office.		www.st.com

2/4

1

Circuit

J16

Vin

.1 Figure

Circuit

schematic

2

U1 L5970AD

L1 15uH/1.5A

V5V

S18

8

1

Vcc

OUT

U2 LK112_33

5V/400mA

4

R2

R3

1

COMP

5

5

4

S19

FB

120k

20k

IN

D3

R1

SYNC

VREF

GND

OUT

3.3V/150mA

4k7

INH

C5

1

SHDN

C1

C2

C6

Input

2

6

7

3

47uF/10V

3

C7

Schematic

schematic

47uF/50V

4.7u/35V

C4

D4

R4

100n

BYPASS

36V

C3

D4A

10u/6V

220p

22n

STPS2L40

STPS1L40M

5k6

2

GND

L5 10uH/1A

S20

R41

Vin

GND Analog

D1

S1

SMAJ33A

Vanalog EN

5k6

U3

L5970AD

L2 15uH/1.5A

S21

8

1

Vsys

Vcc

OUT

U4

Vsys 3.3V/400mA

4

R6

R7

COMP

5

8

KF25_SOIC8

1

Vaux

S22

FB

18k

240k

VIN

D5

R5

SYNC

VREF

7 GND

5

VOUT

Vaux 2.5V/400mA

3 INH

INH

C8

10k

C11

GND

GND GND

GND

C9

100u/6V

C12

C13

36V

4.7u/35V

220p

C10

2

6

D6

D6A

R8

100n

2 3 6 7

10u/4V

22n

STPS2L40

STPS1L40M

10k

S23

R42

GND

S2

Vin

5k6

Vsys EN

VLDO

U6

VLDO

Vin

STM6719TEWB6F

6

Vcc1

1

J14

Reset

R9

Vaux

4

RST

R209

3R3

FB2R

5

Vcc2

110k

RSTIN

Vss

C14

C15

C17

3

MR

470n

100n

C32

C33

4.7u/10V

C16

2

3.3u/35V

1n

1n

BAW56/SOT

J15

Reset GND

R37 47R

C31

D7

Vin

D11

Vin

PGOOD2

220n

Q1

C19

R25

31

18

19

R26

STPS2L40

10R

10R

6

C18

100n

9

23

C25

C23

C24

5

BOOT2

Vcc

LDO5

Vin

BOOT1

100n

Vcore 0.9 - 2.5V/4A

10u/50V

Q2

10u/50V

10u/50V

S24

4

10

22

STS7NF60L

Vio 0.9 - 2.5V/2A

3

HGATE2

HGATE1

S25

S34

R23 10R

11

21

R21 10R

S26

S35

8

PHASE2

PHASE1

S27

L3

4.7uH/3A

S17

S16

S15

S14

S13

13

15

3.3uH/6A L4

S8

S9

S10

S11

S12

C35

7

LGATE2

LGATE1

2.5V

1.8V

1.5V

1.2V

1V

R24 10R

R10 1k2

20 R191k2

R22 10R

C34

0.9V

1V

1.2V

1.5V

1.8V

D8

2

12

CSENSE2

CSENSE1

D9

C29

STPS2L40

1

R27 10R

330u/6.3V

R40 10R

17

14

Q3

R105 R106

100n

V5SW

PGND

STPS2L40

100n

R206 R205

R1011k

R102 2k

R103 3k

R1043k

R39 10R

STS4DNF60

8

29

STS7NF60L

R38 10R

C28

R204 3k

R203 3k

R2022k

R2011k

7k5

110k

OUT2

OUT1

110k

7k5

330u/6.3V

C22

2

30

COMP2

COMP1

330u/6.3V

R11

C20

R28 10k

R32 10k

C26

R20

PGOOD2

27

26

300R

560pF

PGOOD2

PGOOD1

VLDO

560pF

300R

VLDO

FB1

7

28

FB2

FB2

FB1

-STEVAL

1

5

SHDN

SGND1

16

R207

C21

VREF

SGND2

C27

2k2

R107

R108

100pF

VLDO

EN2

EN1

SKIP

FSEL

NC

R33

Vin

U5

100pF

FB2R

9k1

820k

0R

PM6680

4

32

24

3

6

R208

R29

VLDO

S31

R30 0R

6k8

S5

S6

S7

S30

S32

100k

3

S29

S33

S3

2

S28

GND io

CH2 EN/SUS

Vcore GND

1

D10

S4

SKIP mode

C36

R31 10k

3

PSQ001V1

100pF

R34 10k

CH1 EN/SUS

4V7

R35

R36

C30

51k

51k

100n