ST PM8800A User Manual

PM8800A

Integrated IEEE 802.3af compliant PoE-PD interface and PWM controller with support of external source

Features

■IEEE 802.3af compliant PD interface

■Works with power supplied from Ethernet LAN cables or from local auxiliary sources

■Integrated 100 V, 0.5 Ω, 800 mA hot-swap MOSFET

■Integrated signature resistor

■Programmable in-rush current limit

■Programmable classification current

■Programmable DC current limit up to 800 mA

■High voltage start-up bias regulator

■Thermal shutdown protection

■Current mode pulse width modulator

■Programmable oscillator frequency

■Programmable soft-start

■Power good indication

■80 % maximum duty cycle with internal slope compensation

■Supports both isolated and non-isolated Applications.

■HTSSOP16 package

Applications

■VoIP phones, WLAN access points

■Security cameras

■PoE powered device appliances

■High power (>12.95 W) powered devices

Table 1. Device summary

HTSSOP16

Description

The PM8800A integrates a standard power over Ethernet (PoE) interface and a current mode PWM controller to simplify the design of the power supply sections of all powered devices.

The PoE interface incorporates all the functions required by the IEEE 802.3af including detection, classification, under-voltage lockout (UVLO) and in-rush current limitation.

PM8800A specifically targets PD with extended power requirement with respect to the limit imposed by the 802.3af standard, embedding a hot-swap MOSFET capable of sustaining twice the current of the 802.3af standard with a programmable DC current limit.

The integrated switching regulator has been designed to work with power either form the Ethernet cable connection or from an external power source such as AC adapter.

The DC-DC section of the PM8800A features a programmable oscillator frequency, soft-start, slope compensation and embeds a voltage output error amplifier allowing use in both isolated and non isolated configuration.

Order codes	Package	Packing
PM8800A	HTSSOP16	Tube
PM8800ATR	HTSSOP16	Tape and reel

February 2008

Rev 2

1/35

www.st.com

Contents	PM8800A

Contents

1	Typical application circuit and block diagram . . . . . . . . . . . . . . . . . . .		. 4
	1.1	Application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	4
	1.2	Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	5
2	Pins description and connection diagrams . . . . . . . . . . . . . . . . . . . . . .		6
	2.1	Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
	2.2	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	8
3	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		9
	3.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	3.2	Electrical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
4	Device description and operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		14
5	PD interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		16
	5.1	Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
	5.2	Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	17
	5.3	Under voltage lock-out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
	5.4	In rush current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
	5.5	Continuos current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
	5.6	HV regulator startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
	5.7	Power good indication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22
6	PWM section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		23
	6.1	Error amplifier and loop compensation . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
	6.2	Oscillator and sync capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	6.3	Soft start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25
	6.4	PWM comparator / slope compensation . . . . . . . . . . . . . . . . . . . . . . . . .	26
	6.5	Current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	26
	6.6	Leading edge blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	28
	6.7	Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	28

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PM8800A		Contents
7	Auxiliary sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 29
8	Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 32
	8.1 HTSSOP16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 33
9	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 34

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Typical application circuit and block diagram	PM8800A

1 Typical application circuit and block diagram

1.1Application circuits

Figure 1. Simplified application schematic for powered devicesing PM8800A in isolated configuration

VIN			AUXII
			VCC
AUXI_IRL			GD
			COMP
		A nPGD
DCCL	PM8800		CS
RCLASS
			VFB
			SS
			RT
VSS			GND
			AGND

Figure 2. Simplified application schematic for powered device using PM8800A in non-isolated buck configuration

Vin		Vout+
VIN		Vout-
AUXII		GD
nPGD		VFB
AUXI_IRL
DCCL	PM8800A COMPVCC
RCLASS		CS
		SS
		RT
VSS		GND
		AGND

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PM8800A	Typical application circuit and block diagram

1.2Block diagram

Figure 3.

Block diagram of the PoE PD interface

AUXII

VIN

24.5k

Detection

High Voltage

threshold

-

VCC

+

Zener Ref

AUX

Startup

Regulator

Manager

Classification

threshold

-

+

1.25V

+

1.4V

DC/DC

EN

-

controller

Interface

UVLO

-

threshold

30uA

RCLASS

Manager

1.4V

+

0.6V

DC/DC

3.3V

Enable

1.4V

Power

nPGD

+

Good Ctrl

-

-

Logic

+

2V

2V

+

VCC

AUXI_IRL

-

3.3V

Thermal

UVLO VCC

threshold

1.5V

Protection

+

-

+

1.4V

-

Gate

1.5V

DCCL

Controller

+

-

VSS

GND

Current and

Voltage

Sense

Figure 4. Block diagram of the current mode PWM controller

		RT				VCC
AGND			Oscillator
		3.3V
		2.5kOhm	Slope
COMP			Compensation	S SET	Q	Driver	GD
			45 A	R CLR	Q
			45µA
1.25V	+ E/A	R	+	PWM
FB	-		PWM	logic
		R	-
				DC/DC Enable

	3.3V					y	Cycle by cycle over current
	10µA						protection
						y 80% duty cycle limit
	charge	+
							(PM8800A)
SS
		-			+	y	Leading Edge Blanking
				0.5V	OC1	y	Hiccup on OC2 or
					-		persistent OC1
	A		SS	discharge
	10µA			charge
	discharge		LOGIC		+
		fast		0.7V	OC2
		discharge			-
				CS

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Pins description and connection diagrams	PM8800A

2 Pins description and connection diagrams

Figure 5. Pins connection (top view)

RT	1	16	AGND
SS	2	15	VFB
AUXII	3	14	COMP
VIN	4	13	CS
RCLASS	5	12	nPGD
AUXI_IRL	6	11	VCC
DCCL	7	10	GD
VSS	8	9	GND

HTSSOP-16

2.1Pin descriptions

	Table 2.		Pin description
	Pin#	Name		Function
				Oscillator timing resistor pin and synchronization input.
	1		RT	An external resistor connected from RT to AGND sets the oscillator frequency.
				This pin will also accept narrow ac-coupled synchronization pulses from an
				external clock.
				Soft-start input.
	2		SS	An external capacitor connected from SS and AGND and an internal
				10 µA current source set the soft-start ramp rate. this pin is also used to set the
				hiccup timer in case of overcurrent conditions. See Section 6 for detail.
				Auxiliary source enable pin.
	3		AUXII	Use this pin to power up the DC/DC section only from the external source. The
				auxiliary source can prevail over the PoE source depending on the value of the
				resistor between this pin and the external source. See Section 7 for detail.
				System high potential input.
	4		VIN	The diode “OR” of PoE line and auxiliary sources connected to the PD, it is the
				most positive input potential.
	5	RCLASS		Classification resistor pin.
				Connect a classification programming resistor between this pin and VSS.
				In-rush current limit and auxiliary source enable pin.
				Pulling up this pin to the auxiliary source will change the internal UVLO settings
	6	AUXI_IRL		and allow PD to be powered with voltage lower than nominal PoE voltages. In this
				condition inrush current limit is set to default values. See Section 7 for details.
				A resistance between this pin and VSS will set the level of inrush current limit.

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PM8800A				Pins description and connection diagrams
	Table 2.		Pin description (continued)
	Pin#	Name		Function
				DC current limit.
	7	DCCL		A resistor between DCCL and VSS will set the current limit for the interface
				section of the PM8800A. It can be set to exceed the IEEE802.3af current limit.
				Leave the pin open for standard IEEE 802.3af applications.
	8		VSS	System low potential input.
	9		GND	System return for the PWM converter.
				It is the drain of the internal hot-swap power MOSFET.
	10		GD	Output of the PWM controller. External power MOSFET gate driver output.
				Output of the internal high voltage regulator.
	11		VCC	When the auxiliary transformer winding (if used) raises the voltage on this pin
				above the regulation set point, the internal regulator will be switched off, reducing
				the controller power dissipation.
				Power good, active low signal.
	12	nPGD		A high to low transition indicates that the inrush current phase has been
				completed, the internal hot swap MOSFET is fully closed and the SMPS portion of
				the PM8800A is activated.
				Current sense input.
				Current sense input for current mode control and over-current protection. Current
	13		CS	limiting is obtained with a dedicated current sense comparator. If the CS pin
				voltage exceeds 0.5 V the GD pin switches low for cycle-by-cycle current limiting.
				Leading edge blanking is implemented to mask current spikes.
				The output of the error amplifier and input of the Pulse Width Modulator.
	14	COMP		COMP pull-up is provided by an internal 2.5 kΩ resistor which may be used to
				bias an opto-coupler transistor.
				Feedback signal.
	15		VFB	Inverting input of the internal error amplifier. The non-inverting input is internally
				connected to a 1.25 V reference.
				If not used must be grounded to AGND.
				Analog PWM supply return.
	16	AGND		GND for sensitive analog circuitry including the SMPS current limit circuitry. Must
				be connected to GND to improve noise immunity.
				Exposed pad.
			EP	Connect this to a board plane to improve heat dissipation; must be electrically
				connected to VSS

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Pins description and connection diagrams	PM8800A

2.2Thermal data

Table 3.	Thermal data
Symbol	Parameter	Value	Unit
R	Max thermal resistance junction to ambient (1)	50	°C/W
thJA
TMAX	Maximum junction temperature	150	°C
TSTG	Storage temperature range	-40 to 150	°C
TJ	Junction temperature range	-40 to 125	°C
TA	Operative temperature range	-40 to 85	°C

1. Package mounted on 4 layers 35 micron demoboard

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PM8800A	Electrical specifications

3 Electrical specifications

3.1Absolute maximum ratings

	Table 4.	Absolute maximum ratings
		Parameter	Value		Unit
	VIN, GND to VSS		-0.3 to 100		V
	AUXI_IRL to VSS		-0.3 to 100		V
	DCCL, RCLASS to VSS		-0.3 to 3.6		V
	AUXII to AGND		-0.3 to 100		V
	COMP, SS to AGND		-0.3 to 3.6		V
	VFB, RT, CS to AGND		-0.3 to 3.6		V
	VCC, GD to AGND		-0.3 to 15		V
	nPGD to AGND		-0.3 to 15		V
	GND to AGND		-0.3 to 0.3		V
Note:	Absolute maximum ratings are limits beyond which damage to the device may occur.

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Electrical specifications	PM8800A

3.2Electrical characteristic

Table 5. Electrical characteristics - interface section

(VIN = 48 V, VCC = open, TA = 25 °C unless otherwise specified).

Symbol	Parameter				Test conditions		Min	Typ	Max	Unit
Detection and classification
	Signature enable	VIN rising							1.5 (1)	V
	Signature resistance						23.5 (1)	24.5	25.5 (1)	kΩ
	Signature disable	VIN rising					10.5 (1)	11.5	12.5 (1)	V
	classification turn on
	Classification turn on							1.40		V
	hysteresis
	Classification turn-off	VIN rising					21.5 (1)	23	24.5 (1)	V
	RCLASS voltage during						1.37 (1)	1.4	1.43 (1)	V
	classification
	Supply current during	VIN inside classification range						1.8		mA
	classification
Bias current
IIN	VIN supply current	VIN = 48 V; VCC = 10 V						3		mA
Under Voltage Lock-Out
VUVLO_R	UVLO release	VIN rising					37	38.5	40 (1)	V
VUVLO_F	UVLO lock-out	VIN falling					30 (1)	31.5	33.5	V
	UVLO hysteresis							7.0		V
Hot swap MOSFET
R	MOSFET resistance							0.5	1 (1)	Ω
DSON
	Default in-rush	VIN > 30 V					120 (1)	140	160 (1)	mA
	current limit
	Default in-rush	15 V < V				< 30 V	220 (1)	250	280 (1)	mA
	current limit
				IN
	Default in-rush	1.5 V < VIN < 15 V					390 (1)	440	490 (1)	mA
	current limit
	Adjustable in-rush current	R	AUXI_IRL		= 82 kΩ		120 (1)	140	160 (1)	mA
	limit
	Default DC current limit						390 (1)	440	490 (1)	mA
	Adjustable DC	R	DCLL	= From 15.4 kΩ to 82 kΩ			-15 (1)	-	+15 (1)	%
	current limit precision

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PM8800A			Electrical specifications
Table 5.	Electrical characteristics - interface section (continued)
(VIN = 48 V, VCC = open, TA = 25 °C unless otherwise specified).
Symbol	Parameter	Test conditions	Min	Typ	Max	Unit
Power good indication
	Hot-swap VDS	VDS falling	1.45 (1)	1.60	1.75 (1)	V
	Hysteresis			1.45		V
	Hot-swap VGS required	Guaranteed by design		2		V
	for power good
	nPGD current source		25 (1)	30	35	µA
nPGD	nPGD pull down	nPGD low; I = -5 mA			0.5 (1)	V
	resistance
	nPGD threshold	nPGD rising	1.7 (1)	2	2.3 (1)	V
Auxiliary power
	AUXI_IRL UVLO release	VIN rising	15 (1)	16	17 (1)	V
AUX I	AUXI_IRL UVLO lock-out	VIN falling	11.5 (1)	12.5	13.5 (1)	V
	AUXI / IRL switch-over	VAUXI_IRL rising		2		V
	threshold
	Bias voltage	IAUXII = 0 to -250 µA	0.85	1.1	1.4	V
AUX II	Lower threshold current		20	35	50	µA
	Upper threshold current		80	100	120	µA

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