ST M74HC595 User Manual

WITH OUTPUT LATCHES (3 STATE)

■ HIGH SPEED:

f

= 59MHz (TYP.) at VCC=6V

MAX

■ LOW POWER DISSIPATION:

I

=4µA(MAX.) at TA=25°C

CC

■ HIGH NOISE IMMUNITY:

V

NIH=VNIL

■ SYMMETRICAL OUTPUT IMPEDANCE:

|I

|=IOL= 6mA (MIN.)FOR QA to QH

OH

|I

|=IOL= 4mA (MIN.) FOR QH’

OH

■ BALANCED PROPAGATION DELAYS:

t

≅ t

PLH

■ WIDE OPERATING VOLTAGE RANGE:

V

(OPR) = 2V to 6V

CC

■ PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 595

= 28% VCC(MIN.)

PHL

M74HC595

8 BIT SHIFT REGISTER

TSSOPDIP SOP

ORDER CODES

PACKAGE TUBE T & R

DIP M74HC595B1R

SOP M74HC595M1R M74HC595RM13TR

TSSOP M74HC595TTR

DESCRIPTION

The M74HC595 is an high speed CMOS 8-BIT SHIFT REGISTERS/OUTPUT LATCHES (3-STATE) fabricated with silicon gate C

2

MOS technology. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D -t y pe storage register. The storage register has 8 3-STATE outputs. Separate clocks a re provided for both t he shift register and the storage register.

PIN CONNECTION AND IEC LOGIC SYMBOLS

The shift register has a direct-overriding clear, serial input, and serial output (st andard) pins for cascading. Both the shift register and storage register use positive-edge t riggered clocks. If both clocks are c onnec ted together, the shift r egister state wi ll always be one clock pulse ahead of the storage register. All inputs a re equipped with protection circuits against static discharge and transient excess voltage.

1/16March 2004

M74HC595

INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION

PIN N° SYMBOL NAME AND FUNCTION

1, 2, 3, 4, 5,

6, 7, 15

9 QH’ Serial Data Outputs 10 SCLR 11 SCK Shift Register Clock Input 13 G 14 SI Serial Data Input 12 RCK Storage Register Clock

8 GND Ground (0V) 16 V

TRUTH TABLE

QA to QH Data Outputs

CC

Shift Register Clear Input

Output Enable Input

Input

Positive Supply Voltage

INPUTS

SI SCK SCLR

X X X X H QA THRU QH OUTPUTS DISABLE XXXXL QATHRUQHOUTPUTSENABLE X X L X X SHIFT REGISTER IS CLEARED

LHXX

HHXX

X H X X STATE OF S.R. IS NOT CHANGED XXX X X X X X STORAGE REGISTER STATE IS NOT CHANGED

X: Don’t Care

RCK G

FIRST STAGE OF S.R. BECOMES "L" OTHER

STAGES STORE THE DATA OF PREVIOUS

FIRST STAGE OF S.R. BECOMES "H" OTHER

STAGES STORE THE DATA OF PREVIOUS

S.R. DATA IS STORED INTO STORAGE

OUTPUTS

STAGE, RESPECTIVELY

REGISTER

LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays

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LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays

M74HC595

TIMING CHART

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M74HC595

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

I

OK

I

or I

CC

P

T

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) Power dissipation at 65°C. Derating from 65

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Value Unit

V

V V T

t

r,tf

Supply Voltage

CC

DC Input Voltage -0.5 to VCC+0.5

I

DC Output Voltage -0.5 to VCC+0.5

O

DC Input Diode Current

IK

DC Output Diode Current DC Output Current

O

DC VCCor Ground Current

GND

-0.5 to +7 V

± 20 mA ± 20 mA ± 35 mA ± 70 mA

Power Dissipation DIP 750(*) mW

D

SOP 500(*) mW TSSOP 450(*) mW

Storage Temperature

stg

Lead Temperature (10 sec)

L

-65 to +150 °C 300 °C

°Cto125°C: DIP Package -10mW/°C; SO Package -7mW/°C; TSSOP Package -6.1mW/°C.

Supply Voltage

CC

Input Voltage 0 to V

I

Output Voltage 0 to V

O

Operating Temperature

op

Input Rise and Fall Time VCC=2.0V

V

=4.5V

CC

=6.0V

V

CC

2to6 V

CC CC

-55 to 125 °C 0 to 1000 ns

0 to 500 ns 0 to 400 ns

V V

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DC SPECIFICATIONS

Symbol Parameter

V

High Level Input

IH

Voltage

V

Low Level Input

IL

Voltage

High Level Output

OH

Voltage (for QH’ outputs)

High Level Output

OH

Voltage (for QA to QH outputs)

Low Level Output

OL

Voltage (for QH’ outputs)

Low Level Output

OL

Voltage (for QA to QH outputs)

Input Leakage

I

Current

I

High Impedance

OZ

Output Leakage Current

Quiescent Supply

I

CC

Current

M74HC595

Test Condition Value

T

= 25°C

V

CC

(V)

A

Min. Typ. Max. Min. Max. Min. Max.

2.0 1.5 1.5 1.5

6.0 4.2 4.2 4.2

2.0 0.5 0.5 0.5

6.0 1.8 1.8 1.8 =-20 µA

2.0

4.5

6.0

4.5

6.0

2.0

4.5

6.0

4.5

6.0

2.0

4.5

6.0

4.5

6.0

2.0

4.5

6.0

4.5

6.0

V

6.0

I=VCC

V

VO=VCCor GND

V

I=VCC

I

O

=-20 µA

I

O

=-20 µA

I

O

=-4.0 mA

I

O

I

=-7.8 mA

O

=-20 µA

I

O

I

=-20 µA

O

=-20 µA

I

O

I

=-6.0 mA

O

=-7.8 mA

I

O

=20 µA

I

O

=20 µA

I

O

I

=20 µA

O

I

=4.0 mA

O

=7.8 mA

I

O

=20 µA

I

O

I

=20 µA

O

I

=20 µA

O

=6.0 mA

I

O

=7.8 mA

I

O

I=VIH

or GND

or V

or GND

1.9 2.0 1.9 1.9

4.4 4.5 4.4 4.4

5.9 6.0 5.9 5.9

4.18 4.31 4.13 4.10

5.68 5.8 5.63 5.60

1.9 2.0 1.9 1.9

4.4 4.5 4.4 4.4

5.9 6.0 5.9 5.9

4.18 4.31 4.13 4.10

5.68 5.8 5.63 5.60

0.0 0.1 0.1 0.1

0.17 0.26 0.33 0.40

0.18 0.26 0.33 0.40

0.0 0.1 0.1 0.1

0.17 0.26 0.33 0.40

0.18 0.26 0.33 0.40

IL

-40 to 85°C -55 to 125°C

± 0.1 ± 1 ± 1 µA

± 0.5 ± 5 ± 10 µA

44080µA

Unit

V4.5 3.15 3.15 3.15

V4.5 1.35 1.35 1.35

V

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