ST M74HC4518 User Manual

M74HC4518
DUAL DECADE COUNTER
HIGH SPEED :
f
= 60 MHz (TYP.) at VCC = 6V
MAX
LOW POWER DISSIPATION:
=4µA(MAX.) at TA=25°C
CC
HIGH NOISE IMMUNITY:
V
= V
NIH
SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 4mA (MIN)
OH
BALANCED PROPAGATION DELAYS:
t
t
PLH
WIDE OPERATING VOLTAGE RANGE:
(OPR) = 2V to 6V
V
CC
PIN AND FUNCTION COMPATIBLE WITH
= 28 % VCC (MIN.)
NIL
PHL
74 SERIES 4518
DESCRIPTION
The M74HC4518 is an h igh speed CMOS DUAL BINARY COUNTER fabricated with silicon gate
2
C
MOS technology. It consist of two identical internally synchronous 4-stage counters. The counter stages are D-TYPE flip-flops having interchangeable CLOCK and ENABLE inputs for incrementing on either the positive-going or negative-going transition. For single-unit operation the ENABLE input is maintained "high" and the counter advances on
TSSOPDIP SOP
ORDER CODES
PACKAGE TUBE T & R
DIP M74HC4518B1R
SOP M74HC4518M1R M74HC4518RM13TR
TSSOP M74HC4518TTR
each positive-going t ransition of the CLOCK. T he counters are cleared by high levels on their clear lines. The counter can be cascaded in the ripple mode by connecting Q4 to the enable input of the subsequent counter while the clock input of the latter is held permanently low. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/11July 2001
M74HC4518
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
1, 9
2, 10
3, 4, 5, 6 1Q0 to 1Q3 Data Outputs
7, 15
11, 12, 13,
14
8 GND Ground (0V)
16 Vcc Positive Supply Voltage
TRUTH TABLE
1CLOCK,
2CLOCK
1ENABLE,
2ENABLE
1CLEAR,
2CLEAR
2Q0 tO 2Q3 Data Outputs
Clock Inputs (LOW to HIGH, Edge-Triggered)
Clock Enable Inputs
Asynchronous Reset Inputs (Active LOW)
CLOCK ENABLE CLEAR
L L INCREMENT COUNTER
X L NO CHANGE
H L NO CHANGE X X H Q0 THRU Q3=L
X : Don’t Care Z : High Impedance
LOGIC DIAGRAM
INPUTS
FUNCTION
H L INCREMENT COUNTER
X L NO CHANGE
L L NO CHANGE
This log i c diagram has not be used to est i m at e propagation delays
2/11
TIMING CHART
M74HC4518
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
I
OK
I
I
or I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65
Supply Voltage
CC
DC Input Voltage -0.5 to VCC + 0.5
I
DC Output Voltage -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current DC Output Current
O
DC VCC or Ground Current
GND
Power Dissipation
D
Storage Temperature
stg
Lead Temperature (10 sec)
L
°C; derate to 300mW by 10mW/°C from 65°C to 85°C
-0.5 to +7 V V V
± 20 mA ± 20 mA ± 25 mA ± 50 mA
500(*) mW
-65 to +150 °C
300 °C
3/11
M74HC4518
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
T
t
r
DC SPECIFICATIONS
Symbol Parameter
V
IH
V
IL
V
OH
V
OL
I
I
I
CC
Supply Voltage
CC
Input Voltage 0 to V
I
Output Voltage 0 to V
O
Operating Temperature
op
Input Rise and Fall Time VCC = 2.0V
, t
f
V V
CC CC
= 4.5V = 6.0V
Test Condition Value
T
= 25°C
A
Min. Typ. Max. Min. Max. Min. Max.
High Level Input
V
CC
(V)
2.0 1.5 1.5 1.5
Voltage
6.0 4.2 4.2 4.2
Low Level Input
2.0 0.5 0.5 0.5
Voltage
6.0 1.8 1.8 1.8
High Level Output Voltage
Low Level Output Voltage
Input Leakage Current
Quiescent Supply Current
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
IO=-20 µA I
=-20 µA
O
I
=-20 µA
O
I
=-4.0 mA
O
I
=-5.2 mA
O
=20 µA
I
O
I
=20 µA
O
I
=20 µA
O
I
=4.0 mA
O
I
=5.2 mA
O
= VCC or GND
V
I
V
= VCC or GND
I
1.9 2.0 1.9 1.9
4.4 4.5 4.4 4.4
5.9 6.0 5.9 5.9
4.18 4.31 4.13 4.10
5.68 5.8 5.63 5.60
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
0.17 0.26 0.37 0.40
0.18 0.26 0.37 0.40 ± 0.1 ± 1 ± 1 µA
44080µA
2 to 6 V
CC CC
-55 to 125 °C
0 to 1000 ns
0 to 500 ns 0 to 400 ns
-40 to 85°C -55 to 125°C
V V
Unit
V4.5 3.15 3.15 3.15
V4.5 1.35 1.35 1.35
V
V
4/11
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