ST M74HC4094 User Manual

1/12January 2003
HIGH SPEED :
f
MAX
=80MHz(TYP.)atV
CC
=6V
LOW POWER DISSIPATION:
I
CC
A
=25°C
HIGH NOISE IMMUNITY:
V
NIH
=V
NIL
=28%V
CC
(MIN.)
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
|=I
OL
=4mA(MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
WIDE OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2 V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4094
DESCRIPTION
The M74HC4094 is an high speed CMOS 8 BIT
SIPO SHIFT LATCH REGISTER fabricated with
silicon gate C
2
MOS technology.
This device consists of an 8 bit shift register and
an 8 bit latch with 3 state output buffer. Data is
shifted serially trough the shift register on the
positive going transition of the clock input signal.
Theoutputofthelaststage(Qs)canbeusedto
cascade several devices.
Data on the Qs out put is transferred to a second
output (Qs’) on the following negative transition of
the clock input sig nal. The data of each stage of
the s hift register is provided with a latch, which
latches data on the negativ e going transition of the
STROBE input signal. When the STROBE input is
held high, data propagates through the latch to a
3-state output buffer.
This buffer is enabled when OUT PUT ENA BLE
input is taken high.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC4094
8 BIT SIPO SHIFT LATCH REGISTER (3-STATE)
PIN CONNE CTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
DIP M74HC4094B1R
SOP M74HC4094M1R M74HC4094RM13TR
TSSOP M74HC4094TTR
TSSOPDIP SOP
M74HC4094
2/12
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
X : Don’t Care
Z : High Impedance
NC: NoChange
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
PIN No SYMBOL NAME AND FUNCTION
1 STROBE Strobe Input
2 SERIAL IN Serial Input
3 CLOCK Clock Input
4, 5, 6, 7, 14,
13, 12, 11
Q1 to Q7 Parallel Outputs
9, 10 QS Q’S Serial Outputs
15 OE Output Enable Input
8 GND Ground (0V)
16 Vcc Positive Supply Voltage
CK OE ST SI
PARALLEL OUTPUTS SERIAL OUTPUTS
Q1 Qn Qs Qs’
H H L L Qn-1 Q7 NC
HHHHQn-1 Q7 NC
HLXNCNCQ7NC
LXXZZNCQ8
H H H NC NC NC Q8
LXXZZQ7NC
M74HC4094
3/12
TIMING CHART
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mWat 65
°C; derate to 300mW by 10mW/°Cfrom65°Cto85°C
Symbol Parameter Value Unit
V
CC
Supply Voltage
-0.5 to +7 V
V
I
DC Input Voltage -0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage -0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
± 20 mA
I
OK
DC Output Diode Current
± 20 mA
I
O
DC Output Current
± 25 mA
I
CC
or I
GND
DC V
CC
or Ground Current
± 50 mA
P
D
Power Dissipation
500(*) mW
T
stg
Storage Temperature
-65 to +150 °C
T
L
Lead Temperature (10 sec)
300 °C
M74HC4094
4/12
RECOMMENDED OPERATING CONDITIONS
DC SPECIFICATIONS
Symbol Parameter Value Unit
V
CC
Supply Voltage
2to6 V
V
I
Input Voltage 0 to V
CC
V
V
O
Output Voltage 0 to V
CC
V
T
op
Operating Temperature
-55 to 125 °C
t
r
,t
f
Input Rise and Fall Time V
CC
= 2.0V
0 to 1000 ns
V
CC
= 4.5V
0 to 500 ns
V
CC
= 6.0V
0 to 400 ns
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
V
IH
High Level Input
Voltage
2.0 1.5 1.5 1.5
V4.5 3.15 3.15 3.15
6.0 4.2 4.2 4.2
V
IL
Low Level Input
Voltage
2.0 0.5 0.5 0.5
V4.5 1.35 1.35 1.35
6.0 1.8 1.8 1.8
V
OH
High Level Output
Voltage
2.0
I
O
=-20 µA
1.9 2.0 1.9 1.9
V
4.5
I
O
=-20 µA
4.4 4.5 4.4 4.4
6.0
I
O
=-20 µA
5.9 6.0 5.9 5.9
4.5
I
O
=-4.0 mA
4.18 4.31 4.13 4.10
6.0
I
O
=-5.2 mA
5.68 5.8 5.63 5.60
V
OL
Low Level Output
Voltage
2.0
I
O
=20 µA
0.0 0.1 0.1 0.1
V
4.5
I
O
=20 µA
0.0 0.1 0.1 0.1
6.0
I
O
=20 µA
0.0 0.1 0.1 0.1
4.5
I
O
=4.0 mA
0.17 0.26 0.33 0.40
6.0
I
O
=5.2 mA
0.18 0.26 0.33 0.40
I
I
Input Leakage
Current
6.0
V
I
=V
CC
or GND
± 0.1 ± 1 ± 1 µA
I
OZ
High Impedance
Output Leakage
Current
6.0
V
I
=V
IH
or V
IL
V
O
=V
CC
or GND
± 0.5 ± 5 ± 10 µA
I
CC
Quiescent Supply
Current
6.0
V
I
=V
CC
or GND
44080µA
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