ST M74HC4051 User Manual

Features
Low power dissipation:
–I
= 4 μA(max) at TA=25°C
Logic level translation to enable 5 V logic signal
to communicate with ± 5 V analog signal
Low ON resistance:
70 Ω typ (V 50 Ω typ (V
Wide analog input voltage range : ±6V
Fast switching:
t
= 15 ns (typ) at TA = 25 °C
pd
Low crosstalk between switches
High ON/OFF output voltage ratio
Wide operating supply voltage range
(V
- VEE) = 2 to 12 V
Low sine wave distortion:
0.02% at V
High noise immunity:
V
= V
NIH
Pin and function compatible with
74 series 4051
- VEE = 4.5 V)
CC
- VEE = 9 V)
CC
- VEE = 9 V
= 28 % VCC (min)
NIL
M74HC4051
Single 8-channel
analog multiplexer/demultiplexer
PDIP-16
TSSOP-16
Description
The M74HC4051 is a single 8-channel analog multiplexer/demultiplexer fabricated with silicon
2
gate C with the equivalent metal gate CMOS4000B series. It contains 8 bidirectional and digitally controlled analog switches.
A built-in level shifting is included to allow an input range up to ± 6 V (peak) for an analog signal with digital control signal of 0 to 6 V.
MOS technology, pin-to-pin compatible
SOP-16
The V
supply pin is provided for analog input
EE
signals. It has an inhibit (INH) input terminal to disable all the switches when is at high level. For operation as a digital multiplexer/demultiplexer, V
is connected to GND.
EE
A, B and C control inputs select one channel out of eight. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

Table 1. Device summary

Order code Package Packaging
M74HC4051RM13TR SOP-16 Tape and reel
M74HC4051TTR TSSOP-16 Tape and reel
April 2008 Rev 4 1/17
www.st.com
17
Pin connection and IEC logic symbols M74HC4051

1 Pin connection and IEC logic symbols

Figure 1. Pin connection

Figure 2. IEC logic symbols

1.1 Pin description

Table 2. Pin description

Pin number Symbol Name and function
3
6 INH Inhibit input
7V
11, 10, 9 A, B, C Select inputs
13, 14, 15, 12, 1, 5, 2, 4 0 to 7 Independent input/outputs
8 GND Ground (0 V)
16 V
2/17
COM
OUT/IN
EE
CC
Common output/input
Negative supply voltage
Positive supply voltage
M74HC4051 Pin connection and IEC logic symbols

Figure 3. Control input equivalent circuit

Figure 4. I/O equivalent circuit

Table 3. Truth table

Input state
INHCBA
LLLL 0
LLLH 1
LLHL 2
LLHH 3
LHLL 4
LHLH 5
LHHL 6
LHHH 7
H X X X NONE
x: Don’t care
ON channel
3/17
Pin connection and IEC logic symbols M74HC4051

Figure 5. Functional diagram

4/17
M74HC4051 Maximum ratings

2 Maximum ratings

Stressing the device above the rating listed in the “absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit
V
CC
V
CC - VEE
V
V
I/O
I
CK
I
IOK
I
T
or I
I
CC
P
T
stg
T
1. 500 mW at 65 °C; derate to 300 mW by 10 mW/×C from 65 °C to 85 °C
Supply voltage -0.5 to +7 V
Supply voltage -0.5 to +13 V
Control input voltage -0.5 to VCC + 0.5 V
I
V
-0.5 to VCC +
Switch I/O voltage
EE
0.5
Control input diode current ± 20 mA
I/O diode current ± 20 mA
Switch through current ± 25 mA
DC VCC or ground current ± 50 mA
GND
DIP-16 500
Power dissipation
D
SOP-16 and TSSOP-16
180
Storage temperature -65 to +150 °C
Lead temperature (10 sec) 300 °C
L
(1)

Table 5. Recommended operating conditions

Symbol Parameter Value Unit
V
mW
mW
V
CC
V
EE
V
CC - VEE
V
V
I/O
T
op
tr, t
Supply voltage 2 to 6 V
Supply voltage -6 to 0 V
Supply voltage 2 to 12 V
Input voltage 0 to V
I
I/O voltage VEE to V
CC
CC
Operating temperature -55 to 125 °C
V
= 2.0 V 0 to 1000
CC
Input rise and fall time
f
= 4.5 V 0 to 500
CC
= 6.0 V 0 to 400
V
CC
5/17
V
V
nsV
Maximum ratings M74HC4051

Table 6. DC electrical specifications

Test condition Value
Symbo
l
Parameter
V
CC
(V)
V
(V)
EE
2.0 1.5 1.5 1.5
V
High level input
IHC
voltage
6.0 4.2 4.2 4.2
2.0 0.5 0.5 0.5
V
Low level input
ILC
voltage
6.0 1.8 1.8 1.8
4.5 GND
4.5 -4.5 55 120 150 180
6.0 -6.0 50 100 125 150
R
ON resistance
ON
2.0 GND
4.5 GND 70 150 190 230
4.5 -4.5 50 100 125 150
VI = V V
I/O
I
I/O
= V
V
I
V
I/O
I
I/O
6.0 -6.0 45 80 100 120
or V
IHC
= VCC to V
2mA
or V
IHC
= VCC or V
2mA
= 25 °C
T
A
-40 to 85 °C
Min Typ Max Min Max Min Max
85 180 225 270
ILC
EE
150
ILC
EE
-55 to
125 °C
Unit
V4.5 3.15 3.15 3.15
V4.5 1.35 1.35 1.35
W
ΔR
I
Difference of ON resistance
ON
between switches
Input/output leakage current
OFF
(switch off)
Switch input leakage current
I
IZ
(switch on, output open)
Input leakage
I
I
current
Quiescent supply
I
CC
current
4.5 GND
6.0 -6.0 5 10 12 15
= V
V
I
IHC
V
= VCC or V
I/O
I
2mA
I/O
or V
ILC
EE
6.0 GND VOS = VCC or GND
6.0 -6.0 ± 0.1 ± 1 ± 2
VI = V
ILC
VIS = GND or V
or V
CC
IHC
6.0 GND V
= VCC or GND
OS
= V
V
6.0 -6.0 ± 0.1 ± 1 ± 2
I
6.0 GND V
or V
IHC
= VCC or GND ± 0.1 ± 0.1 ± 1 μA
I
ILC
6.0 GND
= VCC or GND
V
6.0 -6.0 8 80 160
I
10 30 35 45
±0.06 ± 0.6 ± 1.2
±0.06 ± 0.6 ± 1.2
44080
W4.5 -4.5 5 12 15 18
μA
μA
μA
6/17
M74HC4051 Maximum ratings
Table 7. AC electrical characteristics (C
Test condition Value
Symbol Parameter
V
(V)
CC
V
(V)
EE
2.0 GND 25 60 75 90
Phase difference between input
Φ
I/O
and output
4.5 GND 6 12 15 18
6.0 GND 5 10 13 15
4.5 -4.5 4
2.0 GND
t
PZL
t
PZH
Output enable time
4.5 GND 18 45 56 68 R
6.0 GND 15 38 48 58
4.5 -4.5 18
2.0 GND
t
PLZ
t
PHZ
Output disable time
4.5 GND 33 50 63 70 R
6.0 GND 28 43 54 64
4.5 -4.5 29
= 50 pF, Input tr = tf = 6ns)
L
= 25°C -40 to 85°C
T
A
Min. Typ Max Min Max Min Max
64 225 280 340
= 1 KΩ
L
100 250 315 375
= 1 KΩ
L
-55 to 125°C
Unit
ns
ns
ns

Table 8. Capacitive characteristics

Test condition Value
Symbol Parameter
V
(V)
CC
V
(V)
EE
TA = 25 °C
-40 to 85 °C
Min Typ Max Min Max Min Max
Input capacitance 5.0 5 10 10 10 pF
C
IN
C
C
C
Common terminal
I/O
capacitance
Switch terminal
I/O
capacitance
Feed through
IOS
capacitance
5.0 -5.0 36 70 70 70 pF
5.0 -5.0 7 15 15 15 pF
5.0 -5.0 0.95 2 2 2 pF
Power dissipation
C
1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current
capacitance
PD
(1)
consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= CPD x VCC x fIN + ICC .
CC(opr)
5.0 GND 70 pF
-55 to
125 °C
Unit
7/17
Maximum ratings M74HC4051
Table 9. Analog switch characteristics (GND = 0 V; T
Test condition Value Unit
Symbo
l
f
MAX
f
MAX
1. Input common terminal, and measured at switch terminal.
2. Input switch terminal, and measured at common terminal.
These characteristics are determined by the design of the device.
Parameter
Sine wave distortion
Frequency response (Switch on)
(1)
Frequency response (switch on)
(2)
Feed through attenuation (switch off)
Crosstalk (control input to signal output)
Crosstalk (between any two switches)
V
(V)
CC
V
(V)
EE
(V
V
IN
)
p-p
2.25 -2.25 4
= 1 KHz RL = 10 KΩ CL = 50 pF
f
IN
6.0 -6.0 11 0.018
2.25 -2.25 Adjust fIN voltage to obtain 0 dBm at VOS.
Increase fIN Frequency until dB meter reads -3dB
6.0 -6.0 200
2.25 -2.25
RL = 50 Ω, CL = 10 pF, fIN = 1 KHz sine wave
Adjust f
voltage to obtain 0 dBm at VOS.
IN
Increase fIN Frequency until dB meter reads -3dB
6.0 -6.0 85
2.25 -2.25
RL = 50Ω, CL = 10 pF, fIN = 1KHz sine wave
is centered at (VCC - VEE)/2
V
IN
Adjust input for 0 dBm
= 600 Ω, CL = 50 pF, fIN = 1 KHz sine wave
R
6.0 -6.0 -50
L
2.25 -2.25 Adjust R
at set up so that IS = 0A.
L
RL = 600 Ω, CL = 50 pF, fIN = 1 KHz square wave
6.0 -6.0 200
2.25 -2.25 Adjust V
to obtain 0d Bm at input
IN
RL = 600 Ω, CL = 50 pF, fIN = 1 KHz sine wave
6.0 -6.0 -50
= 25°C)
A
Typ
0.025
%4.5 -4.5 8 0.020
120
MHz4.5 -4.5 190
45
MHz4.5 -4.5 70
-50
dB4.5 -4.5 -50
60
mV4.5 -4.5 140
-50
dB4.5 -4.5 -50
8/17
M74HC4051 Maximum ratings

2.1 Switching characteristics test circuit

Figure 6. Output enable/disable time Figure 7. Crosstalk (control to output)
Figure 8. Bandwidth and feedthrough
attenuation
Figure 9. Crosstalk between any two
switches
9/17
Maximum ratings M74HC4051
Figure 10. Common terminal capacitance (C

Figure 11. Switching caracteristics waveform

I-O
, C
I/O)
10/17
M74HC4051 Maximum ratings

Figure 12. Channel resistance (RON) Figure 13. Quiescent supply current - ICC (opr)

11/17
Package mechanical data M74HC4051

3 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
12/17
M74HC4051 Package mechanical data

Figure 14. Plastic DIP-16 (0.25) package information

Plastic DIP-16 (0.25) MECHANICAL DATA
DIM.
a1
B 0.77 1.65
b 0.5 0.020
b1 0.25 0.010
D 20 0.787
E 8.5 0.335
e 2.54 0.100
e3 17.78 0.700
F 7.1 0.280
I
L 3.3 0.
Z 1.27 0.050
MIN. TYP MAX. MIN. TYP. MAX.
0.51 0.020
mm. inch
0.030 0.065
5.1 0.201
130
P001C
13/17
Package mechanical data M74HC4051

Figure 15. SO-16 package information

SO-16 MECHANICAL DATA
DIM.
A1.750.068
a1 0.1 0.25 0.004 0.010
a2 1.64 0.063
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45° (typ.)
D9.8 10 0.3850.393
E5.8 6.2 0.228 0.244
e 1.27 0.050
e38.890.350
F 3.8 4.0 0.149 0.157
G4.6 5.3 0.1810.208
L 0.5 1.27 0.019 0.050
M 0.62 0.024
S8° (max.)
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
14/17
0016020D
M74HC4051 Package mechanical data

Figure 16. TSSOP16 package information

TSSOP16 MECHANICAL DATA
DIM.
A 1.2 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.0079
D 4.9 5 5.1 0.193 0.197 0.201
E 6.2 6.4 6.6 0.244 0.252 0.260
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0
L 0.45 0.60 0.75 0.018 0.024 0.030
A
MIN. TYP MAX.
0.8 1 1.05 0.031 0.039 0.041
°8°0°8°
A2
A1
mm. inch
MIN. TYP. MAX.
b
e
c
K
L
E
PIN 1 IDENTIFICATION
D
E1
1
0080338D
15/17
Revision history M74HC4051

4 Revision history

Table 10. Document revision history

Date Revision Changes
01-Jul-2001 1 Initial release.
21-June-2004 2 Document internal migration, no content change.
10-Mar-2008 3
Document restructured and converted to new ST template, updated
Table 4 on page 5 , removed tube packing info.
21-Apr-2008 4
Replaced M74HC4051M13TR with M74HC4051RM13TR in Ta b le 1
on page 1.
16/17
M74HC4051
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