ST M74HC373 User Manual

M74HC373

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING

■HIGH SPEED:

tPD = 12ns (TYP.) at VCC = 6V

■LOW POWER DISSIPATION: ICC = 4μA(MAX.) at TA=25°C

■HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.)

■SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN)

■BALANCED PROPAGATION DELAYS: tPLH tPHL

■WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V

■PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 373

DESCRIPTION

The M74HC373 is an high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with sub-micron silicon gate C2MOS technology. This 8-BIT D-Type latches is controlled by a latch enable input (LE) and output enable input (OE).

While the LE input is held at a high level, the Q outputs will follow the data input. When the LE is taken low, the Q outputs will be latched at the logic level of D input data.

DIP		SOP	TSSOP
ORDER CODES
PACKAGE		TUBE	T & R
DIP		M74HC373B1R
SOP		M74HC373M1R	M74HC373RM13TR
TSSOP			M74HC373TTR

While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic level) and when OE is in high level the outputs will be in a high impedance state.

The 3-State output configuration and the wide choice of outline make bus organized system simple.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

July 2001

1/11

M74HC373

INPUT AND OUTPUT EQUIVALENT CIRCUIT	PIN DESCRIPTION
	PIN No	SYMBOL	NAME AND FUNCTION
	1	OE	3 State Output Enable
			Input (Active LOW)
	2, 5, 6, 9, 12,	Q0 to Q7	3 State Outputs
	15, 16, 19
	3, 4, 7, 8, 13,	D0 to D7	Data Inputs
	14, 17, 18
	11	LE	Latch Enable Input
	10	GND	Ground (0V)
	20	VCC	Positive Supply Voltage

TRUTH TABLE

			INPUTS		OUTPUTS
	OE		LE	D	Q
	H		X	X	Z
	L		L	X	NO CHANGE (*)
	L		H	L	L
	L		H	H	H

X: Don’t Care

Z: High Impedance

(*): Q Outputs are latched at the time when the LE input is taken low logic level.

LOGIC DIAGRAM

2/11

			M74HC373
ABSOLUTE MAXIMUM RATINGS
Symbol	Parameter	Value		Unit
VCC	Supply Voltage	-0.5 to +7		V
VI	DC Input Voltage	-0.5 to VCC + 0.5		V
VO	DC Output Voltage	-0.5 to VCC + 0.5		V
IIK	DC Input Diode Current	± 20		mA
IOK	DC Output Diode Current	± 20		mA
IO	DC Output Current	± 35		mA
ICC or IGND	DC VCC or Ground Current	± 70		mA
PD	Power Dissipation	500(*)		mW
Tstg	Storage Temperature	-65 to +150		°C
TL	Lead Temperature (10 sec)	300		°C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C

RECOMMENDED OPERATING CONDITIONS

Symbol		Parameter		Value	Unit
VCC	Supply Voltage			2 to 6	V
VI	Input Voltage			0 to VCC	V
VO	Output Voltage			0 to VCC	V
Top	Operating Temperature			-55 to 125	°C
	Input Rise and Fall Time		VCC = 2.0V	0 to 1000	ns
tr, tf			VCC = 4.5V	0 to 500	ns
			VCC = 6.0V	0 to 400	ns

3/11

M74HC373

DC SPECIFICATIONS

			Test Condition						Value
Symbol	Parameter	VCC				TA = 25°C			-40 to 85°C		-55 to 125°C		Unit
		(V)			Min.		Typ.	Max.	Min.	Max.	Min.	Max.
VIH	High Level Input	2.0			1.5				1.5		1.5
	Voltage	4.5			3.15				3.15		3.15		V
		6.0			4.2				4.2		4.2
VIL	Low Level Input	2.0						0.5		0.5		0.5
	Voltage	4.5						1.35		1.35		1.35	V
		6.0						1.8		1.8		1.8
VOH	High Level Output	2.0		IO=-20 μA	1.9		2.0		1.9		1.9
	Voltage
		4.5		IO=-20 μA	4.4		4.5		4.4		4.4
		6.0		IO=-20 μA	5.9		6.0		5.9		5.9		V
		4.5		IO=-6.0 mA	4.18		4.31		4.13		4.10
		6.0		IO=-7.8 mA	5.68		5.8		5.63		5.60
VOL	Low Level Output	2.0		IO=20 μA			0.0	0.1		0.1		0.1
	Voltage
		4.5		IO=20 μA			0.0	0.1		0.1		0.1
		6.0		IO=20 μA			0.0	0.1		0.1		0.1	V
		4.5		IO=6.0 mA			0.17	0.26		0.33		0.40
		6.0		IO=7.8 mA			0.18	0.26		0.33		0.40
II	Input Leakage	6.0		VI = VCC or GND				± 0.1		± 1		± 1	μA
	Current
IOZ	High Impedance			VI = VIH or VIL				± 0.5		± 5		± 10	μA
	Output Leakage	6.0		VO = VCC or GND
	Current
ICC	Quiescent Supply	6.0		VI = VCC or GND				4		40		80	μA
	Current

4/11