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M74HC259
8 BIT ADDRESSABLE LATCH
■ HIGH SPEED :
t
= 20 ns (TYP.) at VCC = 6V
PD
■ LOW POWER DISSIPATION:
I
=4µA(MAX.) at TA=25°C
CC
■ HIGH NOISE IMMUNITY:
V
= V
NIH
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 4mA (MIN)
OH
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
■ WIDE OPERATING VOLTAGE RANGE:
V
(OPR) = 2V to 6V
CC
■ PIN AND FUNCTION COMPATIBLE WITH
= 28 % VCC (MIN.)
NIL
PHL
74 SERIES 259
DESCRIPTION
The M74HC259 is an high speed CMOS 8 BIT
ADDRESSABLE LATCH fabricated with silicon
gate C
2
MOS technology.
The M74HC259 has single data input (D) 8 latch
outputs (Q0-Q7), 3 a ddress inputs (A, B, and C),
common enable input (E), and a comm on CLE AR
input. To operate t his de vi ce as an addressable
latch, data is held on the D input, and the address
of the latch into which the data is to be entered is
held on the A, B, and C inputs. When ENABLE
is
taken low the data flows through to the addresses
output. The data is stored on the positive-going
edge of the ENABLE
latches will remain unaffected. With ENABLE
pulse. All unaddressed
in
the high state the device is deselected and all
TSSOPDIP SOP
ORDER CODES
PACKAGE TUBE T & R
DIP M74HC259B1R
SOP M74HC259M1R M74HC259RM13TR
TSSOP M74HC259TTR
latches remain in their previous state, unaffect ed
by changes on the data or address inputs. To
eliminate the possibility of entering erroneous data
into the latches, th e EN A BLE
should be held high
(inactive) while the address lines are changing. If
ENABLE
is held high and CLEAR is taken l ow all
eight latches are cleared to the low state. If
ENABLE
is low all latches except the addres sed
latch will be cleared. The addressed latch will
instead follow the D input, effectively
implementing a 3-to-8 line decoder.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/13July 2001
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M74HC259
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
1, 2, 3 A, B, C Address Inputs
4, 5, 6, 7, 9,
10, 11, 12
13 D Data Input
14 ENABLE
15 CLEAR
8 GND Ground (0V)
16 Vcc Positive Supply Voltage
TRUTH TABLE
Q0 to Q7 Latch Outputs
Latch Enable Input (Active
Low)
Conditional Reset Input
(Low)
INPUTS
CLEAR
H L D Qi0 ADDRESSABLE LATCH
H H Qi0 Qi0 MEMORY
L L D L 8 LINE DEMULTIPLEXER
LH L L CLEAR ALL BITS TO ’L’
D : The level at the data input
Qi0 : The level before the indicated steady state input conditions where established, (i = 0, 1, ......., 7).
ENABLE
CBA
LLLQ0
LLHQ1
LHLQ2
LHHQ3
HLLQ4
HLHQ5
HHLQ6
HHHQ7
OUTPUTS OF
ADDRESSED LATCH
SELECT INPUTS
EACH OTHER OUTPUT FUNCTION
LATCH ADDRESSED
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LOGIC DIAGRAM
M74HC259
This log i c diagram has not be used to est i m at e propagation delays
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
I
OK
I
I
or I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
Supply Voltage
CC
DC Input Voltage -0.5 to VCC + 0.5
I
DC Output Voltage -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCC or Ground Current
GND
Power Dissipation
D
Storage Temperature
stg
Lead Temperature (10 sec)
L
°C; derate to 300mW by 10mW/°C from 65°C to 85°C
-0.5 to +7 V
V
V
± 20 mA
± 20 mA
± 25 mA
± 50 mA
500(*) mW
-65 to +150 °C
300 °C
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M74HC259
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
T
t
r
DC SPECIFICATIONS
Symbol Parameter
V
IH
V
IL
V
OH
V
OL
I
I
I
CC
Supply Voltage
CC
Input Voltage 0 to V
I
Output Voltage 0 to V
O
Operating Temperature
op
Input Rise and Fall Time VCC = 2.0V
, t
f
V
V
CC
CC
= 4.5V
= 6.0V
Test Condition Value
= 25°C
T
A
Min. Typ. Max. Min. Max. Min. Max.
High Level Input
V
CC
(V)
2.0 1.5 1.5 1.5
Voltage
6.0 4.2 4.2 4.2
Low Level Input
2.0 0.5 0.5 0.5
Voltage
6.0 1.8 1.8 1.8
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage
Current
Quiescent Supply
Current
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
IO=-20 µA
I
=-20 µA
O
I
=-20 µA
O
I
=-4.0 mA
O
I
=-5.2 mA
O
IO=20 µA
I
=20 µA
O
I
=20 µA
O
I
=4.0 mA
O
I
=5.2 mA
O
= VCC or GND
V
I
= VCC or GND
V
I
1.9 2.0 1.9 1.9
4.4 4.5 4.4 4.4
5.9 6.0 5.9 5.9
4.18 4.31 4.13 4.10
5.68 5.8 5.63 5.60
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
0.17 0.26 0.33 0.40
0.18 0.26 0.33 0.40
± 0.1 ± 1 ± 1 µA
44080µA
2 to 6 V
CC
CC
-55 to 125 °C
0 to 1000 ns
0 to 500 ns
0 to 400 ns
-40 to 85°C -55 to 125°C
V
V
Unit
V4.5 3.15 3.15 3.15
V4.5 1.35 1.35 1.35
V
V
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