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M74HC191
4 BIT SYNCHRONOUS UP/DOWN COUNTERS
■ HIGH SPEED :
f
= 61 MHz (TYP.) at VCC = 6V
MAX
■ LOW POWER DISSIPATION:
I
=4µA(MAX.) at TA=25°C
CC
■ HIGH NOISE IMMUNITY:
V
= V
NIH
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 4mA (MIN)
OH
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
■ WIDE OPERATING VOLTAGE RANGE:
V
(OPR) = 2V to 6V
CC
■ PIN AND FUNCTION COMPATIBLE WITH
= 28 % VCC (MIN.)
NIL
PHL
74 SERIES 191
DESCRIPTION
The M74HC191 is an high speed CMOS 4-BIT
SYNCHRONOUS UP/DOWN COUNTER
fabricated with silicon gate C
2
MOS technology.
State changes of the counter are synchronous
with the LOW-to-HIGH transition of the Clock
Pulse Input.
An asynchronous parallel load input overrides
counting and loads the dat a pres ent on th e DA TA
inputs into the flip-flops, which makes it possible to
use the circuits as programmable counters. A
count enable input serves as the carry/borrow
TSSOPDIP SOP
ORDER CODES
PACKAGE TUBE T & R
DIP M74HC191B1R
SOP M74HC191M1R M74HC191RM13TR
TSSOP M74HC191TTR
input in multi-stage counters. Control input, Down/
Up
, determines whether a circuit counts up or
down. A MAX/MIN output and a Ripple Clock
output provide overflow/underflow indication and
make possible a variety of methods for generating
carry/borrow signals in multi-stage counter
applications.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/14August 2001
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M74HC191
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
3, 2, 6, 7 QA to QD Flip-Flop Outputs
4 ENABLE
5U
11 LOAD Load Input (Active LOW)
12 MA/MI OUT Terminal Count Output
13 RC
14 CLOCK
15, 1, 10, 9 DA to DD Data Inputs
8 GND Ground (0V)
16 Vcc Positive Supply Voltage
TRUTH TABLE
/D Parallel Data Input
Count Enable Input
(Active LOW)
Ripple Clock Output
(Active LOW)
Clock Input (LOW to
HIGH, edge triggered)
INPUTS OUTPUTS
LOAD
L X X X a b c d PRESET DATA
H L L UP COUNT UP COUNT
H L H DOWN COUNT DOWN COUNT
H H X NO CHANGE NO COUNT
H X X NO CHANGE NO COUNT
X : Don’t Care
a - d : The leve l of s teady state inputs a through d respec tively
ENABLE D/U CLOCKQAQBQCQD
FUNCTION
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LOGIC DIAGRAM
M74HC191
This log i c diagram has not be used to esti m ate propagation delays
3/14
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M74HC191
TIMING CHART
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
I
OK
I
I
or I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
Supply Voltage
CC
DC Input Voltage -0.5 to VCC + 0.5
I
DC Output Voltage -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCC or Ground Current
GND
Power Dissipation
D
Storage Temperature
stg
Lead Temperature (10 sec)
L
°C; derate to 300mW by 10mW/°C from 65°C to 85°C
-0.5 to +7 V
V
V
± 20 mA
± 20 mA
± 25 mA
± 50 mA
500(*) mW
-65 to +150 °C
300 °C
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M74HC191
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
T
t
r
DC SPECIFICATIONS
Symbol Parameter
V
IH
V
IL
V
OH
V
OL
I
I
I
CC
Supply Voltage
CC
Input Voltage 0 to V
I
Output Voltage 0 to V
O
Operating Temperature
op
Input Rise and Fall Time VCC = 2.0V
, t
f
V
V
CC
CC
= 4.5V
= 6.0V
Test Condition Value
= 25°C
T
A
Min. Typ. Max. Min. Max. Min. Max.
High Level Input
V
CC
(V)
2.0 1.5 1.5 1.5
Voltage
6.0 4.2 4.2 4.2
Low Level Input
2.0 0.5 0.5 0.5
Voltage
6.0 1.8 1.8 1.8
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage
Current
Quiescent Supply
Current
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
IO=-20 µA
I
=-20 µA
O
I
=-20 µA
O
I
=-4.0 mA
O
I
=-5.2 mA
O
IO=20 µA
I
=20 µA
O
I
=20 µA
O
I
=4.0 mA
O
I
=5.2 mA
O
= VCC or GND
V
I
= VCC or GND
V
I
1.9 2.0 1.9 1.9
4.4 4.5 4.4 4.4
5.9 6.0 5.9 5.9
4.18 4.31 4.13 4.10
5.68 5.8 5.63 5.60
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
0.17 0.26 0.33 0.40
0.18 0.26 0.33 0.40
± 0.1 ± 1 ± 1 µA
44080µA
2 to 6 V
CC
CC
-55 to 125 °C
0 to 1000 ns
0 to 500 ns
0 to 400 ns
-40 to 85°C -55 to 125°C
V
V
Unit
V4.5 3.15 3.15 3.15
V4.5 1.35 1.35 1.35
V
V
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