ST M74HC175 User Manual

M74HC175

QUAD D-TYPE FLIP FLOP WITH CLEAR

HIGH SPEED :

tPD = 16 ns (TYP.) at VCC = 6V

LOW POWER DISSIPATION: ICC =4μA(MAX.) at TA=25°C

HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.)

SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

BALANCED PROPAGATION DELAYS: tPLH tPHL

WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V

PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 175

DESCRIPTION

The M74HC175 is an high speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology.

These four flip-flops are controlled by a clock input (CLOCK) and a clear input (CLEAR). The information data applied to the D inputs (1D to 4D) are transferred to the outputs (1Q to 4Q and 1Q to

DIP

SOP

TSSOP

 

 

ORDER CODES

 

PACKAGE

 

TUBE

T & R

 

 

 

 

DIP

 

M74HC175B1R

 

 

 

 

 

SOP

 

M74HC175M1R

M74HC175RM13TR

 

 

 

 

TSSOP

 

 

M74HC175TTR

 

 

 

 

4Q) on the positive-going edge of the clock pulse. The reset function is accomplished when the CLEAR input is low and all Q outputs are low regardless of other input conditions.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

July 2001

1/11

ST M74HC175 User Manual

M74HC175

INPUT AND OUTPUT EQUIVALENT CIRCUIT

 

PIN DESCRIPTION

 

 

 

 

 

PIN No

SYMBOL

NAME AND FUNCTION

 

 

 

 

1

CLEAR

Asynchronous Master

 

 

 

 

Reset (Active Low)

 

 

 

 

 

 

 

 

 

 

2, 7, 10, 15

1Q to 4Q

Flip-Flop Outputs

 

 

 

 

3, 6, 11, 14

1Q to 4Q

Complementary Flip-Flop

 

 

 

 

Outputs

 

 

 

 

 

 

 

 

 

 

4, 5, 12, 13

1D to 4D

Data Inputs

 

 

 

 

9

CLOCK

Clock Input (LOW to

 

 

 

 

HIGH, edge triggered)

 

 

 

 

 

 

 

 

 

 

8

GND

Ground (0V)

 

 

 

 

16

Vcc

Positive Supply Voltage

TRUTH TABLE

 

 

 

 

 

 

 

INPUTS

 

 

OUTPUTS

 

FUNCTION

CLEAR

D

CLOCK

Q

 

Q

 

 

L

X

X

L

 

H

 

H

L

 

L

 

H

 

H

H

 

H

 

L

 

H

X

 

Qn

Qn

NO CHANGE

X : Don’t Care

 

 

 

 

 

 

LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays

2/11

 

 

 

M74HC175

ABSOLUTE MAXIMUM RATINGS

 

 

 

 

 

 

 

 

Symbol

Parameter

Value

 

Unit

 

 

 

 

 

VCC

Supply Voltage

-0.5 to +7

 

V

VI

DC Input Voltage

-0.5 to VCC + 0.5

 

V

VO

DC Output Voltage

-0.5 to VCC + 0.5

 

V

IIK

DC Input Diode Current

± 20

 

mA

IOK

DC Output Diode Current

± 20

 

mA

IO

DC Output Current

± 25

 

mA

ICC or IGND

DC VCC or Ground Current

± 50

 

mA

PD

Power Dissipation

500(*)

 

mW

Tstg

Storage Temperature

-65 to +150

 

°C

TL

Lead Temperature (10 sec)

300

 

°C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C

RECOMMENDED OPERATING CONDITIONS

Symbol

 

Parameter

Value

Unit

 

 

 

 

 

 

VCC

Supply Voltage

 

 

2 to 6

V

VI

Input Voltage

 

 

0 to VCC

V

VO

Output Voltage

 

 

0 to VCC

V

Top

Operating Temperature

 

 

-55 to 125

°C

 

Input Rise and Fall Time

 

VCC = 2.0V

0 to 1000

ns

tr, tf

 

 

VCC = 4.5V

0 to 500

ns

 

 

 

VCC = 6.0V

0 to 400

ns

3/11

M74HC175

DC SPECIFICATIONS

 

 

 

Test Condition

 

 

 

 

Value

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

VCC

 

 

 

TA = 25°C

-40 to 85°C

-55 to 125°C

Unit

 

 

(V)

 

 

Min.

Typ.

Max.

Min.

Max.

Min.

Max.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

High Level Input

2.0

 

 

1.5

 

 

 

1.5

 

1.5

 

 

 

Voltage

4.5

 

 

3.15

 

 

 

3.15

 

3.15

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6.0

 

 

4.2

 

 

 

4.2

 

4.2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL

Low Level Input

2.0

 

 

 

 

 

0.5

 

0.5

 

0.5

 

 

Voltage

4.5

 

 

 

 

 

1.35

 

1.35

 

1.35

V

 

 

 

 

 

 

 

 

 

 

 

6.0

 

 

 

 

 

1.8

 

1.8

 

1.8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOH

High Level Output

2.0

 

IO=-20 μA

1.9

 

2.0

 

1.9

 

1.9

 

 

 

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

4.5

 

IO=-20 μA

4.4

 

4.5

 

4.4

 

4.4

 

 

 

 

 

 

 

 

 

 

 

 

6.0

 

IO=-20 μA

5.9

 

6.0

 

5.9

 

5.9

 

V

 

 

4.5

 

IO=-4.0 mA

4.18

 

4.31

 

4.13

 

4.10

 

 

 

 

6.0

 

IO=-5.2 mA

5.68

 

5.8

 

5.63

 

5.60

 

 

VOL

Low Level Output

2.0

 

IO=20 μA

 

 

0.0

0.1

 

0.1

 

0.1

 

 

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

4.5

 

IO=20 μA

 

 

0.0

0.1

 

0.1

 

0.1

 

 

 

 

 

 

 

 

 

 

 

6.0

 

IO=20 μA

 

 

0.0

0.1

 

0.1

 

0.1

V

 

 

4.5

 

IO=4.0 mA

 

 

0.17

0.26

 

0.33

 

0.40

 

 

 

6.0

 

IO=5.2 mA

 

 

0.18

0.26

 

0.33

 

0.40

 

II

Input Leakage

6.0

 

VI = VCC or GND

 

 

 

± 0.1

 

± 1

 

± 1

μA

 

Current

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICC

Quiescent Supply

6.0

 

VI = VCC or GND

 

 

 

4

 

40

 

80

μA

 

Current

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4/11

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