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■ HIGH SPEED :
f
= 62MHz (TYP.) at VCC=6V
MAX
■ LOW POWER DISSIPATION:
I
=4µA(MAX.) at TA=25°C
CC
■ HIGH NOISE IMMUNITY:
V
NIH=VNIL
■ SYMMETRICAL OUT PUT IMPEDANCE:
|I
|=IOL=4mA(MIN)
OH
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
■ WIDE OPERATING VOLTAGE RANGE:
V
(OPR) = 2V to 6V
CC
■ PIN AND FUNCTION COMPATIBLE WITH
=28%VCC(MIN.)
PHL
74 SERIES 164
DESCRIPTION
The M74HC164 is an high speed CMOS 8 BIT
SIPO SHIFT REG ISTER fabricated with silicon
gate C
2
MOS technology.
The M74HC164 is an 8 bi t shi ft register with seria l
data entry and an output from eac h of the eight
stages. Data is entered serially through oneoftwo
inputs (A or B), either of these inputs can be used
as an active high enable for data entry through t he
other input. An unused input must be high, or both
inputs connected together. Each low-to-high
M74HC164
8 BIT SIPO SHIFT REGISTER
TSSOPDIP SOP
ORDER CODES
PACKAGE TUBE T & R
DIP M74HC164B1R
SOP M74HC164M1R M74HC164RM13TR
TSSOP M74HC164TTR
transition on the clock inputs shifts data one place
to t he right and enters into QA the logic NAND of
the two data inputs (A
before the rising clock edge. A low level on the
clear i nput overrides all other inputs and clears the
register asynchronously, forcing all Q outputs low.
All inputs are equi pped with protection circuits
against static discharge and transient excess
voltage.
x B), the data that existed
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/13June 2003
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M74HC164
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
1,2 A, B Data Inputs
3, 4, 5, 6, 10,
11, 12, 13
8 CLOCK
9 CLEAR
7 GND Ground (0V)
14 Vcc Positive Supply Voltage
TRUTH TABLE
INPUTS OUTPUTS
QA to QH Outputs
Clock Input (LOW to
HIGH, Edge Triggered
Master Reset Input
CLEAR
L X X X L L ........... L
H X X NO CHANGE
H L X L QAn ........... QGn
H X L L QAn ........... QGn
H H H H QAn ........... QGn
X : Don’tCare
QAn - QGn : The level of QA - QG, respectively. before the most-recent transition of the clock
CLOCK
SERIAL IN
QA QB ........... QH
AB
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
2/13
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TIMING CHART
M74HC164
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
I
OK
I
or I
I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
Supply Voltage
CC
DC Input Voltage -0.5 to VCC+ 0.5
I
DC Output Voltage -0.5 to VCC+ 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCCor Ground Current
GND
Power Dissipation
D
Storage Temperature
stg
Lead Temperature (10 sec)
L
°C; derate to 300mW by 10mW/°Cfrom65°Cto85°C
-0.5 to +7 V
V
V
± 20 mA
± 20 mA
± 25 mA
± 50 mA
500(*) mW
-65 to +150 °C
300 °C
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M74HC164
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
T
t
r,tf
DC SPECIFICATIONS
Symbol Parameter
V
IH
V
IL
V
OH
V
OL
I
I
I
CC
Supply Voltage
CC
Input Voltage 0 to V
I
Output Voltage 0 to V
O
Operating Temperature
op
Input Rise and Fall Time VCC= 2.0V
= 4.5V
V
CC
= 6.0V
V
CC
Test Condition Value
= 25°C
T
A
Min. Typ. Max. Min. Max. Min. Max.
High Level Input
V
CC
(V)
2.0 1.5 1.5 1.5
Voltage
6.0 4.2 4.2 4.2
Low Level Input
2.0 0.5 0.5 0.5
Voltage
6.0 1.8 1.8 1.8
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage
Current
Quiescent Supply
Current
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
I
I
I
I
O
I
O
I
I
V
I=VCC
V
I=VCC
=-20 µA
O
=-20 µA
O
=-20 µA
O
=-4.0 mA
=-5.2 mA
=20 µA
I
O
=20 µA
I
O
I
=20 µA
O
=4.0 mA
O
=5.2 mA
O
or GND
or GND
1.9 2.0 1.9 1.9
4.4 4.5 4.4 4.4
5.9 6.0 5.9 5.9
4.18 4.31 4.13 4.10
5.68 5.8 5.63 5.60
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
0.17 0.26 0.33 0.40
0.18 0.26 0.33 0.40
± 0.1 ± 1 ± 1 µA
44080µA
2to6 V
CC
CC
-55 to 125 °C
0 to 1000 ns
0 to 500 ns
0 to 400 ns
-40 to 85°C -55 to 125°C
V
V
Unit
V4.5 3.15 3.15 3.15
V4.5 1.35 1.35 1.35
V
V
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