The M74HC164 is an high speed CMOS 8 BIT
SIPO SHIFT REG ISTER fabricated with silicon
gate C
2
MOS technology.
The M74HC164 is an 8 bi t shi ft register with seria l
data entry and an output from eac h of the eight
stages. Data is entered serially through oneoftwo
inputs (A or B), either of these inputs can be used
as an active high enable for data entry through t he
other input. An unused input must be high, or both
inputs connected together. Each low-to-high
M74HC164
8 BIT SIPO SHIFT REGISTER
TSSOPDIPSOP
ORDER CODES
PACKAGETUBET & R
DIPM74HC164B1R
SOPM74HC164M1RM74HC164RM13TR
TSSOPM74HC164TTR
transition on the clock inputs shifts data one place
to t he right and enters into QA the logic NAND of
the two data inputs (A
before the rising clock edge. A low level on the
clear i nput overrides all other inputs and clears the
register asynchronously, forcing all Q outputs low.
All inputs are equi pped with protection circuits
against static discharge and transient excess
voltage.
x B), the data that existed
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/13June 2003
M74HC164
INPUT AND OUTPUT EQUIVALENT CIRCUITPIN DESCRIPTION
PIN NoSYMBOLNAME AND FUNCTION
1,2A, BData Inputs
3, 4, 5, 6, 10,
11, 12, 13
8CLOCK
9CLEAR
7GNDGround (0V)
14VccPositive Supply Voltage
TRUTH TABLE
INPUTSOUTPUTS
QA to QHOutputs
Clock Input (LOW to
HIGH, Edge Triggered
Master Reset Input
CLEAR
LXXXLL...........L
HXXNO CHANGE
HLXLQAn...........QGn
HXLLQAn...........QGn
HHHHQAn...........QGn
X : Don’tCare
QAn - QGn : The level of QA - QG, respectively. before the most-recent transition of the clock
CLOCK
SERIAL IN
QAQB...........QH
AB
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
2/13
TIMING CHART
M74HC164
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
I
OK
I
or I
I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
Supply Voltage
CC
DC Input Voltage-0.5 to VCC+ 0.5
I
DC Output Voltage-0.5 to VCC+ 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCCor Ground Current
GND
Power Dissipation
D
Storage Temperature
stg
Lead Temperature (10 sec)
L
°C; derate to 300mW by 10mW/°Cfrom65°Cto85°C
-0.5 to +7V
V
V
± 20mA
± 20mA
± 25mA
± 50mA
500(*)mW
-65 to +150°C
300°C
3/13
M74HC164
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
V
V
T
t
r,tf
DC SPECIFICATIONS
SymbolParameter
V
IH
V
IL
V
OH
V
OL
I
I
I
CC
Supply Voltage
CC
Input Voltage0 to V
I
Output Voltage0 to V
O
Operating Temperature
op
Input Rise and Fall TimeVCC= 2.0V
= 4.5V
V
CC
= 6.0V
V
CC
Test ConditionValue
= 25°C
T
A
Min.Typ. Max.Min.Max. Min. Max.
High Level Input
V
CC
(V)
2.01.51.51.5
Voltage
6.04.24.24.2
Low Level Input
2.00.50.50.5
Voltage
6.01.81.81.8
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage
Current
Quiescent Supply
Current
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
I
I
I
I
O
I
O
I
I
V
I=VCC
V
I=VCC
=-20 µA
O
=-20 µA
O
=-20 µA
O
=-4.0 mA
=-5.2 mA
=20 µA
I
O
=20 µA
I
O
I
=20 µA
O
=4.0 mA
O
=5.2 mA
O
or GND
or GND
1.92.01.91.9
4.44.54.44.4
5.96.05.95.9
4.184.314.134.10
5.685.85.635.60
0.00.10.10.1
0.00.10.10.1
0.00.10.10.1
0.170.260.330.40
0.180.260.330.40
± 0.1± 1± 1µA
44080µA
2to6V
CC
CC
-55 to 125°C
0 to 1000ns
0 to 500ns
0 to 400ns
-40 to 85°C -55 to 125°C
V
V
Unit
V4.53.153.153.15
V4.51.351.351.35
V
V
4/13
AC ELECTRICAL CHARACTERISTICS (CL= 50 pF, Input tr=tf=6ns)
Test ConditionValue
= 25°C
SymbolParameter
t
TLHtTHL
t
PLHtPHL
t
PLHtPHL
f
t
W(H)
t
t
t
REM
Output Transition
Time
Propagation Delay
Time (CLOCK - Q)
Propagation Delay
Time (CLEAR
Maximum Clock
MAX
Frequency
Minimum Pulse
Width (CLOCK)
W(L)
Minimum Pulse
W(L)
Width (CLEAR
t
Set-up Time (A, B -
s
CK)
t
Hold Time (A, B -
h
CK)
Minimum Removal
Time
-Q)
)
V
CC
(V)
2.0307595110
6.07131619
2.057160200240
6.016273441
2.060175220265
6.017303745
2.06.2185.04.2
6.037623025
2.0247595110
6.05131619
2.0407595110
6.09131619
2.0506575
6.091113
2.0555
6.0555
2.0555
6.0555
T
A
Min.Typ. Max.Min.Max. Min. Max.
M74HC164
-40 to 85°C -55 to 125°C
Unit
ns4.58151922
ns4.519324048
ns4.520354453
MHz4.531532521
ns4.56151922
ns4.510151922
ns4.5101315
ns4.5555
ns4.5555
CAPACITIVE CHARACTERISTICS
Test ConditionValue
= 25°C
SymbolParameter
V
CC
(V)
C
C
1) CPDis defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
Input Capacitance
IN
Power Dissipation
PD
Capacitance (note1)5.099pF
5.05101010pF
T
A
-40 to 85°C -55 to 125°C
Min.Typ. Max.Min.Max. Min. Max.
CC(opr)=CPDxVCCxfIN+ICC
Unit
5/13
M74HC164
TEST CIRCUIT
CL= 50pF or equivalent (includes jig and probe capacitance)
R
T=ZOUT
WAVEFORM 1: MINIMUMPULSEWIDTH(CLEAR),MINIMUM REMOVAL TIME (CLEAR TO CLOC K)
(f=1MHz; 50% duty cycle)
of pulse generator (typically 50Ω)
6/13
M74HC164
WAVEFORM 2 : PROPAGATION DEL AY TIMES, M I NIMUM P UL S E WIDTH (CLOCK), S ETUP AND
HOLD TIME (A,B TO CLOCK) (f=1MHz ; 50% duty cycle)
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mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
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