M74HC123
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR
■ HIGH SPEED :
t
= 23 ns (TYP.) at VCC = 6V
PD
■ LOW POWER DISSIPATION:
STAND BY STATE :
I
=4µA (MAX.) at TA=25°C
CC
ACTIVE STATE :
I
=200µA (MAX.) at V
CC
■ HIGH NOISE IMMUNITY:
V
= V
NIH
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 4mA (MIN)
OH
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
■ WIDE OPERATING VOLTAGE RANGE:
V
(OPR) = 2V to 6V
CC
■ WIDE OUTPUT PULSE WIDTH RANGE :
t
WOUT
■ PIN AND FUNCTION COMPATIBLE WITH
= 28 % VCC (MIN.)
NIL
PHL
= 120 ns ~ 60 s OVER AT V
CC
= 5V
CC
= 4.5 V
74 SERIES 123
DESCRIPTION
The M74HC123 is an high speed CMOS
MONOSTABLE MULTIVIBRATOR fabricated with
silicon gate C
There are two trigger inputs, A
2
MOS technology.
INPUT (negative
edge) and B I NP UT (pos itive edg e). These inputs
are valid for slow rising/falling signals, (tr=tf=l sec).
The device may also be triggered by using the
CLR
input (positive-edge) because of the
Schmitt-trigger input; after triggering the output
maintains the MONOSTABLE state for the time
TSSOPDIP SOP
ORDER CODES
PACKAGE TUBE T & R
DIP M74HC123B1R
SOP M74HC123M1R M74HC123RM13TR
TSSOP M74HC123TTR
period determined by the ex ternal resistor Rx a nd
capacitor Cx. When Cx >
10nF and Rx > 10KΩ,
the output pulse width value is approsimatively
given by the formula : tW(OUT) = K · Cx · Rx.
(K
≅ 0.45).
Taking CLR
low breaks this MONOSTABLE
STATE. If the next trigger pul se oc curs du ring the
MONOSTABLE period it makes the
MONOSTABLE period longer. Limit for values of
Cx and Rx : Cx : NO LIMIT
Rx : V
V
< 3.0V 5KΩ to 1MΩ
cc
> 3.0V 1KΩ to 1MΩ
cc
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/12July 2001
M74HC123
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
1,9 1A
2, 10 1B, 2B
3, 11
4, 12 1Q
7
13, 5 1Q, 2Q Outputs (Active High)
14, 6
15
8 GND Ground (0V)
16 Vcc Positive Supply Voltage
TRUTH TABLE
, 2A
1 CLR
2 CLR
, 2Q Outputs (Active Low)
2R
X/CX
1C
X
2C
X
1R
X/CX
Trigger Inputs (Negative
Edge Triggered)
Trigger Inputs (Positive
Edge Triggered)
Direct Reset LOW and
trigger Action at Positive
Edge
External Resistor
Capacitor Connection
External Capacitor
Connection
External Resistor
Capacitor Connection
INPUTS OUTPUTS
A
BCLRQQ
H H OUTPUT ENABLE
X L H L H INHIBIT
H X H L H INHIBIT
L H OUTPUT ENABLE
L H OUTPUT ENABLE
X X L L H INHIBIT
X : Don’t Care
NOTE
2/12
SYSTEM DIAGRAM
M74HC123
This log i c diagram has not be used to estim at e propagation delays
TIMING CHART
3/12
M74HC123
BLOCK DIAGRAM
(1) Cx, Rx , Dx are extern al components.
(2) Dx is a clamping diode.
The external capacitor is charged to Vcc in the stand-by-stat e, i.e. no trigger. When the supply vol tage is turned off Cx is discharged mainly
trough an internal parasitic diode(see figures). If Cx is sufficiently large and Vcc decreases rapidly, there will be some possibility of damaging
the I.C. with a surge current or latch-up. If the volta ge supply filter capacitor is la rge enough and Vcc decrease s l owly, the surge cu rr ent is
automatically limited and damage to the I.C. is avoided. The maximum forward current of the parasitic diode is approximately 20 mA. In cases
where Cx is large the time taken for the supply voltage to fall to 0.4 Vcc can be calculated as follows :
t
> (Vcc - 0.7) x Cx/20mA
f
In cases where t
is too short an ext ernal clamping diode is required to prot ect the I.C. from t he surge current.
f
FUNCTIONAL DESCRIPTION
STAND-BY STATE
The external capacit or,Cx, is f ully charged t o Vcc
in the stand-by state. Hence, before triggering,
transistor Qp and Qn (connected to the Rx/Cx
node) are both turned-off. The two comparators
that control the timing and the two reference
voltage sources stop operating. The t otal supply
current is therefore only leakage current.
TRIGGER OPERATION
Triggering occurs when :
1 st) A is "LOW" and B has a falling edge;
2 nd) B is "HIGH" and A has a rising edge;
3 rd) A is "LOW" and B is HIGH and C1 has a
rising edge;
After the multivibrator has been retriggered
comparator C1 and C2 start operating and Q n is
turned on. Cx then discharges through Qn. The
voltage at the node R/C external falls.
When it reaches V
the output of comparat or
REFL
C1 becomes low. This in turn reset the flip-flop
and Qn is turned off.
At this point C1 stops functioning but C2 continues
to operate.
The voltage at R/C external begins to rise with a
time constant set by the external com ponents Rx,
Cx.
Triggering the multivibrator caus es Q to go high
after internal delay due to the flip-flop and the
gate. Q remains high until the voltage at R/C
external rises again to V
. At this point C2
REFH
output goes low and O goes low. C2 stop
operating. That means that a fter triggering when
the voltage R/C external returns to V
REFH
the
multivibrator has returned to its MONOSTABLE
STATE. In the case where Rx · Cx are large
enough and the discharge time of the capacitor
and the delay time in the I.C. can be ignored, t he
width of the output pulse tw (out) is as follows :
tW(OUT) = 0.45 Cx · Rx
RE - TRIGGERED OPERATION
When a second trigger pulse follows the first its
effect will depend on the state of the multivibrator.
If the capacitor Cx i s being charged t he voltage
level of R/C external falls to V
again and Q
REFL
remains High i.e. the retrigger pulse arrives in a
time shorter than the period Rx · Cx seconds, the
capacitor charging time constant. If the second
trigger pulse is very close to the initial trigger pulse
it is ineffective ; i.e. the second trigger must arrive
in the capacitor discharge cycle to be ineffective;
Hence the minimum time for a second trigger to be
effective depends on Vcc and Cx
RESET OPERATION
CL is normally high. If CL is low, the trigger is not
effective because Q output goes low and trigger
control f lip -f lo p is res et .
Also transistor Op is turned on and Cx is charged
quickly to Vcc. This means if CL input goes low the
IC becomes waiting state both in operating and
non operating state.
4/12