ST M68AW127B User Manual

M68AW127

M68AW127B

1Mbit (128K x8), 3.0V Asynchronous SRAM

FEATURES SUMMARY

 

SUPPLY VOLTAGE: 2.7 to 3.6V

Figure 1. Packages

128K x 8 bits SRAM with OUTPUT ENABLE

 

EQUAL CYCLE and ACCESS TIMES: 70ns

 

LOW STANDBY CURRENT

 

LOW VCC DATA RETENTION: 1.5V

 

TRI-STATE COMMON I/O

 

LOW ACTIVE and STANDBY POWER

SO32 (MC)

TSOP32 8 x 20 mm

(N)

TSOP32 8 x 13.4 mm

(NK)

August 2003

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M68AW127B

TABLE OF CONTENTS

SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Figure 5. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. SO Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 4. TSOP Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Figure 5. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 6. AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 7. AC Measurement Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 8. Address Controlled, Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 9. Chip Enable or Output Enable Controlled, Read Mode AC Waveforms. . . . . . . . . . . . . . . 9 Table 7. Read and Standby Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Write Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 11. Write Enable Controlled, Write AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 12. Chip Enable Controlled, Write AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 8. Write Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 13. E1 Controlled, Low VCC Data Retention AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 14. E2 Controlled, Low VCC Data Retention AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 9. Low VCC Data Retention Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

SO32 - 32 lead Plastic Small Outline, Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SO32 - 32 lead Plastic Small Outline, Package Mechanical Data. . . . . . . . . . . . . . . . . . . . . . . . . . 15 TSOP32 - 32 lead Plastic Small Outline 8x20mm, Package Outline. . . . . . . . . . . . . . . . . . . . . . . . 16 TSOP32 - 32 lead Plastic Small Outline 8x20mm, Package Mechanical Data . . . . . . . . . . . . . . . . 16 TSOP32 - 32 lead Plastic Small Outline 8x13.4mm, Package Outline . . . . . . . . . . . . . . . . . . . . . . 17 TSOP32 - 32 lead Plastic Small Outline 8x13.4mm, Package Mechanical Data . . . . . . . . . . . . . . 17

PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 13. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Table 14. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

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M68AW127B

SUMMARY DESCRIPTION

The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 2.7 to 3.6V supply.

This device has an automatic power-down feature, reducing the power consumption by over 99% when deselected.

The M68AW127B is available in SO32, TSOP32 8x20mm and TSOP32 8x13.4mm packages.

Figure 2. Logic Diagram

 

VCC

17

8

A0-A16

DQ0-DQ7

W

E1 M68AW127B

E2

G

VSS

AI05972b

Table 1. Signal Names

 

A0-A16

Address Inputs

 

 

 

 

DQ0-DQ7

Data Input/Output

 

 

 

 

 

 

 

 

 

 

Chip Enable

 

E1

 

 

 

 

 

E2

Chip Enable

 

 

 

 

 

 

 

 

 

Output Enable

 

G

 

 

 

 

 

 

 

 

Write Enable

 

W

 

 

 

 

 

VCC

Supply Voltage

 

VSS

Ground

 

 

 

 

 

 

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M68AW127B

Figure 3. SO Connections

 

 

 

 

 

VCC

NC

1

 

32

 

A16

 

 

 

 

A15

A14

 

 

 

 

E2

A12

 

 

 

 

 

 

 

 

 

 

 

 

W

 

 

A7

 

 

 

 

A13

A6

 

 

 

 

A8

A5

 

 

 

 

A9

A4

8

M68AW127B

25

 

A11

 

9

24

 

 

 

 

 

 

A3

 

G

 

 

A2

 

 

 

 

A10

A1

 

 

 

 

 

 

 

 

 

E1

 

A0

 

 

 

 

DQ7

DQ0

 

 

 

 

DQ6

DQ1

 

 

 

 

DQ5

DQ2

 

 

 

 

DQ4

VSS

16

 

17

 

DQ3

 

 

AI05931b

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4/20

Figure 4. TSOP Connections

 

 

 

 

 

 

 

 

 

 

 

 

A11

1

 

 

 

32

 

G

A9

 

 

 

 

 

 

A10

A8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E1

 

A13

 

 

 

 

 

 

DQ7

 

 

 

 

 

 

 

 

DQ6

 

W

 

 

 

 

 

 

 

E2

 

 

 

 

 

 

DQ5

A15

 

 

 

 

 

 

DQ4

VCC

8

M68AW127B

25

 

DQ3

NC

9

24

 

VSS

 

 

 

 

A16

 

 

 

 

 

 

DQ2

A14

 

 

 

 

 

 

DQ1

A12

 

 

 

 

 

 

DQ0

A7

 

 

 

 

 

 

A0

A6

 

 

 

 

 

 

A1

A5

 

 

 

 

 

 

A2

A4

16

 

 

 

17

A3

 

 

 

 

 

 

AI05973c

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ST M68AW127B User Manual

M68AW127B

Figure 5. Block Diagram

 

A16

 

 

 

ROW

MEMORY

 

DECODER

 

ARRAY

 

A7

 

 

 

DQ7

I/O CIRCUITS

 

 

 

 

COLUMN

 

 

DECODER

 

DQ0

 

 

E1

Ex

 

 

E2

 

 

 

 

 

A0

A6

W

 

 

 

G

 

 

 

 

 

 

AI05471

MAXIMUM RATING

Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is

Table 2. Absolute Maximum Ratings

not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

Symbol

Parameter

Value

Unit

 

 

 

 

IO (1)

Output Current

20

mA

 

TA

Ambient Operating Temperature

–55 to 125

°C

TSTG

Storage Temperature

–65 to 150

°C

VCC

Supply Voltage

–0.3 to 4.6

V

V

(2)

Input or Output Voltage

–0.5 to VCC +0.5

V

 

IO

 

 

 

 

PD

Power Dissipation

1

W

Note: 1. One output at a time, not to exceed 1 second duration. 2. Up to a maximum operating VCC of 3.6V only.

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M68AW127B

DC AND AC PARAMETERS

This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC Characteristic tables are derived from tests performed under the Measure-

ment Conditions listed in the relevant tables. Designers should check that the operating conditions in their projects match the measurement conditions when using the quoted parameters.

Table 3. Operating and AC Measurement Conditions

Parameter

M68AW127B

 

 

VCC Supply Voltage

2.7 to 3.6V

 

 

 

Ambient Operating Temperature

Range 1

0 to 70°C

 

 

Range 6

–40 to 85°C

 

 

 

 

Load Capacitance (CL)

100pF

 

 

Output Circuit Protection Resistance (R1)

3.0kΩ

 

 

Load Resistance (R2)

3.1kΩ

 

 

Input Rise and Fall Times

1ns/V

 

 

Input Pulse Voltages

0 to VCC

 

 

Input and Output Timing Ref. Voltages

VCC/2

 

 

Output Transition Timing Ref. Voltages

VRL = 0.3VCC; VRH = 0.7VCC

Figure 6. AC Measurement I/O Waveform

Figure 7. AC Measurement Load Circuit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

I/O Timing Reference Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

R1

VCC/2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DEVICE

 

 

 

 

 

 

 

 

 

 

 

0V

 

 

 

UNDER

 

 

 

 

 

 

 

 

 

 

OUT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TEST

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Output Transition Timing Reference Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R2

 

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

0.7VCC

 

 

 

 

 

 

 

 

 

 

 

 

0V

 

 

 

 

0.3VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AI04831

 

 

CL includes JIG capacitance

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AI05814

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6/20

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