The dev ice requires the 3-STATE control i nput G
to be set high to place the output into the high
impedance state.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
DESCRIPTION
The M54HC125 is an high speed CMOS QUAD
BUFFER (3-STATE) fabricated with silicon gate
2
C
MOS technology.
PIN CONNECTION
1/9March 2004
M54HC125
IEC LOGIC SYMBOLS
INPUT AND O UTPUT EQUIVALENT CIRCUITPIN DESCRIPTION
PIN N°SYMBOLNAME AND FUNCTION
1, 4, 10, 131G
2, 5, 9, 121A TO 4AData Inputs
3, 6, 8, 111Y TO 4YData Outputs
7GNDGround (0V)
14
TO 4GOutput Enable Input
V
CC
Positive Supply Voltage
TRUTH TABLE
AG
XHZ
LLL
HLH
Y
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
I
OK
I
or I
I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Supply Voltage
CC
DC Input Voltage-0.5 to VCC+0.5
I
DC Output Voltage-0.5 to VCC+0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCCor Ground Current
GND
Power Dissipation
D
Storage Temperature
stg
Lead Temperature (10 sec)
L
-0.5 to +7V
V
V
± 20mA
± 20mA
± 35mA
± 70mA
420mW
-65 to +150°C
265°C
2/9
M54HC125
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
V
V
T
t
r,tf
DC SPECIFICATIONS
SymbolParameter
V
IH
V
IL
V
OH
V
OL
I
I
I
OZ
I
CC
Supply Voltage
CC
Input Voltage0 to V
I
Output Voltage0 to V
O
Operating Temperature
op
Input Rise and Fall TimeVCC=2.0V
=4.5V
V
CC
V
=6.0V
CC
Test ConditionValue
= 25°C
T
A
Min.Typ.Max. Min.Max. Min. Max.
High Level Input
V
CC
(V)
2.01.51.51.5
Voltage
6.04.24.24.2
Low Level Input
2.00.50.50.5
Voltage
6.01.81.81.8
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage
Current
High Impedance
Output Leakage
Current
Quiescent Supply
Current
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
6.0
IO=-20 µA
=-20 µA
I
O
I
=-20 µA
O
I
=-6.0 mA
O
=-7.8 mA
I
O
IO=20 µA
I
=20 µA
O
=20 µA
I
O
=6.0 mA
I
O
=7.8 mA
I
O
I=VIH
or GND
or V
IL
V
I=VCC
V
VO=VCCor GND
V
I=VCC
or GND
1.92.01.91.9
4.44.54.44.4
5.96.05.95.9
4.184.314.134.10
5.685.85.635.60
0.00.10.10.1
0.00.10.10.1
0.00.10.10.1
0.170.260.330.40
0.180.260.330.40
± 0.1± 1± 1µA
± 0.5± 5± 10µA
44080µA
2to6V
CC
CC
-55 to 125°C
0 to 1000ns
0 to 500ns
0 to 400ns
-40 to 85°C -55 to 125°C
V
V
Unit
V4.53.153.153.15
V4.51.351.351.35
V
V
3/9
M54HC125
AC ELECTRICAL CHARACTERISTICS (Input tr=tf=6ns)
Test ConditionValue
SymbolParameter
t
TLHtTHL
t
PLHtPHL
t
PZLtPZH
Output Transition
Time
Propagation Delay
Time
High Impedance
Output Enable
Time
t
PLZtPHZ
High Impedance
Output Disable
Time
C
V
CC
(V)
L
(pF)
2.0
50
6.05101315
2.0
50
6.08131619
2.0
150
6.011182227
2.0
50
L
=1KΩ
R
6.08131619
2.0
R
150
=1KΩ
L
6.011182227
2.0
R
50
=1KΩ
L
6.010141720
T
Min.Typ.Max. Min.Max.Min.Max.
= 25°C
A
-40 to 85°C -55 to 125°C
20607590
367595110
52105130160
367595110
52105130160
4880100120
Unit
ns4.56121518
ns4.59151922
ns4.513212632
ns4.59151922
ns4.513212632
ns4.512162024
CAPACITIVE CHARACTERISTICS
Test ConditionValue
= 25°C
SymbolParameter
V
CC
(V)
C
C
1) CPDis defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by thefollowing equation.I
Input Capacitance
IN
Power Dissipation
PD
Capacitance (note1)5.035pF
5.05101010pF
T
A
-40 to 85°C -55 to 125°C
Min.Typ.Max. Min.Max.Min.Max.
CC(opr)=CPDxVCCxfIN+ICC
/4(per buffer)
Unit
4/9
TEST CIRCUIT
TESTSWITCH
t
PLH,tPHL
t
PZL,tPLZ
t
PZH,tPHZ
CL= 50pF/150pF or equivalent (includes jig and probe capacitance)
=1KΩ or equivalent
R
1
R
T=ZOUT
of pulse generator (typically 50Ω))
M54HC125
Open
V
CC
GND
WAVEFORM 1: PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
5/9
M54HC125
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle)
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