ST M41T94 User Manual
Serial real-time clock with 44 bytes NVRAM and reset
Features
■ Counters for tenths/hundredths of seconds,
seconds, minutes, hours, day, date, month,
year, and century
■ 32 KHz crystal oscillator integrating load
capacitance (12.5 pF) providing exceptional
oscillator stability and high crystal series
resistance operation
■ Serial peripheral interface (2 MHz SPI)
■ Ultralow battery supply current of 500 nA (max)
■ 2.7 to 5.5 V operating voltage
■ 2.5 to 5.5 V oscillator operating voltage
■ Battery low flag
■ Automatic switchover and deselect circuitry
■ 44 bytes of general purpose RAM
■ Programmable alarm and interrupt function
(valid even during battery backup mode)
■ Accurate programmable watchdog timer (from
62.5 ms to 128 s)
■ Microprocessor power-on reset
■ Choice of power-fail deselect voltages
(V
= 2.7 to 5.5 V):
CC
–THS = V
–THS = V
■ Packaging includes a 28-lead SOIC and
SNAPHAT
16-lead SOIC
■ 28-lead SOIC package provides direct
connection for a SNAPHAT
contains the battery and crystal
■ RoHS compliant
– Lead-free second level interconnect
; 2.55 V ≤ V
SS
; 4.20 V ≤ V
CC
®
top (to be ordered separately) or
≤ 2.70 V
PFD
≤ 4.50 V
PFD
®
top which
M41T94
16
1
SO16 (MQ)
SNAPHAT® (SH)
battery & crystal
28
1
SOH28 (MH)
January 2009 Rev 6 1/41
www.st.com
1
Contents M41T94
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.1 Serial data output (SDO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2 Serial data input (SDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3 Serial clock (SCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.4 Chip enable (E
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1 SPI bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2 Read and write cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3 Data retention mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4 Clock operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 Power-down time-stamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 Clock registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.3 Setting alarm clock registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.4 Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.5 Square wave output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.6 Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.7 Reset inputs (RSTIN1
4.8 Calibrating the clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
& RSTIN2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.9 Century bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.10 Output driver pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.11 Battery low warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.12 t
4.13 Initial power-on defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
REC
5 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2/41
M41T94 Contents
8 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
9 Environmental information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
10 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3/41
List of figures M41T94
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. 16-pin SOIC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. 28-pin SOIC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. Data and clock timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Input timing requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. Output timing requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Read mode sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. Write mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Alarm interrupt reset waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 12. Backup mode alarm waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 13. RSTIN1
Figure 14. Crystal accuracy across temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 15. Calibration waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 16. AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 17. Power down/up mode AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 18. SO16 – 16-lead plastic small outline package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 19. SOH28 – 28-lead plastic small outline, battery SNAPHAT
Figure 20. SH – 4-pin SNAPHAT
Figure 21. SH – 4-pin SNAPHAT
Figure 22. Recycling symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
and RSTIN2 timing waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
®
®
housing for 48 mAh battery & crystal, package outline. . . . . . . . . 35
®
housing for 120 mAh battery & crystal, package outline. . . . . . . . 36
, package outline . . . . . . . . . . 34
4/41
M41T94 List of tables
List of tables
Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 2. Function table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 3. AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 4. Clock register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 5. Alarm repeat mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 6. Square wave output frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 7. Reset AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 8. t
Table 9. Default values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 10. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 11. DC and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 12. Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 13. DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 14. Crystal electrical characteristics (externally supplied) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 15. Power down/up AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 16. SO16 – 16-lead plastic small outline package mechanical data. . . . . . . . . . . . . . . . . . . . . 33
Table 17. SOH28 – 28-lead plastic small outline, battery SNAPHAT
Table 18. SH – 4-pin SNAPHAT
Table 19. SH – 4-pin SNAPHAT
Table 20. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 21. SNAPHAT
Table 22. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
REC
®
®
housing for 48 mAh battery & crystal, package mechanical data. 35
®
housing for 120 mAh battery & crystal, package mech. data . . . . 36
®
battery table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
, package mechanical data . . 34
5/41
Description M41T94
1 Description
The M41T94 is a serial real-time clock with 44 bytes of NVRAM and a RESET output. A
built-in 32,768 Hz oscillator (external crystal controlled) and 8 bytes of the SRAM (see
Table 4 on page 18) are used for the clock/calendar function and are configured in binary
coded decimal (BCD) format.
An additional 12 bytes of RAM provide status/control of alarm, watchdog and square wave
functions. Addresses and data are transferred serially via a serial SPI interface. The built-in
address register is incremented automatically after each WRITE or READ data byte. The
M41T94 has a built-in power sense circuit which detects power failures and automatically
switches to the battery supply when a power failure occurs. The energy needed to sustain
the SRAM and clock operations can be supplied by a small lithium button-cell supply when a
power failure occurs. Functions available to the user include a non-volatile, time-of-day
clock/calendar, alarm interrupts, watchdog timer and programmable square wave output.
Other features include a power-on reset as well as two additional debounced inputs
(RSTIN1
address locations contain the century, year, month, date, day, hour, minute, second and
tenths/hundredths of a second in 24-hour BCD format. Corrections for 28, 29 (leap year valid until year 2100), 30 and 31 day months are made automatically. The ninth clock
address location controls user access to the clock information and also stores the clock
software calibration setting.
and RSTIN2) which can also generate an output reset (RST). The eight clock
The M41T94 is supplied in either a 16-lead plastic SOIC (requiring user supplied crystal and
battery) or a 28-lead SOIC SNAPHAT
in a single SNAPHAT top). The 28-pin, 330 mil SOIC provides sockets with gold plated
contacts at both ends for direct connection to a separate SNAPHAT housing containing the
battery and crystal. The unique design allows the SNAPHAT battery/crystal package to be
mounted on top of the SOIC package after the completion of the surface mount process.
Insertion of the SNAPHAT housing after reflow prevents potential battery and crystal
damage due to the high temperatures required for device surface-mounting. The SNAPHAT
housing is also keyed to prevent reverse insertion.
The SOIC and battery/crystal packages are shipped separately in plastic anti-static tubes or
in tape & reel form. For the 28-lead SOIC, the battery/crystal package (e.g., SNAPHAT) part
number is “M4TXX-BR12SH” (see Table 21 on page 37).
Caution: Do not place the SNAPHAT battery/crystal top in conductive foam, as this will drain the
lithium button-cell battery.
®
package (which integrates both crystal and battery
6/41
M41T94 Description
Figure 1. Logic diagram
(1)
XI
(1)
XO
SCL
SDI
E
RSTIN1
RSTIN2
WDI
THS
1. For SO16 package only.
Figure 2. 16-pin SOIC connections
V
CC
M41T94
V
SS
V
BAT
(1)
RST
IRQ/FT/OUT
SQW
SDO
AI03683
XI V
1
XO
RST
WDI
RSTIN1
RSTIN2
V
BAT
V
SS
2
3
4
5
6
7
8
M41T94
16
15
14
13
12
11
10
9
AI03684
CC
E
IRQ/FT/OUT
THS
SDI
SQW
SCL
SDO
7/41
Description M41T94
Table 1. Signal names
E Chip enable
/FT/OUT
IRQ
RST
RSTIN1
Interrupt/frequency test/out
output (open drain)
Reset output (open drain)
Reset 1 input
RSTIN2
Reset 2 input
SCL Serial clock input
SDI Serial data input
SDO Serial data output
SQW Square wave output
THS Threshold select pin
WDI Watchdog input
(1)
XI
(1)
XO
(1)
V
BAT
V
CC
V
SS
1. For SO16 package only.
Oscillator input
Oscillator output
Battery supply voltage
Supply voltage
Ground
Figure 3. 28-pin SOIC connections
SQW V
NC
NC
NC
NC
NC
NC
WDI
RSTIN1
RSTIN2
NC
NC
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
M41T94
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AI03685
CC
E
IRQ/FT/OUT
NC
NC
THS
NC
NC
SCL
NC
RST
SDINC
SDO
NC
8/41
M41T94 Description
Figure 4. Block diagram
E
SDO
SDI
SCL
Crystal
WDI
V
CC
RSTIN1
RSTIN2
1. Open drain output
V
BAT
SPI
INTERFACE
32KHz
OSCILLATOR
VBL= 2.5V
V
SO
V
PFD
= 2.5V
= 4.4V
(2.65V if THS = VSS)
COMPARE
COMPARE
COMPARE
REAL TIME CLOCK
CALENDAR
44 BYTES
USER RAM
RTC w/ALARM
& CALIBRATION
WATCHDOG
SQUARE WAVE
BL
POR
AF
WDF
IRQ/FT/OUT
SQW
(1)
RST
AI04785
(1)
Figure 5. Hardware hookup
SPI Interface with
(CPOL, CPHA)
('0','0') or ('1','1')
Master
(ST6, ST7, ST9,
ST10, Others)
CS3
CS2
1. CPOL (clock polarity) and CPHA (clock phase) are bits that may be set in the SPI control register of the MCU.
(1)
=
CS1
D
Q
C
CQD
M41T94
E
CQD
XXXXX
E E
CQD
XXXXX
AI03686
9/41
Description M41T94
Table 2. Function table
Mode E SCL SDI SDO
Disable reset H Input disabled Input disabled High Z
WRITE L Data bit latch High Z
AI04630
READ L X Next data bit shift
AI04631
1. SDO remains at High Z until eight bits of data are ready to be shifted out during a READ.
Figure 6. Data and clock timing
CPOL
CPHA
0
1
0
1
C
C
(1)
SDI
SDO
MSB
MSB
LSB
LSB
AI04632
10/41
M41T94 Signal description
2 Signal description
2.1 Serial data output (SDO)
The output pin is used to transfer data serially out of the memory. Data is shifted out on the
falling edge of the serial clock.
2.2 Serial data input (SDI)
The input pin is used to transfer data serially into the device. Instructions, addresses, and
the data to be written, are each received this way. Input is latched on the rising edge of the
serial clock.
2.3 Serial clock (SCL)
The serial clock provides the timing for the serial interface (as shown in Figure 7 on page 13
and Figure 8 on page 14). The W/R bit, addresses, or data are latched, from the input pin,
on the rising edge of the clock input. The output data on the SDO pin changes state after the
falling edge of the clock input.
The M41T94 can be driven by a microcontroller with its SPI peripheral running in either of
the two following modes:
● (CPOL, CPHA) = ('0', '0') or
● (CPOL, CPHA) = ('1', '1').
For these two modes, input data (SDI) is latched in by the low-to-high transition of clock
SCL, and output data (SDO) is shifted out on the high-to-low transition of SCL (see Ta bl e 2
on page 10 and Figure 6 on page 10).
2.4 Chip enable (E)
When E is high, the memory device is deselected, and the SDO output pin is held in its high
impedance state. After power-on, a high-to-low transition on E
any operation.
is required prior to the start of
11/41
Operation M41T94
3 Operation
The M41T94 clock operates as a slave device on the SPI serial bus. Each memory device is
accessed by a simple serial interface that is SPI bus compatible. The bus signals are SCL,
SDI and SDO (see Table 1 on page 8 and Figure 5 on page 9). The device is selected when
the chip enable input (E
in and out of the chip. The most significant bit is presented first, with the data input (SDI)
sampled on the first rising edge of the clock (SCL) after the chip enable (E
bytes contained in the device can then be accessed sequentially in the following order:
st
● 1
● 2
● 3
● 4
● 5
● 6
● 7
● 8
● 9
● 10
● 11
● 17
● 20
● 21
byte: tenths/hundredths of a second register
nd
byte: seconds register
rd
byte: minutes register
th
byte: century/hours register
th
byte: day register
th
byte: date register
th
byte: month register
th
byte: year register
th
byte: control register
th
byte: watchdog register
th
- 16th bytes: Alarm registers
th
- 19th bytes: reserved
th
byte: square wave register
st
- 64th bytes: user RAM
) is held low. All instructions, addresses and data are shifted serially
) goes low. The 64
The M41T94 clock continually monitors V
fall below V
, the device terminates an access in progress and resets the device address
PFD
for an out-of tolerance condition. Should VCC
CC
counter. Inputs to the device will not be recognized at this time to prevent erroneous data
from being written to the device from a an out-of-tolerance system. When V
V
, the device automatically switches over to the battery and powers down into an ultra low
SO
current mode of operation to conserve battery life. As system power returns and V
above V
Write protection continues until V
, the battery is disconnected, and the power supply is switched to external VCC.
SO
reaches V
CC
(min) plus t
PFD
(min). For more
REC
falls below
CC
CC
rises
information on battery storage life refer to application note AN1012.
12/41
M41T94 Operation
3.1 SPI bus characteristics
The serial peripheral interface (SPI) bus is intended for synchronous communication
between different ICs. It consists of four signal lines: serial data input (SDI), serial data
output (SDO), serial clock (SCL) and a chip enable (E
By definition a device that gives out a message is called “transmitter,” the receiving device
that gets the message is called “receiver.” The device that controls the message is called
“master.” The devices that are controlled by the master are called “slaves.”
The E
input is used to initiate and terminate a data transfer. The SCL input is used to
synchronize data transfer between the master (micro) and the slave (M41T94) devices.
The SCL input, which is generated by the microcontroller, is active only during address and
data transfer to any device on the SPI bus (see Figure 5 on page 9).
The M41T94 can be driven by a microcontroller with its SPI peripheral running in either of
the two following modes:
● (CPOL, CPHA) = ('0', '0') or
● (CPOL, CPHA) = ('1', '1').
For these two modes, input data (SDI) is latched in by the low-to-high transition of clock
SCL, and output data (SDO) is shifted out on the high-to-low transition of SCL (see Ta bl e 2
on page 10 and Figure 6 on page 10).
).
There is one clock for each bit transferred. Address and data bits are transferred in groups
of eight bits. Due to memory size the second most significant address bit is a Don’t Care
(address bit 6).
Figure 7. Input timing requirements
E
tELCH
SCL
tDVCH
SDI
SDO
MSB IN
HIGH IMPEDANCE
tCHDX
tDLDH
tDHDL
tCHEH
tCLCH
tEHEL
tEHCH
tCHCL
LSB IN
AI04633
13/41
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