ST M27C512 User Manual
查询27C512供应商
512 Kbit (64K x8) UV EPROM and OTP EPROM
FEATURES SUMMARY
■ 5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
■ ACCESS TIME: 45ns
■ LOW POWER “CMOS” CONSUMPTION:
– Active Current 30mA
– Standby Current 100µA
■ PROGRAMMI NG VOLTAGE: 12.75V ± 0.25V
■ PROGRAMMING TIMES of AROUND 6sec.
■ ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: 3Dh
■ PACKAGES
– Lead-Free Versions
M27C512
Figure 1. Packages
28
1
FDIP28W (F)
28
PLCC32 (C)
TSOP28 (N)
8 x 13.4 mm
1
PDIP28 (B)
1/22November 2004
M27C512
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3. DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 4. LCC Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 5. TSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
DEVICE OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Electronic Signature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Two Line Output Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
System Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 6. Programming Flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
PRESTO IIB Programming Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Program Verify. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
ERASURE OPERATION (APPLIES FOR UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 4. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
DC and AC PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 5. AC Measurement Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Testing Input Output Waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8. AC Testing Load Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 6. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 7. Read Mode DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 8. Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 9. Read Mode AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 10. Programming Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 11. Margin Mode AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10.Margin Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 12. Programming Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11.Programming and Verify Modes AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/22
M27C512
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 12.FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Outline. . . . . . . . . . . . 16
Table 13. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data . . . . 16
Figure 13.PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Outline . . . . . . . . . . . . . . . . . . . . 17
Table 14. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Mechanical Data . . . . . . . . . . . . 17
Figure 14.PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline . . . . . . . . . . . . . . . . . 18
Table 15. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data . . . . . . . . . . 18
Figure 15.TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Outline . . . . . . . . 19
Table 16. TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Mechanical Data 19
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 17. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 18. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3/22
M27C512
SUMMARY DESCRIPTION
The M27C512 is a 512 Kbit EPROM offered in the
two ranges UV (ultra vio let erase) and OTP (o ne
time programmable). It is ideally suited for applications where fast turn-around and pattern experimentation are important requirements and is
organized as 65536 by 8 bits.
The FDIP28W (window ceramic frit-seal package)
has transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C512 is offered in PDIP28, PLCC32 and
TSOP28 (8 x 13.4 mm) packages.
In addition to the standard versions, the packages
are also available in Lead-free versions, in compliance with JEDEC Std J-STD-020 B, the ST ECOPACK 7191395 Specification, and the RoHS
(Restriction of Hazardous Substances) directive.
Figure 2. Logic Diagram
V
CC
16
A0-A15
GV
E
PP
M27C512
V
SS
8
Q0-Q7
AI00761B
Table 1. Signal Names
A0-A15 Address Inputs
Q0-Q7 Data Outputs
E
G
V
V
NC
DU
V
CC
SS
PP
Chip Enable
Output Enable / Progra m Sup pl y
Supply Voltage
Ground
Not Connected Internally
Don’t Use
4/22
M27C512
Figure 3. DIP Connections
1
A15 V
2
A12
A7
3
A6
4
A5
5
A4
6
A3
7
M27C512
8
A2
A1
9
A0
10
Q0
11
12
Q2
13
14
SS
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AI00762
CC
A14
A13
A8
A9
A11
GV
A10
E
Q7
Q6
Q5Q1
Q4
Q3V
PP
Figure 5. TSOP Connections
GV
A11
A13
A14
V
A15
A12
PP
A9
A8
CC
A7
A6
A5
A4
A3
22
28
M27C512
1
78
21
15
14
AI00764B
A10
E
Q7
Q6
Q5
Q4
Q3
V
SS
Q2
Q1
Q0
A0
A1
A2
Figure 4. LCC Connections
A15
A6
A5
A4
A3
A2
A1
A0
NC
Q0
A7
9
Q1
DU
A12
1
M27C512
17
Q2
SS
DU
V
32
CC
V
Q3
A14
Q4
A13
25
Q5
A8
A9
A11
NC
GV
A10
E
Q7
Q6
AI00763
PP
5/22
M27C512
DEVICE OPERATION
The modes of operations of the M27C512 are listed in the Operating Modes table. A single power
supply is required in the read mode. All inputs are
TTL levels except for G
Electronic Signature.
Read Mode
The M27C512 has two cont rol functions, both of
which must be logically active in order to obtain
data at the outputs. Chip E nable (E
control and shou ld be used for device selecti on.
Output Enable (G
) is the output control and should
be used to gate data to the output pins, indepen dent of device selection. Assuming that the ad-
Table 2. Operating Modes
Mode E
Read
Output Disable
Program
Program Inhibit
Standby
Electronic Signature
Note: X = VIH or VIL, VID = 12V ± 0.5V.
VPP and 12V on A9 for
) is the power
V
IL
V
IL
VIL Pulse V
V
IH
V
IH
V
IL
dresses are stable, the address access time
(t
) is equal to the delay from E to output
AVQV
). Data i s availa ble at t he output after a delay
(t
ELQV
of t
has been low and the addresses have been sta-
E
ble for at least t
from the falling edge of G , as sumi ng that
GLQV
AVQV-tGLQV
.
Standby Mode
The M27C512 has a standby mode which reduces
the active current from 30mA to 100µA The
M27C512 is placed in the standby mode by applying a CMOS high signal to the E
input. When in the
standby mode, the outputs are in a high impedance state, independent of the G
GV
PP
V
IL
V
IH
PP
V
PP
XXHi-Z
V
IL
A9 Q7-Q0
X Data Out
XHi-Z
XData In
XHi-Z
V
ID
VPP input.
Codes
Table 3. Electronic Signature
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code
Device Code
V
IL
V
IH
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line control function which accommodates the use of multiple memory connection. The two line control
function allows:
a. the lowest possible memory power
dissipation,
b. complete assurance that output bus
contention will not occur.
For the most efficient use of these two control
lines, E
should be decoded and used as the primary device selecting function, while G
made a common connect ion to all devices in the
array and connected to the READ
system control bus. This ensures that all deselected memory devices are in their low power standby
mode and that the output pins are only active
00100000 20h
00111101 3Dh
when data is required from a particular memory
device.
System Considerations
The power switch ing characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply c urrent, I
CC
ments that are of interest to the system desi gner:
the standby current level, th e active cu rrent le vel,
and transient current peak s that are produced b y
the falling and rising edges of E
. The magnitude of
the transient current peaks is dependent on the
capacitive and inducti ve loading of the device at
should be
line from the
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceramic capacitor be used on every device between V
and VSS. This should be a high freq uency capacitor of low inherent inductance and should be
placed as close to the device as possible. In addi-
, has three seg-
CC
6/22
M27C512
tion, a 4.7µF b ulk electroly tic capacitor should be
used between V
and VSS for every eight devic -
CC
es. The bulk ca pac ito r s hou ld be located near the
power supply connection point.The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
Figure 6. Programming Flowchart
VCC = 6.25V, VPP = 12.75V
SET MARGIN MODE
n = 0
E = 100µs Pulse
NO
NO
VERIFY
YES
Last
NO
Addr
YES
RESET MARGIN MODE
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
++ Addr
AI00738B
YES
++n
= 25
FAIL
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27C512 are in the '1'
state. Data is introduc ed by selectively programming '0's into the desired bit locations. Although
only '0's will be programmed, both '1's and '0's can
be present in the data word. The only way to
change a '0' to a '1' is by die exposure to ultraviolet
light (UV EPROM). The M27C512 is in the programming mode when V
is pulsed to VIL. The data to be programmed is
E
input is at 12.75V a nd
PP
applied to 8 bits in parallel to the data output pins.
The levels required for the address and data inputs are TTL. V
is specified to be 6.25V ±
CC
0.25V. The M27C512 can use P RESTO IIB Programming Algorithm that drastically reduces the
programming time (typi c ally les s tha n 6 secon d s).
Nevertheless to achieve c ompati bility with all p rogramming equipments, PRESTO Programming
Algorithm can be used as well.
PRESTO IIB Programming Algorithm
PRESTO IIB Programming Algorithm allows the
whole array to be programmed wi th a guarante ed
margin, in a typical time of 6.5 seconds. This can
be achieved with STMicroelectronics M27C512
due to several design innovations described in the
M27C512 datasheet to improve programming efficiency and to provide adequate margin for reliability. Before starting the programming the internal
MARGIN MODE circuit is set in order to guarantee
that each cell is programmed with enough margin.
Then a sequence of 100µs program pulses are applied to each byte until a correct veri fy occurs. No
overprogram pulses are applied since the verify in
MARGIN MODE provides the necessary margin.
Program Inhibit
Programming of multiple M27C512s in parallel
with different data is also easily accomplished. Except for E
, all like inputs including GVPP of the pa rallel M27C512 may be common . A TTL low level
pulse applied to a M27C512's E
input, with VPP at
12.75V, will program that M27C512. A high level E
input inhibits the other M27C512s from being programmed.
Program Verify
A verify (read) should be performed on the programmed bits to determine that they were correctly progra m me d. T he ve r i fy i s ac co mp l is he d w ith G
at VIL. Data should be verified with t
falling edge of E
.
ELQV
after the
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacture r and type. This mode
is intended for use by programm ing equip ment to
automatica lly m atc h th e de vice t o be prog ra mmed
with its corresponding programming algorithm.
The ES mode is functional in the 25° C ± 5°C ambient temperature range that is required when programming the M27C512. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
M27C512. Two identifier bytes may then be sequenced from the device ou tputs by toggling address line A0 from V
lines must be he ld at V
ture mode. Byte 0 (A0 = V
ufacturer code and byte 1 (A0 = V
to VIH. All other address
IL
during Electronic Signa-
IL
) represents the man-
IL
) the device
IH
identifier code. For the STMicroelectronics
M27C512, these two identif ier bytes are given in
Table 3. and can be read-out on outputs Q7 to Q0.
7/22
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