ST LRIS64K User Manual

LRIS64K
Wafer (SBN18)
64 Kbit EEPROM tag IC at 13.56 MHz with 64-bit UID and
password based on ISO/IEC 15693 and ISO/IEC 18000-3 Mode 1
Features
Based on ISO/IEC 15693 and
ISO/IEC 18000-3 mode 1 standards
To tag: 10% or 100% ASK modulation using
1/4 (26 Kbit/s) or 1/256 (1.6 Kbit/s) pulse position coding
From tag: load modulation using Manchester
coding with 423 kHz and 484 kHz subcarriers in low (6.6 Kbit/s) or high (26 Kbit/s) data rate mode. Supports the 53 Kbit/s data rate with Fast commands
Internal tuning capacitor (27.5 pF)
More than 1 million write cycles
More than 40-year data retention
64 Kbit EEPROM organized into 2048 blocks of
32 bits
64-bit unique identifier (UID)
Multipassword protection
Read Block & Write (32-bit blocks)
Write time: 5.75 ms including the internal verify
October 2011 Doc ID 15336 Rev 11 1/100
www.st.com
1
Contents LRIS64K
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2 User memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3 System memory area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1 LRIS64K RF block security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2 Example of the LRIS64K security protection . . . . . . . . . . . . . . . . . . . . . . 17
4 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.1 Initial dialogue for vicinity cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1.1 Power transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1.2 Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1.3 Operating field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6 Communication signal from VCD to LRIS64K . . . . . . . . . . . . . . . . . . . 21
7 Data rate and data coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.1 Data coding mode: 1 out of 256 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.2 Data coding mode: 1 out of 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.3 VCD to LRIS64K frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.4 Start of frame (SOF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8 Communications signal from LRIS64K to VCD . . . . . . . . . . . . . . . . . . 27
8.1 Load modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.2 Subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.3 Data rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
9 Bit representation and coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9.1 Bit coding using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9.1.1 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9.1.2 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
9.2 Bit coding using two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
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9.3 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
9.4 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
10 LRIS64K to VCD frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
10.1 SOF when using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
10.2 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
10.3 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
10.4 SOF when using two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
10.5 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
10.6 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
10.7 EOF when using one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
10.8 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
10.9 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
10.10 EOF when using two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
10.11 High data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
10.12 Low data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
11 Unique identifier (UID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
12 Application family identifier (AFI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
13 Data storage format identifier (DSFID) . . . . . . . . . . . . . . . . . . . . . . . . . 37
13.1 CRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
14 LRIS64K protocol description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
15 LRIS64K states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
15.1 Power-off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
15.2 Ready state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
15.3 Quiet state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
15.4 Selected state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
16 Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
16.1 Addressed mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
16.2 Non-addressed mode (general request) . . . . . . . . . . . . . . . . . . . . . . . . . 42
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16.3 Select mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
17 Request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
17.1 Request flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
18 Response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
18.1 Response flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
18.2 Response error code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
19 Anticollision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
19.1 Request parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
20 Request processing by the LRIS64K . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
21 Explanation of the possible cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
22 Inventory Initiated command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
23 Timing definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
23.1 t1: LRIS64K response delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
23.2 t2: VCD new request delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
23.3 t
: VCD new request delay in the absence of a response from
3
the LRIS64K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
24 Commands codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
24.1 Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
24.2 Stay Quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
24.3 Read Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
24.4 Write Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
24.5 Read Multiple Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
24.6 Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
24.7 Reset to Ready . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
24.8 Write AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
24.9 Lock AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
24.10 Write DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
24.11 Lock DSFID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
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24.12 Get System Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
24.13 Get Multiple Block Security Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
24.14 Write-sector Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
24.15 Lock-sector Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
24.16 Present-sector Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
24.17 Fast Read Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
24.18 Fast Inventory Initiated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
24.19 Fast Initiate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
24.20 Fast Read Multiple Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
24.21 Inventory Initiated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
24.22 Initiate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
25 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
26 RF DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
27 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Appendix A Anticollision algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
A.1 Algorithm for pulsed slots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Appendix B CRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
B.1 CRC error detection method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
B.2 CRC calculation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Appendix C Application family identifier (AFI). . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Doc ID 15336 Rev 11 5/100
List of tables LRIS64K
List of tables
Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 2. Sector details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 3. Sector security status byte area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 4. Sector security status byte organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 5. Read / Write protection bit setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 6. Password Control bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 7. Password system area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 8. Sector security protection after power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 9. Sector security protection after a valid presentation of password 1 . . . . . . . . . . . . . . . . . . 17
Table 10. 10% modulation parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 11. Response data rates. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 12. UID format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 13. CRC transmission rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 14. VCD request frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 15. LRIS64K Response frame format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 16. LRIS64K response depending on Request_flags. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 17. General request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 18. Definition of request flags 1 to 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 19. Request flags 5 to 8 when Bit 3 = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 20. Request flags 5 to 8 when Bit 3 = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 21. General response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 22. Definitions of response flags 1 to 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 23. Response error code definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 24. Inventory request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 25. Example of the addition of 0-bits to an 11-bit mask value . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 26. Timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 27. Command codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 28. Inventory request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 29. Inventory response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 30. Stay Quiet request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 31. Read Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 32. Read Single Block response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . 57
Table 33. Sector security status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 34. Read Single Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 35. Write Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 36. Write Single Block response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . 59
Table 37. Write Single Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 38. Read Multiple Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 39. Read Multiple Block response format when Error_flag is NOT set. . . . . . . . . . . . . . . . . . . 61
Table 40. Sector security status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 41. Read Multiple Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . 62
Table 42. Select request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 43. Select Block response format when Error_flag is NOT set. . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 44. Select response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 45. Reset to Ready request format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 46. Reset to Ready response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . 64
Table 47. Reset to ready response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 48. Write AFI request format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6/100 Doc ID 15336 Rev 11
LRIS64K List of tables
Table 49. Write AFI response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 50. Write AFI response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 51. Lock AFI request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 52. Lock AFI response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 53. Lock AFI response format when Error_flag is set. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 54. Write DSFID request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 55. Write DSFID response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 56. Write DSFID response format when Error_flag is set. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 57. Lock DSFID request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 58. Lock DSFID response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 59. Lock DSFID response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 60. Get System Info request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table 61. Get System Info response format when Error_flag is NOT set. . . . . . . . . . . . . . . . . . . . . . 73
Table 62. Get System Info response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table 63. Get Multiple Block Security Status request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 64. Get Multiple Block Security Status response format when Error_flag is NOT set . . . . . . . 75
Table 65. Sector security status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 66. Get Multiple Block Security Status response format when Error_flag is set . . . . . . . . . . . . 76
Table 67. Write-sector Password request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 68. Write-sector Password response format when Error_flag is NOT set . . . . . . . . . . . . . . . . 77
Table 69. Write-sector Password response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . 77
Table 70. Lock-sector Password request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 71. Sector security status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 72. Lock-sector Password response format when Error_flag is NOT set . . . . . . . . . . . . . . . . . 79
Table 73. Lock-sector Password response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . . 79
Table 74. Present-sector Password request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 75. Present-sector Password response format when Error_flag is NOT set . . . . . . . . . . . . . . 81
Table 76. Present-sector Password response format when Error_flag is set . . . . . . . . . . . . . . . . . . . 81
Table 77. Fast Read Single Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Table 78. Fast Read Single Block response format when Error_flag is NOT set . . . . . . . . . . . . . . . . 83
Table 79. Sector security status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Table 80. Fast Read Single Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . . 83
Table 81. Fast Inventory Initiated request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Table 82. Fast Inventory Initiated response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Table 83. Fast Initiate request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 84. Fast Initiate response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 85. Fast Read Multiple Block request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 86. Fast Read Multiple Block response format when Error_flag is NOT set. . . . . . . . . . . . . . . 87
Table 87. Sector security status if Option_flag is set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 88. Fast Read Multiple Block response format when Error_flag is set . . . . . . . . . . . . . . . . . . . 88
Table 89. Inventory Initiated request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 90. Inventory Initiated response format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 91. Initiate request format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 92. Initiate Initiated response format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 93. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 94. RF AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 95. RF DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 96. Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 97. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Table 98. CRC definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Table 99. AFI coding. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Table 100. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Doc ID 15336 Rev 11 7/100
List of figures LRIS64K
List of figures
Figure 1. Pad connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 2. Memory sector organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 3. 100% modulation waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 4. 10% modulation waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 5. 1 out of 256 coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 6. Detail of a time period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 7. 1 out of 4 coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 8. 1 out of 4 coding example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 9. SOF to select 1 out of 256 data coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 10. SOF to select 1 out of 4 data coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 11. EOF for either data coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 12. Logic 0, high data rate, one subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 13. Logic 0, high data rate, one subcarriers x2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 14. Logic 1, high data rate, one subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 15. Logic 1, high data rate, one subcarriers x2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 16. Logic 0, low data rate, one subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 17. Logic 0, low data rate, one subcarriers x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 18. Logic 1, low data rate, one subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 19. Logic 1, low data rate, one subcarriers x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 20. Logic 0, high data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 21. Logic 1, high data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 22. Logic 0, low data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 23. Logic 1, low data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 24. Start of frame, high data rate, one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 25. Start of frame, high data rate, one subcarrier x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 26. Start of frame, low data rate, one subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 27. Start of frame, low data rate, one subcarrier x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 28. Start of frame, high data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 29. Start of frame, low data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 30. End of frame, high data rate, one subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 31. End of frame, high data rate, one subcarriers x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 32. End of frame, low data rate, one subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 33. End of frame, low data rate, one subcarriers x2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 34. End of frame, high data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 35. End of frame, low data rate, two subcarriers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 36. LRIS64K decision tree for AFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 37. LRIS64K protocol timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 38. LRIS64K state transition diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 39. Principle of comparison between the mask, the slot number and the UID . . . . . . . . . . . . . 48
Figure 40. Description of a possible anticollision sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 41. Stay Quiet frame exchange between VCD and LRIS64K. . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 42. Read Single Block frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . . . . 58
Figure 43. Write Single Block frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . . . . 60
Figure 44. Read Multiple Block frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . . . 62
Figure 45. Select frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Figure 46. Reset to Ready frame exchange between VCD and LRIS64K. . . . . . . . . . . . . . . . . . . . . . 64
Figure 47. Write AFI frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 48. Lock AFI frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
8/100 Doc ID 15336 Rev 11
LRIS64K List of figures
Figure 49. Write DSFID frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 50. Lock DSFID frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 51. Get System Info frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . . . . . . 74
Figure 52. Get Multiple Block Security Status frame exchange between VCD and LRIS64K . . . . . . . 76
Figure 53. Write-sector Password frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . 78
Figure 54. Lock-sector Password frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . 80
Figure 55. Present-sector Password frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . 82
Figure 56. Fast Read Single Block frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . 84
Figure 57. Fast Initiate frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 58. Fast Read Multiple Block frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . 88
Figure 59. Initiate frame exchange between VCD and LRIS64K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Figure 60. LRIS64K synchronous timing, transmit and receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Doc ID 15336 Rev 11 9/100
Description LRIS64K
AI15689
AC1
AC0
Power
Supply
Regulator
Manchester
Load
Modulator
ASK
Demodulator
64 Kbit
EEPROM
memory

1 Description

The LRIS64K is a contactless memory powered by the received carrier electromagnetic wave, which follows the ISO/IEC 15693 and ISO/IEC 18000-3 mode 1 recommendation for radio-frequency power and signal interface. It is a 64 Kbit electrically erasable programmable memory (EEPROM). The memory is organized as 64 sectors divided into 32 blocks of 32 bits.
The LRIS64K is accessed via the 13.56 MHz carrier electromagnetic wave, on which incoming data are demodulated from the received signal amplitude modulation (ASK: amplitude shift keying). The received ASK wave is 10% or 100% modulated with a data rate of 1.6 Kbit/s using the 1/256 pulse coding mode, or a data rate of 26 Kbit/s using the 1/4 pulse coding mode. Outgoing data are generated by the LRIS64K load variation using Manchester coding with one or two subcarrier frequencies at 423 kHz and 484 kHz. Data are transferred from the LRIS64K at 6.6 Kbit/s in low data rate mode and 26 Kbit/s in high data rate mode. The LRIS64K supports the 53 Kbit/s data rate in high data rate mode with a single subcarrier frequency of 423 kHz.
The LRIS64K also features a unique 32-bit multi-password protection scheme.
Figure 1. Pad connection
Table 1. Signal names
Signal name Function Direction
AC0 Antenna coil I/O
AC1 Antenna coil I/O
10/100 Doc ID 15336 Rev 11
LRIS64K User memory organization
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AI

2 User memory organization

The LRIS64K is divided into 64 sectors of 32 blocks of 32 bits as shown in Tab l e 2 . Figure 2 shows the memory sector organization. Each sector can be individually read- and/or write­protected using a specific password command. Read and write operations are possible if the addressed data are not in a protected sector.
The LRIS64K also has a 64-bit block that is used to store the 64-bit unique identifier (UID). The UID is compliant with the ISO/IEC 15963 description, and its value is used during the anticollision sequence (Inventory). This block is not accessible by the user and its value is written by ST on the production line.
The LRIS64K includes an AFI register that stores the application family identifier, and a DSFID register that stores the data storage family identifier used in the anticollision algorithm.
The LRIS64K has three additional 32-bit blocks that store the RF password codes.
Figure 2. Memory sector organization

Sector details

The LRIS64K user memory is divided into 64 sectors. Each sector contains 1024 bits. The protection scheme is described in Section 3: System memory area.
A sector provides 32 blocks of 32 bits. Each read and write access are done by block. Read and write block accesses are controlled by a Sector Security Status byte that defines the access rights to all the 32 blocks contained in the sector. If the sector is not protected, a Write command updates the complete 32 bits of the selected block.
Doc ID 15336 Rev 11 11/100
User memory organization LRIS64K
Table 2. Sector details
Sector
number
0
RF block
address
Bits [31:24] Bits [23:16] Bits [15:8] Bits [7:0]
0 user user user user
1 user user user user
2 user user user user
3 user user user user
4 user user user user
5 user user user user
6 user user user user
7 user user user user
8 user user user user
9 user user user user
10 user user user user
11 user user user user
12 user user user user
13 user user user user
14 user user user user
15 user user user user
16 user user user user
17 user user user user
18 user user user user
19 user user user user
20 user user user user
21 user user user user
22 user user user user
23 user user user user
24 user user user user
25 user user user user
26 user user user user
27 user user user user
28 user user user user
29 user user user user
30 user user user user
31 user user user user
12/100 Doc ID 15336 Rev 11
LRIS64K User memory organization
Table 2. Sector details (continued)
Sector
number
1
... ... ... ... ... ...
RF block
address
32 user user user user
33 user user user user
34 user user user user
35 user user user user
36 user user user user
37 user user user user
38 user user user user
39 user user user user
... ... ... ... ...
2016 user user user user
2017 user user user user
2018 user user user user
2019 user user user user
2020 user user user user
2021 user user user user
2022 user user user user
Bits [31:24] Bits [23:16] Bits [15:8] Bits [7:0]
63
2023 user user user user
2024 user user user user
2025 user user user user
2026 user user user user
2027 user user user user
2028 user user user user
2029 user user user user
2030 user user user user
2031 user user user user
2032 user user user user
2033 user user user user
2034 user user user user
2035 user user user user
2036 user user user user
2037 user user user user
2038 user user user user
2039 user user user user
Doc ID 15336 Rev 11 13/100
User memory organization LRIS64K
Table 2. Sector details (continued)
Sector
number
63 continued
RF block
address
2040 user user user user
2041 user user user user
2042 user user user user
2043 user user user user
2044 user user user user
2045 user user user user
2046 user user user user
2047 user user user user
Bits [31:24] Bits [23:16] Bits [15:8] Bits [7:0]
14/100 Doc ID 15336 Rev 11
LRIS64K System memory area

3 System memory area

3.1 LRIS64K RF block security

The LRIS64K provides a special protection mechanism based on passwords. Each memory sector of the LRIS64K can be individually protected by one out of three available passwords, and each sector can also have Read/Write access conditions set.
Each memory sector of the LRIS64K is assigned with a Sector security status byte including a Sector Lock bit, two Password Control bits and two Read/Write protection bits as shown in
Ta bl e 4 . Ta b le 3 describes the organization of the Sector security status byte which can be
read using the Read Single Block and Read Multiple Block commands with the Option_flag set to ‘1’.
On delivery, the default value of the SSS bytes is reset to 00h.
Table 3. Sector security status byte area
RF address Bits [31:24] Bits [23:16] Bits [15:8] Bits [7:0]
0 SSS 3 SSS 2 SSS 1 SSS 0
128 SSS 7 SSS 6 SSS 5 SSS 4
256 SSS 11 SSS 10 SSS 9 SSS 8
384 SSS 15 SSS 14 SSS 13 SSS 12
512 SSS 19 SSS 18 SSS 17 SSS 16
640 SSS 23 SSS 22 SSS 21 SSS 20
768 SSS 27 SSS 26 SSS 25 SSS 24
896 SSS 31 SSS 30 SSS 29 SSS 28
1024 SSS 35 SSS 34 SSS 33 SSS 32
1152 SSS 39 SSS 38 SSS 37 SSS 36
1280 SSS 43 SSS 42 SSS 41 SSS 40
1408 SSS 47 SSS 46 SSS 45 SSS 44
1536 SSS 51 SSS 50 SSS 49 SSS 48
1664 SSS 55 SSS 54 SSS 53 SSS 52
1792 SSS 59 SSS 58 SSS 57 SSS 56
1920 SSS 63 SSS 62 SSS 61 SSS 60
Table 4. Sector security status byte organization
b
7
0 0 0 Password Control bits
b
6
b
5
b
4
b
3
b
2
Read / Write protection
bits
b
1
b
0
Sector
Lock
Doc ID 15336 Rev 11 15/100
System memory area LRIS64K
When the Sector Lock bit is set to ‘1’, for instance by issuing a Lock-sector Password command, the 2 Read/Write protection bits (b
, b2) are used to set the Read/Write access of
1
the sector as described in Ta b l e 5 .
Table 5. Read / Write protection bit setting
Sector
Lock
, b
b
2
Sector access when password
1
presented
Sector access when password not
presented
0 xx Read Write Read Write
1 00 Read Write Read No Write
1 01 Read Write Read Write
1 10 Read Write No Read No Write
1 11 Read No Write No Read No Write
The next 2 bits of the Sector security status byte (b3, b4) are the Password Control bits. The value these two bits is used to link a password to the sector as defined in Ta b le 6 .
Table 6. Password Control bits
b4, b
3
Password
00 The sector is not protected by a Password
01 The sector is protected by the Password 1
10 The sector is protected by the Password 2
11 The sector is protected by the Password 3
The LRIS64K password protection is organized around a dedicated set of commands plus a system area of three password blocks where the password values are stored. This system area is described in Ta b le 7 .
Table 7. Password system area
Add 0 7 8 15 16 23 24 31
1 Password 1
2 Password 2
3 Password 3
The dedicated password commands are:
Write-sector Password
The Write-sector Password command is used to write a 32-bit block into the password system area. This command must be used to update password values. After the write cycle, the new password value is automatically activated. It is possible to modify a password value after issuing a valid Present-sector Password command. On delivery, the three default password values are set to 0000 0000h and are activated.
Lock-sector Password
The Lock-sector Password command is used to set the Sector security status byte of the selected sector. Bits b
16/100 Doc ID 15336 Rev 11
to b1 of the Sector security status byte are affected by the
4
LRIS64K System memory area
Lock-sector Password command. The Sector Lock bit, b0, is set to ‘1’ automatically. After issuing a Lock-sector Password command, the protection settings of the selected sector are activated. The protection of a locked block cannot be changed. A Lock­sector Password command sent to a locked sector returns an error code.
Present-sector Password
The Present-sector Password command is used to present one of the three passwords to the LRIS64K in order to modify the access rights of all the memory sectors linked to that password (Tab l e 5 ) including the password itself. If the presented password is correct, the access rights remain activated until the tag is powered off or until a new Present-sector Password command is issued. If the presented password value is not correct, all the access rights of all the memory sectors are deactivated.

3.2 Example of the LRIS64K security protection

Ta bl e 8 and Ta ble 9 show the sector security protections before and after a valid Present-
sector Password command. Ta bl e 8 shows the sector access rights of an LRIS64K after power-up. After a valid Present-sector Password command with password 1, the memory sector access is changed as shown in Ta b le 9 .
Table 8. Sector security protection after power-up
Sector address
0 Protection: Standard Read No Write xxx 00001
1 Protection: Pswd 1 Read No Write xxx 01001
2 Protection: Pswd 1 Read Write xxx 01011
3 Protection: Pswd 1 No Read No Write xxx 01101
4 Protection: Pswd 1 No Read No Write xxx 01111
Table 9. Sector security protection after a valid presentation of password 1
Sector address
0 Protection: Standard Read No Write xxx 0 0 0 0 1
1 Protection: Pswd 1 Read Write xxx 0 1 0 0 1
2 Protection: Pswd 1 Read Write xxx 0 1 0 1 1
3 Protection: Pswd 1 Read Write xxx 0 1 1 0 1
4 Protection: Pswd 1 Read No Write xxx 0 1 1 1 1
Sector security status byte
b
7b6b5b4b3b2b1b0
Sector security status byte
b
7b6b5b4b3b2b1b0
Doc ID 15336 Rev 11 17/100
Initial delivery state LRIS64K

4 Initial delivery state

The device is delivered with the following factory settings:
All bits in the memory array are set to 1 (each byte contains FFh).
The default value of the SSS bytes is reset to 00h.
The three default password values are set to 0000 0000h and are activated.
System parameters are set to:
(E0 02 xx xx xx xx xx xx )h for UID
(03 07 FF)h for Memory Size
00h for AFI
00h for DSFID
18/100 Doc ID 15336 Rev 11
LRIS64K Commands

5 Commands

The LRIS64K supports the following commands:
Inventory, used to perform the anticollision sequence.
Stay Quiet, used to put the LRIS64K in quiet mode, where it does not respond to any
inventory command.
Select, used to select the LRIS64K. After this command, the LRIS64K processes all
Read/Write commands with Select_flag set.
Reset To Ready, used to put the LRIS64K in the ready state.
Read Block, used to output the 32 bits of the selected block and its locking status.
Write Block, used to write the 32-bit value in the selected block, provided that it is not
locked.
Read Multiple Blocks, used to read the selected blocks and send back their value.
Write AFI, used to write the 8-bit value in the AFI register.
Lock AFI, used to lock the AFI register.
Write DSFID, used to write the 8-bit value in the DSFID register.
Lock DSFID, used to lock the DSFID register.
Get System Info, used to provide the system information value
Get Multiple Block Security Status, used to send the security status of the selected
block.
Initiate, used to trigger the tag response to the Inventory Initiated sequence.
Inventory Initiated, used to perform the anticollision sequence triggered by the Initiate
command.
Write-sector Password, used to write the 32 bits of the selected password.
Lock-sector Password, used to write the Sector security status bits of the selected
sector.
Present-sector Password, enables the user to present a password to unprotect the
user blocks linked to this password.
Fast Initiate, used to trigger the tag response to the Inventory Initiated sequence.
Fast Inventory Initiated, used to perform the anticollision sequence triggered by the
Initiate command.
Fast Read Single Block, used to output the 32 bits of the selected block and its
locking status.
Fast Read Multiple Blocks, used to read the selected blocks and send back their
value.
Doc ID 15336 Rev 11 19/100
Commands LRIS64K

5.1 Initial dialogue for vicinity cards

The dialog between the vicinity coupling device (VCD) and the vicinity integrated circuit Card or VICC (LRIS64K) takes place as follows:
activation of the LRIS64K by the RF operating field of the VCD.
transmission of a command by the VCD.
transmission of a response by the LRIS64K.
These operations use the RF power transfer and communication signal interface described below (see Power transfer, Frequency and Operating field). This technique is called RTF (Reader Talk First).

5.1.1 Power transfer

Power is transferred to the LRIS64K by radio frequency at 13.56 MHz via coupling antennas in the LRIS64K and the VCD. The RF operating field of the VCD is transformed on the LRIS64K antenna to an AC Voltage which is rectified, filtered and internally regulated. The amplitude modulation (ASK) on this received signal is demodulated by the ASK demodulator.

5.1.2 Frequency

The ISO/IEC 15693 standard defines the carrier frequency (fC) of the operating field as
13.56 MHz ±7 kHz.

5.1.3 Operating field

The LRIS64K operates continuously between H
The minimum operating field is H
The maximum operating field is H
A VCD shall generate a field of at least H volume.
and H
min
and has a value of 150 mA/m rms.
min
and has a value of 5 A/m rms.
max
and not exceeding H
min
max
.
max
in the operating
20/100 Doc ID 15336 Rev 11
LRIS64K Communication signal from VCD to LRIS64K
105%
a
95%
5%
60%
Carrier
Amplitude
t
t
2
t
1
t
3
t
4
Min (µs)
t1
6,0 t2 2,1 t3
0
Max (µs)
9,44
t1
4,5
t4
0 0,8
b
The clock recovery shall be operational after t
4
max.
ai15793

6 Communication signal from VCD to LRIS64K

Communications between the VCD and the LRIS64K takes place using the modulation principle of ASK (Amplitude Shift Keying). Two modulation indexes are used, 10% and 100%. The LRIS64K decodes both. The VCD determines which index is used.
The modulation index is defined as [a – b]/[a + b] where a is the peak signal amplitude and b, the minimum signal amplitude of the carrier frequency.
Depending on the choice made by the VCD, a “pause” will be created as described in
Figure 3 and Figure 4.
The LRIS64K is operational for any degree of modulation index from between 10% and 30%.
Figure 3. 100% modulation waveform
Table 10. 10% modulation parameters
Symbol Parameter definition Value
hr 0.1 x (a – b) Max
hf 0.1 x (a – b) Max
Doc ID 15336 Rev 11 21/100
Communication signal from VCD to LRIS64K LRIS64K
Figure 4. 10% modulation waveform
Carrier
Carrier
Amplitude
Amplitude
a
a
b
b
t1
t1
t1 t2 3,0 µs
t2 3,0 µs
t2 3,0 µs t3 0
t3 0
t3 0
Modulation
Modulation
Modulation
Index
Index
Index
The VICC shall be operational for any value of modulation index between 10 % and 30 %.
y
y
Min
Min
Min
6,0 µs
6,0 µs
6,0 µs
10%
10%
10%
t1
t1
t2
t2
Max
Max
Max
9,44 µs
9,44 µs
9,44 µs
t1
t1
t1
4,5 µs
4,5 µs
4,5 µs
30%
30%
30%
t3
t3
y
y
hr
hr
y 0,05 (a -b)
y 0,05 (a -b)
y 0,05 (a -b)
hf, hr 0,1 ( a-b) max
hf, hr 0,1 ( a-b) max
hf, hr 0,1 ( a-b) max
hf
hf
ai15794
t
t
22/100 Doc ID 15336 Rev 11
LRIS64K Data rate and data coding
AI06656
0 1 2 3 . . . . . . . . 2 . . . . . . . . . . . . . . . . . . . . . 2 2 2 2
. . . . . . . . . 2 . . . . . . . . . . . . . . . . . . . . . 5 5 5 5
. . . . . . . . . 5 . . . . . . . . . . . . . . . . . . . . . 2 3 4 5
4.833 ms
18.88 µs
9.44 µs
Pulse Modulated Carrier

7 Data rate and data coding

The data coding implemented in the LRIS64K uses pulse position modulation. Both data coding modes that are described in the ISO/IEC15693 are supported by the LRIS64K. The selection is made by the VCD and indicated to the LRIS64K within the start of frame (SOF).

7.1 Data coding mode: 1 out of 256

The value of one single byte is represented by the position of one pause. The position of the pause on 1 of 256 successive time periods of 18.88 µs (256/f byte. In this case the transmission of one byte takes 4.833 ms and the resulting data rate is
1.65 kbits/s (f
/8192).
C
Figure 5 illustrates this pulse position modulation technique. In this figure, data E1h (225
decimal) is sent by the VCD to the LRIS64K.
The pause occurs during the second half of the position of the time period that determines the value, as shown in Figure 6.
A pause during the first period transmits the data value 00h. A pause during the last period transmit the data value FFh (255 decimal).
), determines the value of the
C
Figure 5. 1 out of 256 coding mode
Doc ID 15336 Rev 11 23/100
Data rate and data coding LRIS64K
AI06657
2 2 5
18.88 µs
9.44 µs
Pulse Modulated Carrier
2 2 6
2 2 4
. . . . . . .. . . . . . .
Time Period
one of 256
Figure 6. Detail of a time period

7.2 Data coding mode: 1 out of 4

The value of 2 bits is represented by the position of one pause. The position of the pause on 1 of 4 successive time periods of 18.88 µs (256/f successive pairs of bits form a byte, where the least significant pair of bits is transmitted first.
In this case the transmission of one byte takes 302.08 µs and the resulting data rate is 26.48 Kbits/s (f
Figure 8 shows the transmission of E1h (225d - 1110 0001b) by the VCD.
/512). Figure 7 illustrates the 1 out of 4 pulse position technique and coding.
C
), determines the value of the 2 bits. Four
C
24/100 Doc ID 15336 Rev 11
LRIS64K Data rate and data coding
AI06658
9.44 µs 9.44 µs
75.52 µs
28.32 µs 9.44 µs
75.52 µs
47.20µs 9.44 µs
75.52 µs
66.08 µs 9.44 µs
75.52 µs
Pulse position for "00"
Pulse position for "11"
Pulse position for "10" (0=LSB)
Pulse position for "01" (1=LSB)
AI06659
75.52µs75.52µs 75.52µs 75.52µs
00
10
01 11
Figure 7. 1 out of 4 coding mode
Figure 8. 1 out of 4 coding example
Doc ID 15336 Rev 11 25/100
Data rate and data coding LRIS64K
AI06661
37.76µs
9.44µs
9.44µs
37.76µs
AI06660
37.76µs
9.44µs
9.44µs
37.76µs
9.44µs
AI06662
9.44µs
37.76µs
9.44µs

7.3 VCD to LRIS64K frames

Frames are delimited by a start of frame (SOF) and an end of frame (EOF). They are implemented using code violation. Unused options are reserved for future use.
The LRIS64K is ready to receive a new command frame from the VCD 311.5 µs (t sending a response frame to the VCD.
The LRIS64K takes a power-up time of 0.1 ms after being activated by the powering field. After this delay, the LRIS64K is ready to receive a command frame from the VCD.

7.4 Start of frame (SOF)

The SOF defines the data coding mode the VCD is to use for the following command frame. The SOF sequence described in Figure 9 selects the 1 out of 256 data coding mode. The SOF sequence described in Figure 10 selects the 1 out of 4 data coding mode. The EOF sequence for either coding mode is described in Figure 11.
Figure 9. SOF to select 1 out of 256 data coding mode
) after
2
Figure 10. SOF to select 1 out of 4 data coding mode
Figure 11. EOF for either data coding mode
26/100 Doc ID 15336 Rev 11
LRIS64K Communications signal from LRIS64K to VCD

8 Communications signal from LRIS64K to VCD

The LRIS64K has several modes defined for some parameters, owing to which it can operate in different noise environments and meet different application requirements.

8.1 Load modulation

The LRIS64K is capable of communication to the VCD via an inductive coupling area whereby the carrier is loaded to generate a subcarrier with frequency f generated by switching a load in the LRIS64K.
The load-modulated amplitude received on the VCD antenna must be of at least 10mV when measured as described in the test methods defined in International Standard ISO/IEC10373-7.

8.2 Subcarrier

The LRIS64K supports the one-subcarrier and two-subcarrier response formats. These formats are selected by the VCD using the first bit in the protocol header. When one subcarrier is used, the frequency f When two subcarriers are used, the frequency f is 484.28 kHz (f continuous phase relationship between f
of the subcarrier load modulation is 423.75 kHz (fC/32).
S1
/28). When using the two-subcarrier mode, the LRIS64K generates a
C
and fS2.
S1
is 423.75 kHz (fC/32), and frequency fS2
S1
. The subcarrier is
S

8.3 Data rates

The LRIS64K can respond using the low or the high data rate format. The selection of the data rate is made by the VCD using the second bit in the protocol header. It also supports the x2 mode available on all the Fast commands. Ta bl e 1 1 shows the different data rates produced by the LRIS64K using the different response format combinations.
Table 11. Response data rates
Data rate One subcarrier Two subcarriers
Standard commands 6.62 Kbit/s (f
Low
Fast commands 13.24 Kbit/s (f
Standard commands 26.48 Kbit/s (f
High
Fast commands 52.97 Kbit/s (f
/2048) 6.67 Kbit/s (fc/2032)
c
/1024) not applicable
c
/512) 26.69 Kbit/s (fc/508)
c
/256) not applicable
c
Doc ID 15336 Rev 11 27/100
Bit representation and coding LRIS64K
37.76µs
ai12076
18.88µs
ai12066
37.76µs
ai12077
18.88µs
ai12067

9 Bit representation and coding

Data bits are encoded using Manchester coding, according to the following schemes. For the low data rate, same subcarrier frequency or frequencies is/are used, in this case the number of pulses is multiplied by 4 and all times will increase by this factor. For the Fast commands using one subcarrier, all pulse numbers and times are divided by 2.

9.1 Bit coding using one subcarrier

9.1.1 High data rate

A logic 0 starts with 8 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of
18.88 µs as shown in Figure 12.
Figure 12. Logic 0, high data rate, one subcarriers
For the fast commands, a logic 0 starts with 4 pulses at 423.75 kHz (f
/32) followed by an
C
unmodulated time of 9.44 µs as shown in Figure 13.
Figure 13. Logic 0, high data rate, one subcarriers x2
A logic 1 starts with an unmodulated time of 18.88 µs followed by 8 pulses at 423.75 kHz (f
/32) as shown in Figure 14.
C
Figure 14. Logic 1, high data rate, one subcarriers
For the Fast commands, a logic 1 starts with an unmodulated time of 9.44 µs followed by 4 pulses of 423.75 kHz (f
/32) as shown in Figure 15.
C
Figure 15. Logic 1, high data rate, one subcarriers x2
28/100 Doc ID 15336 Rev 11
LRIS64K Bit representation and coding
151.04µs
ai12068
75.52µs
ai12069
151.04µs
ai12070
75.52µs
ai12071

9.1.2 Low data rate

A logic 0 starts with 32 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of
75.52 µs as shown in Figure 16.
Figure 16. Logic 0, low data rate, one subcarriers
For the Fast commands, a logic 0 starts with 16 pulses at 423.75 kHz (f
/32) followed by an
C
unmodulated time of 37.76 µs as shown in Figure 17.
Figure 17. Logic 0, low data rate, one subcarriers x2
A logic 1 starts with an unmodulated time of 75.52 µs followed by 32 pulses at 423.75 kHz (f
/32) as shown in Figure 18.
C
Figure 18. Logic 1, low data rate, one subcarriers
For the Fast commands, a logic 1 starts with an unmodulated time of 37.76 µs followed by 16 pulses at 423.75 kHz (f
/32) as shown in Figure 18.
C
Figure 19. Logic 1, low data rate, one subcarriers x2
Doc ID 15336 Rev 11 29/100
Bit representation and coding LRIS64K
37.46µs
ai12074
37.46µs
ai12073
149.84µs
ai12072
149.84µs
ai12075

9.2 Bit coding using two subcarriers

9.3 High data rate

A logic 0 starts with 8 pulses at 423.75 kHz (fC/32) followed by 9 pulses at 484.28 kHz (f
/28) as shown in Figure 20. For the Fast commands, the x2 mode is not available.
C
Figure 20. Logic 0, high data rate, two subcarriers
A logic 1 starts with 9 pulses at 484.28 kHz (f (f
/32) as shown in Figure 21. For the Fast commands, the x2 mode is not available.
C
Figure 21. Logic 1, high data rate, two subcarriers

9.4 Low data rate

A logic 0 starts with 32 pulses at 423.75 kHz (fC/32) followed by 36 pulses at 484.28 kHz (f
/28) as shown in Figure 22. For the Fast commands, the x2 mode is not available.
C
Figure 22. Logic 0, low data rate, two subcarriers
A logic 1 starts with 36 pulses at 484.28 kHz (f (f
/32) as shown in Figure 23. For the Fast commands, the x2 mode is not available.
C
/28) followed by 8 pulses at 423.75 kHz
C
/28) followed by 32 pulses at 423.75 kHz
C
Figure 23. Logic 1, low data rate, two subcarriers
30/100 Doc ID 15336 Rev 11
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