2048-bit EEPROM tag IC at 13.56 MHz, with 64-bit UID and
Sawn Bumped Wafer
Password, ISO15693 and ISO18000-3 Mode 1 compliant
Features
■ ISO 15693 standard fully compliant
■ ISO 18000-3 Mode 1 standard fully compliant
■ 13.56 MHz ±7 kHz carrier frequency
■ To tag: 10% or 100% ASK modulation using
1/4 (26 Kbit/s) or 1/256 (1.6 Kbit/s) pulse
position coding
■ From tag: Load modulation using Manchester
coding with 423 kHz and 484 kHz subcarriers
in Low (6.6 Kbit/s) or High (26 Kbit/s) data rate
mode. Supports the 53 Kbit/s data rate with
Fast commands
The LRIS2K is a contactless memory powered by the received carrier electromagnetic
wave, which follows the ISO 15693 recommendation for radio frequency power and signal
interface. It is a 2048-bit electrically erasable programmable memory (EEPROM). The
memory is organized as 64 blocks of 32 bits. The LRIS2K is accessed via the 13.56 MHz
carrier electromagnetic wave on which incoming data are demodulated from the received
signal amplitude modulation (ASK: amplitude shift keying). The received ASK wave is 10%
or 100% modulated with a data rate of 1.6 Kbit/s using the 1/256 pulse coding mode or a
Data rate of 26 Kbit/s using the 1/4 pulse coding mode.
Outgoing data are generated by the LRIS2K load variation using Manchester coding with
one or two subcarrier frequencies at 423 KHz and 484 kHz. Data are transferred from the
LRIS2K at 6.6 Kbit/s in low data rate mode and 26 Kbit/s high data rate mode. The LRIS2K
supports the 53 Kbit/s in high data rate mode in one subcarrier frequency at 423 kHz.
The LRIS2K also features a unique 32-bit multi-password protection scheme.
Figure 1.Pad connections
Table 1.Signal names
AC1Antenna coil
AC0Antenna coil
Signal nameFunction
Doc ID 13888 Rev 911/98
DescriptionLRIS2K
1.1 Memory mapping
The LRIS2K is divided into 64 blocks of 32 bits as shown in Ta bl e 2 . Each block can be
individually read- and/or write-protected using a specific lock or password command.
The user area consists of blocks that are always accessible. Read and Write operations are
possible if the addressed block is not protected. During a Write, the 32 bits of the block are
replaced by the new 32-bit value.
The LRIS2K also has a 64-bit block that is used to store the 64-bit unique identifier (UID).
The UID is compliant with the ISO 15963 description, and its value is used during the
anticollision sequence (Inventory). This block is not accessible by the user and its value is
written by ST on the production line.
The LRIS2K also includes an AFI register in which the application family identifier is stored,
and a DSFID register in which the data storage family identifier used in the anticollision
algorithm is stored. The LRIS2K has four additional 32-bit blocks in which the Kill code and
the password codes are stored.
Table 2.Memory map
Add07 815 1623 2431Protect status
0User area5 bits
1User area5 bits
2User area5 bits
3User area5 bits
4User area5 bits
5User area5 bits
6User area5 bits
7User area5 bits
8User area5 bits
.........
60User area5 bits
61User area5 bits
62User area5 bits
63User area5 bits
UID 0UID 1UID 2UID 3
UID 4UID 5UID 6UID 7
AFIDSFID
(1)
0
(1)
1
(1)
2
(1)
3
1. RFU bit (b8) of Request_flag set to 1.
12/98Doc ID 13888 Rev 9
Kill code5 bits
Password code 15 bits
Password code 25 bits
Password code 35 bits
LRIS2KDescription
1.2 Commands
The LRIS2K supports the following commands:
●Inventory, used to perform the anticollision sequence.
●Stay Quiet, used to put the LRIS2K in quiet mode, where it does not respond to any
inventory command.
●Select, used to select the LRIS2K. After this command, the LRIS2K processes all
Read/Write commands with Select_flag set.
●Reset To Ready, used to put the LRIS2K in the ready state.
●Read Block, used to output the 32 bits of the selected block and its locking status.
●Write Block, used to write the 32-bit value in the selected block, provided that it is not
locked.
●Lock Block, used to lock the selected block. After this command, the block cannot be
modified.
●Write AFI, used to write the 8-bit value in the AFI register.
●Lock AFI, used to lock the AFI register.
●Write DSFID, used to write the 8-bit value in the DSFID register.
●Lock DSFID, used to lock the DSFID register.
●Get System Info, used to provide the system information value
●Get Multiple Block Security Status, used to send the security status of the selected
block.
●Initiate, used to trigger the tag response to the Inventory Initiated sequence.
●Inventory Initiated, used to perform the anticollision sequence triggered by the Initiate
command.
●Kill, used to definitively deactivate the tag.
●Write Password, used to write the 32 bits of the selected password.
●Lock Password, used to write the Protect Status bits of the selected block.
●Present Password, enables the user to present a password to unprotect the user
blocks linked to this password.
●Fast Initiate, used to trigger the tag response to the Inventory Initiated sequence.
●Fast Inventory Initiated, used to perform the anticollision sequence triggered by the
Initiate command.
●Fast Read Single Block, used to output the 32 bits of the selected block and its
locking status.
Doc ID 13888 Rev 913/98
DescriptionLRIS2K
1.3 Initial dialogue for vicinity cards
The dialog between the vicinity coupling device (VCD) and the vicinity integrated circuit
Card or VICC (LRIS2K) takes place as follows:
●activation of the LRIS2K by the RF operating field of the VCD.
●transmission of a command by the VCD.
●transmission of a response by the LRIS2K.
These operations use the RF power transfer and communication signal interface described
below (see Power transfer, Frequency and Operating field). This technique is called RTF
(Reader Talk First).
1.3.1 Power transfer
Power is transferred to the LRIS2K by radio frequency at 13.56 MHz via coupling antennas
in the LRIS2K and the VCD. The RF operating field of the VCD is transformed on the
LRIS2K antenna to an AC Voltage which is rectified, filtered and internally regulated. The
amplitude modulation (ASK) on this received signal is demodulated by the ASK
demodulator.
1.3.2 Frequency
The ISO 15693 standard defines the carrier frequency (fC) of the operating field as
13.56 MHz ±7 kHz.
1.3.3 Operating field
The LRIS2K operates continuously between H
●The minimum operating field is H
●The maximum operating field is H
A VCD shall generate a field of at least H
volume.
and H
min
and has a value of 150 mA/m rms.
min
and has a value of 5 A/m rms.
max
and not exceeding H
min
max
.
max
in the operating
14/98Doc ID 13888 Rev 9
LRIS2KLRIS2K block security
2 LRIS2K block security
The LRIS2K provides a special protection mechanism based on passwords. Each memory
block of the LRIS2K can be individually protected by one out of three available passwords,
and each block can also have Read/Write access conditions set.
Each memory block of the LRIS2K is assigned with a Protect Status area including a Block
Lock bit, two Password Control bits and two Read/Write protection bits as shown in Ta bl e 4 .
Ta bl e 4 describes the organization of the Protect status area which can be read using the
Read Single Block command with the Option_flag set to ‘1’, and the Get Multiple Block
Security status command.
Table 3.Memory blocks with protect status area
Add07 815 1623 2431Protect status
0User area5 bits
1User area5 bits
...User area5 bits
Table 4.Protect status area organization
b
7
000Password Control bits
b
6
b
5
b
4
b
3
b
2
b
1
Read / Write protection
bits
b
0
Block Lock
When the Block Lock bit is set to ‘1’, for instance by issuing a Block Lock command, the 2
Read/Write protection bits (b
, b2) are used to set the Read/Write access of the block as
1
described in Ta b le 5 .
The next 2 bits of the Protect Status area (b
, b4) are the Password Control bits. The value
3
of these two bits is used to link a password to the block as defined in Ta bl e 5 .
Combinations not described in Ta bl e 5 are reserved.
, b
1
Password
Control bits
b4, b
3
Block access when
password presented
Block access when
password not presented
Block protection status
the block is protected by
password 1
the block is protected by
password 2
the block is protected by
password 3
the block is not protected
by a password
Table 5.Read / Write protection bit setting and block protection status
Block lock
function
b
0b2
00000Not applicableREADWRITEthe block is not protected
11101READNO WRITENO READNO WRITE
11110READNO WRITENO READNO WRITE
11111READNO WRITENO READNO WRITE
10000Not applicableREADNO WRITE
Doc ID 13888 Rev 915/98
LRIS2K block securityLRIS2K
The LRIS2K password protection is organized around a dedicated set of commands plus a
system area of four password blocks where the password values and the Kill code are
stored. Each password block also has a Protect Status area, making it possible to set the
Read / Write access right of each individual block. This system area is described in Ta bl e 6 .
Table 6.Password system area
Add07 815 1623 2431Protect status
0Kill code5 bits
1Password 15 bits
2Password 25 bits
3Password 35 bits
The dedicated password commands are:
●Write Password:
The Write Password command is used to write a 32-bit block into the password system
area. This command must be used to write or update password values and to set the
kill code. Depending on the Read/Write access set in the Protect Status area, it is
possible to modify a password value after issuing a valid Present Password command.
●Lock Password:
The Lock Password command is used to set the Protect Status area of the selected
block. Bits b
The Block Lock bit, b
to b1 of the Protect Status are affected by the Lock Password command.
4
, is set to ‘1’ automatically. After issuing a Lock Password
0
command, the protection settings of the selected block are activated. The protection of
a locked block cannot be changed. A Lock Password command sent to a locked block
returns an error code.
The Lock Password command is also used to set the Protect Status areas of the
password blocks. RFU bit 8 of the Request_flag is used to select either the memory
area (bit 8 = ‘0’) or the password area (bit 8 = ‘1’).
●Present Password:
The Present Password command is used to present one of the three passwords to the
LRIS2K in order to modify the access rights of all the memory blocks linked to that
password (Ta bl e 5 ) including the password itself. If the presented password is correct,
the access rights remain activated until the tag is powered off or until a new Present
Password command is issued.
16/98Doc ID 13888 Rev 9
LRIS2KExample of LRIS2K security protection
3 Example of LRIS2K security protection
Ta bl e 7 and Ta bl e 8 show the block security protections before and after a valid Present
Password command. The Ta bl e 7 shows blocks access rights of an LRIS2K after power-up.
After a valid Present Password command with password 1, the memory block access is
changed as given in Tab le 8 .
Table 7.LRIS2K block security protection after power-up
Protect status
Add
0781516232431b
0Protection: Standard, Read - No Writexxx00001
4Protection: Pswd 1,No Read- No Writexxx 01111
Table 8.LRIS2K block security protection after a valid presentation of password 1
Add
0781516232431b
0Protection: Standard,Read - No Writexxx00001
4Protection: Pswd 1,Read- No Writexxx 01111
7b6b5b4b3b2b1b0
Protect status
7b6b5b4b3b2b1b0
Doc ID 13888 Rev 917/98
Communication signal from VCD to LRIS2KLRIS2K
AI06683
tRFF
tRFSBL
tRFR
105%
a
t
100%
95%
60%
5%
4 Communication signal from VCD to LRIS2K
Communications between the VCD and the LRIS2K takes place using the modulation
principle of ASK (Amplitude Shift Keying). Two modulation indexes are used, 10% and
100%. The LRIS2K decodes both. The VCD determines which index is used.
The modulation index is defined as [a – b]/[a + b] where a is the peak signal amplitude and
b, the minimum signal amplitude of the carrier frequency.
Depending on the choice made by the VCD, a “pause” will be created as described in
Figure 2 and Figure 3.
The LRIS2K is operational for any degree of modulation index from between 10% and 30%.
The data coding implemented in the LRIS2K uses pulse position modulation. Both data
coding modes that are described in the ISO15693 are supported by the LRIS2K. The
selection is made by the VCD and indicated to the LRIS2K within the start of frame (SOF).
5.1 Data coding mode: 1 out of 256
The value of one single byte is represented by the position of one pause. The position of the
pause on 1 of 256 successive time periods of 18.88 µs (256/f
byte. In this case the transmission of one byte takes 4.833 ms and the resulting data rate is
1.65 kbits/s(f
/8192).
C
Figure 4 illustrates this pulse position modulation technique. In this figure, data E1h (225
decimal) is sent by the VCD to the LRIS2K.
The pause occurs during the second half of the position of the time period that determines
the value, as shown in Figure 5.
A pause during the first period transmits the data value 00h. A pause during the last period
transmit the data value FFh (255 decimal).
), determines the value of the
C
Figure 4.1 out of 256 coding mode
20/98Doc ID 13888 Rev 9
LRIS2KData rate and data coding
AI06657
2
2
5
18.88 µs
9.44 µs
Pulse
Modulated
Carrier
2
2
6
2
2
4
. . . . . . .. . . . . . .
Time Period
one of 256
Figure 5.Detail of a time period
Doc ID 13888 Rev 921/98
Data rate and data codingLRIS2K
AI06658
9.44 µs9.44 µs
75.52 µs
28.32 µs9.44 µs
75.52 µs
47.20µs9.44 µs
75.52 µs
66.08 µs9.44 µs
75.52 µs
Pulse position for "00"
Pulse position for "11"
Pulse position for "10" (0=LSB)
Pulse position for "01" (1=LSB)
AI06659
75.52µs75.52µs75.52µs75.52µs
00
10
0111
5.2 Data coding mode: 1 out of 4
The value of 2 bits is represented by the position of one pause. The position of the pause on
1 of 4 successive time periods of 18.88 µs (256/f
successive pairs of bits form a byte, where the least significant pair of bits is transmitted first.
In this case the transmission of one byte takes 302.08 µs and the resulting data rate is 26.48
Kbits/s (f
/512). Figure 6 illustrates the 1 out of 4 pulse position technique and coding.
C
Figure 7 shows the transmission of E1h (225d - 1110 0001b) by the VCD.
Figure 6.1 out of 4 coding mode
), determines the value of the 2 bits. Four
C
22/98Doc ID 13888 Rev 9
Figure 7.1 out of 4 coding example
LRIS2KData rate and data coding
AI06661
37.76µs
9.44µs
9.44µs
37.76µs
AI06660
37.76µs
9.44µs
9.44µs
37.76µs
9.44µs
5.3 VCD to LRIS2K frames
Frames are delimited by a start of frame (SOF) and an end of frame (EOF). They are
implemented using code violation. Unused options are reserved for future use.
The LRIS2K is ready to receive a new command frame from the VCD 311.5 µs (t
sending a response frame to the VCD.
The LRIS2K takes a power-up time of 0.1 ms after being activated by the powering field.
After this delay, the LRIS2K is ready to receive a command frame from the VCD.
5.4 Start of frame (SOF)
The SOF defines the data coding mode the VCD is to use for the following command frame.
The SOF sequence described in Figure 8 selects the 1 out of 256 data coding mode. The
SOF sequence described in Figure 9 selects the 1 out of 4 data coding mode. The EOF
sequence for either coding mode is described in Figure 10.
Figure 8.SOF to select 1 out of 256 data coding mode
) after
2
Figure 9.SOF to select 1 out of 4 data coding mode
Doc ID 13888 Rev 923/98
Data rate and data codingLRIS2K
AI06662
9.44µs
37.76µs
9.44µs
Figure 10. EOF for either data coding mode
24/98Doc ID 13888 Rev 9
LRIS2KCommunications signal from LRIS2K to VCD
6 Communications signal from LRIS2K to VCD
The LRIS2K has several modes defined for some parameters, owing to which it can operate
in different noise environments and meet different application requirements.
6.1 Load modulation
The LRIS2K is capable of communication to the VCD via an inductive coupling area
whereby the carrier is loaded to generate a subcarrier with frequency f
generated by switching a load in the LRIS2K.
The load-modulated amplitude received on the VCD antenna must be of at least 10mV
when measured as described in the test methods defined in International Standard
ISO10373-7.
6.2 Subcarrier
The LRIS2K supports the one-subcarrier and two-subcarrier response formats. These
formats are selected by the VCD using the first bit in the protocol header. When one
subcarrier is used, the frequency f
When two subcarriers are used, the frequency f
is 484.28 kHz (f
continuous phase relationship between f
of the subcarrier load modulation is 423.75 kHz (fC/32).
S1
/28). When using the two-subcarrier mode, the LRIS2K generates a
C
and fS2.
S1
is 423.75 kHz (fC/32), and frequency fS2
S1
. The subcarrier is
S
6.3 Data rates
The LRIS2K can respond using the low or the high data rate format. The selection of the
data rate is made by the VCD using the second bit in the protocol header. It also supports
the x2 mode available on all the Fast commands. Tab le 1 0 shows the different data rates
produced by the LRIS2K using the different response format combinations.
Table 10.Response data rates
Data rateOne subcarrierTwo subcarriers
Standard commands6.62 Kbits/s (f
Low
Fast commands13.24 Kbits/s (f
Standard commands26.48 Kbits/s (f
High
Fast commands52.97 Kbits/s (f
/2048)6.67 Kbits/s (fc/2032)
c
/1024)not applicable
c
/512)26.69 Kbits/s (fc/508)
c
/256)not applicable
c
Doc ID 13888 Rev 925/98
Bit representation and codingLRIS2K
37.76µs
ai12076
18.88µs
ai12066
37.76µs
ai12077
18.88µs
ai12067
7 Bit representation and coding
Data bits are encoded using Manchester coding, according to the following schemes. For
the low data rate, same subcarrier frequency or frequencies is/are used, in this case the
number of pulses is multiplied by 4 and all times will increase by this factor. For the Fast
commands using one subcarrier, all pulse numbers and times are divided by 2.
7.1 Bit coding using one subcarrier
7.1.1 High data rate
A logic 0 starts with 8 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of
18.88 µs as shown in Figure 11.
Figure 11. Logic 0, high data rate
For the fast commands, a logic 0 starts with 4 pulses at 423.75 kHz (f
/32) followed by an
C
unmodulated time of 9.44 µs as shown in Figure 12.
Figure 12. Logic 0, high data rate x2
A logic 1 starts with an unmodulated time of 18.88 µs followed by 8 pulses at 423.75 kHz
/32) as shown in Figure 13.
(f
C
Figure 13. Logic 1, high data rate
For the Fast commands, a logic 1 starts with an unmodulated time of 9.44 µs followed by 4
pulses of 423.75 kHz (f
/32) as shown in Figure 14.
C
Figure 14. Logic 1, high data rate x2
26/98Doc ID 13888 Rev 9
LRIS2KBit representation and coding
151.04µs
ai12068
75.52µs
ai12069
151.04µs
ai12070
75.52µs
ai12071
7.1.2 Low data rate
A logic 0 starts with 32 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of
75.52 µs as shown in Figure 15.
Figure 15. Logic 0, low data rate
For the Fast commands, a logic 0 starts with 16 pulses at 423.75 kHz (f
/32) followed by an
C
unmodulated time of 37.76 µs as shown in Figure 16.
Figure 16. Logic 0, low data rate x2
A logic 1 starts with an unmodulated time of 75.52 µs followed by 32 pulses at 423.75 kHz
/32) as shown in Figure 17.
(f
C
Figure 17. Logic 1, low data rate
For the Fast commands, a logic 1 starts with an unmodulated time of 37.76 µs followed by
16 pulses at 423.75 kHz (f
/32) as shown in Figure 17.
C
Figure 18. Logic 1, low data rate x2
Doc ID 13888 Rev 927/98
Bit representation and codingLRIS2K
37.46µs
ai12074
37.46µs
ai12073
149.84µs
ai12072
149.84µs
ai12075
7.2 Bit coding using two subcarriers
7.3 High data rate
A logic 0 starts with 8 pulses at 423.75 kHz (fC/32) followed by 9 pulses at 484.28 kHz
/28) as shown in Figure 19. For the Fast commands, the x2 mode is not available.
(f
C
Figure 19. Logic 0, high data rate
A logic 1 starts with 9 pulses at 484.28 kHz (f
/32) as shown in Figure 20. For the Fast commands, the x2 mode is not available.
(f
C
Figure 20. Logic 1, high data rate
7.4 Low data rate
A logic 0 starts with 32 pulses at 423.75 kHz (fC/32) followed by 36 pulses at 484.28 kHz
/28) as shown in Figure 21. For the Fast commands, the x2 mode is not available.
(f
C
Figure 21. Logic 0, low data rate
A logic 1 starts with 36 pulses at 484.28 kHz (f
/32) as shown in Figure 22. For the Fast commands, the x2 mode is not available.
(f
C
/28) followed by 8 pulses at 423.75 kHz
C
/28) followed by 32 pulses at 423.75 kHz
C
Figure 22. Logic 1, low data rate
28/98Doc ID 13888 Rev 9
LRIS2KLRIS2K to VCD frames
113.28µs
ai12078
37.76µs
56.64µs
ai12079
18.88µs
8 LRIS2K to VCD frames
Frames are delimited by an SOF and an EOF. They are implemented using code violation.
Unused options are reserved for future use. For the low data rate, the same subcarrier
frequency or frequencies is/are used. In this case the number of pulses is multiplied by 4.
For the Fast commands using one subcarrier, all pulse numbers and times are divided by 2.
8.1 SOF when using one subcarrier
8.2 High data rate
The SOF includes an unmodulated time of 56.64 µs, followed by 24 pulses at 423.75 kHz
/32), and a logic 1 that consists of an unmodulated time of 18.88 µs followed by 8 pulses
(f
C
at 423.75 kHz as shown in Figure 23.
Figure 23. Start of frame, high data rate, one subcarrier
For the Fast commands, the SOF comprises an unmodulated time of 28.32 µs, followed by
12 pulses at 423.75 kHz (f
/32), and a logic 1 that consists of an unmodulated time of
C
9.44µs followed by 4 pulses at 423.75 kHz as shown in Figure 24.
Figure 24. Start of frame, high data rate, one subcarrier x2
Doc ID 13888 Rev 929/98
LRIS2K to VCD framesLRIS2K
453.12µs
ai12080
151.04µs
226.56µs
ai12081
75.52µs
8.3 Low data rate
The SOF comprises an unmodulated time of 226.56 µs, followed by 96 pulses at 423.75 kHz
/32), and a logic 1 that consists of an unmodulated time of 75.52 µs followed by 32 pulses
(f
C
at 423.75 kHz as shown in Figure 25.
Figure 25. Start of frame, low data rate, one subcarrier
For the Fast commands, the SOF comprises an unmodulated time of 113.28 µs, followed by
48 pulses at 423.75 kHz (f
followed by 16 pulses at 423.75 kHz as shown in Figure 26.
Figure 26. Start of frame, low data rate, one subcarrier x2
/32), and a logic 1 that includes an unmodulated time of 37.76 µs
C
30/98Doc ID 13888 Rev 9
LRIS2KLRIS2K to VCD frames
112.39µs
ai12082
37.46µs
449.56µs
ai12083
149.84µs
8.4 SOF when using two subcarriers
8.5 High data rate
The SOF comprises 27 pulses at 484.28 kHz (fC/28), followed by 24 pulses at 423.75 kHz
/32), and a logic 1 that includes 9 pulses at 484.28 kHz followed by 8 pulses at
(f
C
423.75 kHz as shown in Figure 27.
For the Fast commands, the x2 mode is not available.
Figure 27. Start of frame, high data rate, two subcarriers
8.6 Low data rate
The SOF comprises 108 pulses at 484.28 kHz (fC/28), followed by 96 pulses at 423.75 kHz
/32), and a logic 1 that includes 36 pulses at 484.28 kHz followed by 32 pulses at
(f
C
423.75 kHz as shown in Figure 28.
For the Fast commands, the x2 mode is not available.
Figure 28. Start of frame, low data rate, two subcarriers
Doc ID 13888 Rev 931/98
LRIS2K to VCD framesLRIS2K
113.28µs
ai12084
37.76µs
56.64µs
ai12085
18.88µs
453.12µs
ai12086
151.04µs
226.56µs
ai12087
75.52µs
8.7 EOF when using one subcarrier
8.8 High data rate
The EOF comprises a logic 0 that includes 8 pulses at 423.75 kHz and an unmodulated time
of 18.88 µs, followed by 24 pulses at 423.75 kHz (f
56.64 µs as shown in Figure 29.
Figure 29. End of frame, high data rate, one subcarriers
For the Fast commands, the EOF comprises a logic 0 that includes 4 pulses at 423.75 kHz
and an unmodulated time of 9.44 µs, followed by 12 pulses at 423.75 kHz (f
unmodulated time of 37.76 µs as shown in Figure 30.
Figure 30. End of frame, high data rate, one subcarriers x2
/32), and by an unmodulated time of
C
/32) and an
C
8.9 Low data rate
The EOF comprises a logic 0 that includes 32 pulses at 423.75 kHz and an unmodulated
time of 75.52 µs, followed by 96 pulses at 423.75 kHz (f
226.56 µs as shown in Figure 31.
Figure 31. End of frame, low data rate, one subcarriers
For the Fast commands, the EOF comprises a logic 0 that includes 16 pulses at 423.75 kHz
and an unmodulated time of 37.76 µs, followed by 48 pulses at 423.75 kHz (f
unmodulated time of 113.28 µs as shown in Figure 32.
Figure 32. End of frame, low data rate, one subcarriers x2
/32) and an unmodulated time of
C
/32) and an
C
32/98Doc ID 13888 Rev 9
LRIS2KLRIS2K to VCD frames
112.39µs
ai12088
37.46µs
449.56µs
ai12089
149.84µs
8.10 EOF when using two subcarriers
8.11 High data rate
The EOF comprises a logic 0 that includes 8 pulses at 423.75 kHz and 9 pulses at
484.28 kHz, followed by 24 pulses at 423.75 kHz (f
/28) as shown in Figure 33.
(f
C
/32) and 27 pulses at 484.28 kHz
C
For the Fast commands, the x2 mode is not available.
Figure 33. End of frame, high data rate, two subcarriers
8.12 Low data rate
The EOF comprises a logic 0 that includes 32 pulses at 423.75 kHz and 36 pulses at
484.28 kHz, followed by 96 pulses at 423.75 kHz (f
/28) as shown in Figure 34.
(f
C
For the Fast commands, the x2 mode is not available.
/32) and 108 pulses at 484.28 kHz
C
Figure 34. End of frame, low data rate, two subcarriers
Doc ID 13888 Rev 933/98
Unique identifier (UID)LRIS2K
9 Unique identifier (UID)
The LRIS2Ks are uniquely identified by a 64-bit Unique Identifier (UID). This UID complies
with ISO/IEC 15963 and ISO/IEC 7816-6. The UID is a read-only code and comprises:
●8 MSBs with a value of E0h
●The IC Manufacturer code of ST 02h, on 8 bits (ISO/IEC 7816-6/AM1)
●a Unique Serial Number on 48 bits
Table 11.UID format
MSBLSB
6356 5548 470
0xE00x02Unique serial number
With the UID each LRIS2K can be addressed uniquely and individually during the
anticollision loop and for one-to-one exchanges between a VCD and an LRIS2K.
34/98Doc ID 13888 Rev 9
LRIS2KApplication family identifier (AFI)
AI13238
Inventory Request
Received
No
No Answer
Yes
No
AFI value
= 0 ?
Yes
No
AFI Flag
Set ?
Yes
Answer given by the LRIS2K
to the Inventory Request
AFI value
= Internal
value ?
10 Application family identifier (AFI)
The AFI (application family identifier) represents the type of application targeted by the VCD
and is used to identify, among all the LRIS2Ks present, only the LRIS2Ks that meet the
required application criteria.
Figure 35. LRIS2K decision tree for AFI
The AFI is programmed by the LRIS2K issuer (or purchaser) in the AFI register. Once
programmed and Locked, it can no longer be modified.
The most significant nibble of the AFI is used to code one specific or all application families.
The least significant nibble of the AFI is used to code one specific or all application
subfamilies. Subfamily codes different from 0 are proprietary.
(See ISO 15693-3 documentation)
Doc ID 13888 Rev 935/98
Data storage format identifier (DSFID)LRIS2K
11 Data storage format identifier (DSFID)
The data storage format identifier indicates how the data is structured in the LRIS2K
memory. The logical organization of data can be known instantly using the DSFID.
It can be programmed and locked using the Write DSFID and Lock DSFID commands.
11.1 CRC
The CRC used in the LRIS2K is calculated as per the definition in ISO/IEC 13239.
The initial register contents are all ones: FFFFh.
The two-byte CRC are appended to each request and response, within each frame, before
the EOF. The CRC is calculated on all the bytes after the SOF up to the CRC field.
Upon reception of a request from the VCD, the LRIS2K verifies that the CRC value is valid.
If it is invalid, the LRIS2K discards the frame and does not answer to the VCD.
Upon reception of a request from the LRIS2K, it is recommended that the VCD verifies
whether the CRC value is valid. If it is invalid, actions to be performed are left to the
discretion of the VCD designer.
The CRC is transmitted least significant byte first.
Each byte is transmitted least significant bit first.
Table 12.CRC transmission rules
LSByteMSByte
LSBit MSBitLSBit MSBit
CRC 16 (8 bits)CRC 16 (8 bits)
36/98Doc ID 13888 Rev 9
LRIS2KLRIS2K protocol description
12 LRIS2K protocol description
The Transmission protocol (or simply protocol) defines the mechanism used to exchange
instructions and data between the VCD and the LRIS2K, in both directions. It is based on
the concept of “VCD talks first”.
This means that an LRIS2K will not start transmitting unless it has received and properly
decoded an instruction sent by the VCD. The protocol is based on an exchange of:
●a request from the VCD to the LRIS2K
●a response from the LRIS2K to the VCD
Each request and each request are contained in a frame. The frame delimiters (SOF, EOF)
are described in Section 8: LRIS2K to VCD frames.
Each request consists of:
●a request SOF (see Figure 8 and Figure 9)
●flags
●a command code
●parameters, depending on the command
●application data
●a 2-byte CRC
●a request EOF (see Figure 10)
Each request consists of:
●an Answer SOF (see Figure 23 to Figure 28)
●flags
●parameters, depending on the command
●application data
●a 2-byte CRC
●an Answer EOF (see Figure 29 to Figure 34)
The protocol is bit-oriented. The number of bits transmitted in a frame is a multiple of eight
(8), i.e. an integer number of bytes.
A single-byte field is transmitted least significant bit (LSBit) first. A multiple-byte field is
transmitted least significant byte (LSByte) first, each byte is transmitted least significant bit
(LSBit) first.
The setting of the flags indicates the presence of the optional fields. When the flag is set (to
one), the field is present. When the flag is reset (to zero), the field is absent.
Table 13.VCD request frame format
Request SOF Request_flags
Table 14.LRIS2Kresponse frame format
Response
SOF
Response
_flags
Command
code
ParametersData2-byte CRC
ParametersData2-byte CRC
Request
EOF
Response
EOF
Doc ID 13888 Rev 937/98
LRIS2K protocol descriptionLRIS2K
Figure 36. LRIS2K protocol timing
Request
VCD
frame
(Ta bl e 1 3 )
LRIS2K
Timingt
1
Response
frame
(Ta bl e 1 4 )
t
2
Request
frame
(Ta bl e 1 3 )
t
1
Response
frame
(Ta bl e 1 4)
t
2
38/98Doc ID 13888 Rev 9
LRIS2KLRIS2K states
13 LRIS2K states
An LRIS2K can be in one of 4 states:
●Power-off
●Ready
●Quiet
●Selected
Transitions between these states are specified in Figure 37: LRIS2K state transition diagram
and Table 15: LRIS2K response depending on Request_flags.
13.1 Power-off state
The LRIS2K is in the Power-off state when it does not receive enough energy from the VCD.
13.2 Ready state
The LRIS2K is in the Ready state when it receives enough energy from the VCD. When in
the Ready state, the LRIS2K answers any request where the Select_flag is not set.
13.3 Quiet state
When in the Quiet state, the LRIS2K answers any request except for Inventory requests with
the Address_flag set.
13.4 Selected state
In the Selected state, the LRIS2K answers any request in all modes (see Section 14:
Modes):
●request in Select mode with the Select_flag set
●request in Addressed mode if the UID matches
●request in Non-Addressed mode as it is the mode for general requests
Doc ID 13888 Rev 939/98
LRIS2K statesLRIS2K
AI06681
Power Off
In field
Out of field
Ready
Quiet
Selected
Any other Command
where Select_Flag
is not set
Out of field
Out of field
Stay quiet(UID)
Select (UID)
Any other command
Any other command where the
Address_Flag is set AND
where Inventory_Flag is not set
Stay quiet(UID)
Select (UID)
Reset to ready where
Select_Flag is set or
Select(different UID)
Reset to ready
Table 15.LRIS2K response depending on Request_flags
Address_flagSelect_flag
Flags
1
Addressed0Non addressed
1
Selected0Non selected
LRIS2K in Ready or Selected state
(Devices in Quiet state do not
XX
answer)
LRIS2K in Selected stateXX
LRIS2K in Ready, Quiet or
Selected state (the device which
XX
matches the UID)
Error (03h)XX
Figure 37. LRIS2K state transition diagram
40/98Doc ID 13888 Rev 9
1. The intention of the state transition method is that only one LRIS2K should be in the selected state at a
time.
LRIS2KModes
14 Modes
The term “mode” refers to the mechanism used in a request to specify the set of LRIS2Ks
that will answer the request.
14.1 Addressed mode
When the Address_flag is set to 1 (Addressed mode), the request contains the Unique ID
(UID) of the addressed LRIS2K.
Any LRIS2K that receives a request with the Address_flag set to 1 compares the received
Unique ID to its own. If it matches, then the LRIS2K executes the request (if possible) and
returns a request to the VCD as specified in the command description.
If the UID does not match, then it remains silent.
14.2 Non-addressed mode (general request)
When the Address_flag is cleared to 0 (Non-Addressed mode), the request does not contain
a Unique ID. Any LRIS2K receiving a request with the Address_flag cleared to 0 executes it
and returns a request to the VCD as specified in the command description.
14.3 Select mode
When the Select_flag is set to 1 (Select mode), the request does not contain an LRIS2K
Unique ID. The LRIS2K in the Selected state that receives a request with the Select_flag set
to 1 executes it and returns a request to the VCD as specified in the command description.
Only LRIS2Ks in the Selected state answer a request where the Select_flag set to 1.
The system design ensures in theory that only one LRIS2K can be in the Select state at a
time.
Doc ID 13888 Rev 941/98
Request formatLRIS2K
15 Request format
The request consists of:
●an SOF
●flags
●a command code
●parameters and data
●a CRC
●an EOF
Table 16.General request format
S
OFRequest_flagsCommand codeParametersDataCRCEO
F
15.1 Request_flags
In a request, the “flags” field specifies the actions to be performed by the LRIS2K and
whether corresponding fields are present or not.
The flag field consists of eight bits.
The bit 3 (Inventory_flag) of the request_flag defines the contents of the 4 MSBs (bits 5 to
8).
When bit 3 is reset (0), bits 5 to 8 define the LRIS2K selection criteria.
When bit 3 is set (1), bits 5 to 8 define the LRIS2K Inventory parameters.
Table 17.Definition of request_flags 1 to 4
Bit NoFlagLevelDescription
Bit 1Subcarrier_flag
Bit 2Data_rate_flag
(1)
(2)
Bit 3Inventory_flag
Bit 4Protocol Extension_flag0No Protocol format extension
1. Subcarrier_flag refers to the LRIS2K-to-VCD communication.
2. Data_rate_flag refers to the LRIS2K-to-VCD communication
0A single subcarrier frequency is used by the LRIS2K
1Two subcarrier are used by the LRIS2K
0Low data rate is used
1High data rate is used
0The meaning of flags 5 to 8 is described in Ta bl e 1 8
1The meaning of flags 5 to 8 is described in Ta bl e 1 9
42/98Doc ID 13888 Rev 9
LRIS2KRequest format
.
Table 18.Request_flags 5 to 8 when Bit 3 = 0
Bit NoFlagLevelDescription
Request is executed by any LRIS2K according to the setting of
0
Bit 5Select_flag
Bit 6Address_flag
(1)
(1)
Bit 7Option_flag0
Bit 8RFU0
1. If the Select_flag is set to 1, the Address_flag is set to 0 and the UID field is not present in the request.
Table 19.Request_flags 5 to 8 when Bit 3 = 1
Bit NoFlagLevelDescription
Address_flag
1Request is executed only by the LRIS2K in Selected state
Request is not addressed. UID field is not present. The request is
0
executed by all LRIS2Ks.
Request is addressed. UID field is present. The request is
1
executed only by the LRIS2K whose UID matches the UID
specified in the request.
Bit 5AFI_flag
Bit 6Nb_slots_flag
Bit 7Option_flag0
Bit 8RFU0
0AFI field is not present
1AFI field is present
016 slots
11 slot
Doc ID 13888 Rev 943/98
Response formatLRIS2K
16 Response format
The request consists of:
●an SOF
●flags
●parameters and data
●a CRC
●an EOF
Table 20.General response format
S
O
F
16.1 Response_flags
In a request, the flags indicate how actions have been performed by the LRIS2K and
whether corresponding fields are present or not. The request_flags consist of eight bits.
Table 21.Definitions of response_flags 1 to 8
Response_flags ParametersDataCRCEO
F
Bit NoFlagLevelDescription
0No error
Bit 1Error_flag
1Error detected. Error code is in the "Error" field.
Bit 2RFU0
Bit 3RFU0
Bit 4Extension_flag0No extension
Bit 5RFU0
Bit 6RFU0
Bit 7RFU0
Bit 8RFU0
44/98Doc ID 13888 Rev 9
LRIS2KResponse format
16.2 Response error code
If the Error_flag is set by the LRIS2K in the request, the Error code field is present and
provides information about the error that occurred.
Error codes not specified in Ta bl e 2 2 are reserved for future use.
Table 22.Response error code definition
Error codeMeaning
03hThe option is not supported
0FhError with no information given
10hThe specified block is not available
11hThe specified block is already locked and thus cannot be locked again
12hThe specified block is locked and its contents cannot be changed.
13hThe specified block was not successfully programmed
14hThe specified block was not successfully locked
Doc ID 13888 Rev 945/98
AnticollisionLRIS2K
17 Anticollision
The purpose of the anticollision sequence is to inventory the LRIS2Ks present in the VCD
field using their unique ID (UID).
The VCD is the master of communications with one or several LRIS2Ks. It initiates LRIS2K
communication by issuing the Inventory request.
The LRIS2K sends its request in the determined slot or does not respond.
17.1 Request parameters
When issuing the Inventory command, the VCD:
●sets the Nb_slots_flag as desired
●adds the mask length and the mask value after the command field
●The mask length is the number of significant bits of the mask value.
●The mask value is contained in an integer number of bytes. The mask length indicates
the number of significant bits. LSB is transmitted first
●If the mask length is not a multiple of 8 (bits), as many 0-bits as required will be added
to the mask value MSB so that the mask value is contained in an integer number of
bytes
●The next field starts at the next byte boundary.
Table 23.Inventory request format
MSBLSB
SOF
Request_
flags
Command
Optional
AFI
Mask
length
Mask valueCRCEOF
8 bits8 bits8 bits8 bits0 to 8 bytes16 bits
In the example of the Ta bl e 2 4 and Figure 38, the mask length is 11 bits. Five 0-bits are
added to the mask value MSB. The 11-bit Mask and the current slot number are compared
to the UID.
Table 24.Example of the addition of 0-bits to an 11-bit mask value
(b15) MSBLSB (b0)
0000 0100 1100 1111
0-bits added11-bit mask value
46/98Doc ID 13888 Rev 9
LRIS2KAnticollision
AI06682
Mask value received in the Inventory command0000 0100 1100 1111b16 bits
The Mask value less the padding 0s is loaded
into the Tag comparator
100 1100 1111b11 bits
The Slot counter is calculated
xxxxNb_slots_flags = 0 (16 slots), Slot Counter is 4 bits
The Slot counter is concatened to the Mask value
xxxx 100 1100 1111
b
Nb_slots_flags = 015 bits
The concatenated result is compared with
the least significant bits of the Tag UID.
Figure 38. Principle of comparison between the mask, the slot number and the UID
The AFI field is present if the AFI_flag is set.
The pulse is generated according to the definition of the EOF in ISO/IEC 15693-2.
The first slot starts immediately after the reception of the request EOF. To switch to the next
slot, the VCD sends an EOF.
The following rules and restrictions apply:
●if no LRIS2K answer is detected, the VCD may switch to the next slot by sending an
EOF,
●if one or more LRIS2K answers are detected, the VCD waits until the complete frame
has been received before sending an EOF for switching to the next slot.
Doc ID 13888 Rev 947/98
Request processing by the LRIS2KLRIS2K
18 Request processing by the LRIS2K
Upon reception of a valid request, the LRIS2K performs the following algorithm:
●NbS is the total number of slots (1 or 16)
●SN is the current slot number (0 to 15)
●LSB (value, n) function returns the n Less Significant Bits of value
●MSB (value, n) function returns the n Most Significant Bits of value
●“&” is the concatenation operator
●Slot_frame is either an SOF or an EOF
SN = 0
if (Nb_slots_flag)
then NbS = 1
SN_length = 0
endif
else NbS = 16
SN_length = 4
endif
label1:
if LSB(UID, SN_length + Mask_length) =
LSB(SN,SN_length)&LSB(Mask,Mask_length)
then answer to inventory request
endif
wait (Slot_frame)
if Slot_frame = SOF
then Stop Anticollision
decode/process request
exit
endif
if Slot_frame = EOF
if SN < NbS-1
then SN = SN + 1
goto label1
exit
endif
endif
48/98Doc ID 13888 Rev 9
LRIS2KExplanation of the possible cases
19 Explanation of the possible cases
Figure 39 summarizes the main possible cases that can occur during an anticollision
sequence when the slot number is 16.
The different steps are:
●The VCD sends an Inventory request, in a frame terminated by an EOF. The number of
slots is 16.
●LRIS2K 1 transmits its request in Slot 0. It is the only one to do so, therefore no collision
occurs and its UID is received and registered by the VCD;
●The VCD sends an EOF in order to switch to the next slot.
●In slot 1, two LRIS2Ks, LRIS2K 2 and LRIS2K 3 transmit a request, thus generating a
collision. The VCD records the event and remembers that a collision was detected in
Slot 1.
●The VCD sends an EOF in order to switch to the next slot.
●In Slot 2, no LRIS2K transmits a request. Therefore the VCD does not detect any
LRIS2K SOF and decides to switch to the next slot by sending an EOF.
●In slot 3, there is another collision caused by requests from LRIS2K 4 and LRIS2K 5
●The VCD then decides to send a request (for instance a Read Block) to LRIS2K 1
whose UID has already been correctly received.
●All LRIS2Ks detect an SOF and exit the anticollision sequence. They process this
request and since the request is addressed to LRIS2K 1, only LRIS2K 1 transmits a
request.
●All LRIS2Ks are ready to receive another request. If it is an Inventory command, the
slot numbering sequence restarts from 0.
Note:The decision to interrupt the anticollision sequence is made by the VCD. It could have
continued to send EOFs until Slot 16 and only then sent the request to LRIS2K 1.
Doc ID 13888 Rev 949/98
Explanation of the possible casesLRIS2K
AI12885
Slot 0Slot 1Slot 2Slot 3
VCDSOF
Inventory
Request
EOFEOFEOFEOFSOF
Request to
LRIS2K 1
EOF
Response
2
Response
4
LRIS2Ks
Response
from
LRIS2K 1
Response
1
Response
3
Response
5
Timingt1t2t1t2t3t1t2t1
Comment
No
collision
Collision
No
Response
Collision
Time
Figure 39. Description of a possible anticollision sequence
50/98Doc ID 13888 Rev 9
LRIS2KInventory Initiated command
20 Inventory Initiated command
The LRIS2K provides a special feature to improve the inventory time response of moving
tags using the Initiate_flag value. This flag, controlled by the Initiate command, allows tags
to answer to Inventory Initiated commands.
For applications in which multiple tags are moving in front of a reader, it is possible to miss
tags using the standard inventory command. The reason is that the inventory sequence has
to be performed on a global tree search. For example, a tag with a particular UID value may
have to wait the run of a long tree search before being inventoried. If the delay is too long,
the tag may be out of the field before it has been detected.
Using the Initiate command, the inventory sequence is optimized. When multiple tags are
moving in front of a reader, the ones which are within the reader field will be initiated by the
Initiate command. In this case, a small batch of tags will answer to the Inventory Initiated
command which will optimize the time necessary to identify all the tags. When finished, the
reader has to issue a new Initiate command in order to initiate a new small batch of tags
which are new inside the reader field.
It is also possible to reduce the inventory sequence time using the Fast Initiate and Fast
Inventory Initiated commands. These commands allow the LRIS2Ks to increase their
response data rate by a factor of 2, up to 53kbit/s.
Doc ID 13888 Rev 951/98
Timing definitionLRIS2K
21 Timing definition
21.1 t1: LRIS2K response delay
Upon detection of the rising edge of the EOF received from the VCD, the LRIS2K waits for a
time t
slot during an inventory process. Values of t
Figure 10 on page 24.
21.2 t2: VCD new request delay
t2 is the time after which the VCD may send an EOF to switch to the next slot when one or
more LRIS2K responses have been received during an Inventory command. It starts from
the reception of the EOF from the LRIS2Ks.
The EOF sent by the VCD may be either 10% or 100% modulated regardless of the
modulation index used for transmitting the VCD request to the LRIS2K.
is also the time after which the VCD may send a new request to the LRIS2K as described
t
2
in Figure 36: LRIS2K protocol timing.
before transmitting its response to a VCD request or before switching to the next
1nom
are given in Ta bl e 2 5 . The EOF is defined in
1
Values of t
are given in Ta bl e 2 5 .
2
21.3 t3: VCD new request delay in the absence of a response from
the LRIS2K
t3 is the time after which the VCD may send an EOF to switch to the next slot when no
LRIS2K response has been received.
The EOF sent by the VCD may be either 10% or 100% modulated regardless of the
modulation index used for transmitting the VCD request to the LRIS2K.
From the time the VCD has generated the rising edge of an EOF:
●If this EOF is 100% modulated, the VCD waits a time at least equal to t
sending a new EOF.
●If this EOF is 10% modulated, the VCD waits a time at least equal to the sum of t
the LRIS2K nominal response time (which depends on the LRIS2K data rate and
subcarrier modulation mode) before sending a new EOF.
does not apply for write alike requests. Timing conditions for write alike requests are defined in the
1max
command description.
3. t
is the time taken by the LRIS2K to transmit an SOF to the VCD. t
SOF
rate: High data rate or Low data rate.
318.6 µs320.9 µs323.3 µs
309.2 µsNo t
(2)
t
1max
+ t
SOF
(1)
(3)
nom
No t
nom
.
C
depends on the current data
SOF
3min
No t
No t
before
max
max
3min
+
52/98Doc ID 13888 Rev 9
LRIS2KCommands codes
22 Commands codes
The LRIS2K supports the commands described in this section. Their codes are given in
Ta bl e 2 6 .
Table 26.Command codes
Command code
standard
01hInventoryA6hKill
02hStay QuietB1hWrite password
20hRead Single BlockB2hLock Password
21hWrite Single Block B3hPresent Password
22hLock Block C0hFast Read Single Block
25hSelectC1hFast Inventory Initiated
26hReset to ReadyC2hFast Initiate
27hWrite AFID1hInventory Initiated
28hLock AFID2hInitiate
29hWrite DSFID
2AhLock DSFID
2BhGet System Info
2Ch
Get Multiple Block Security
Status
Function
Command code
custom
Function
Doc ID 13888 Rev 953/98
InventoryLRIS2K
23 Inventory
When receiving the Inventory request, the LRIS2K runs the anticollision sequence. The
Inventory_flag is set to 1. The meaning of flags 5 to 8 is shown in Table 19: Request_flags 5
to 8 when Bit 3 = 1.
The request contains the:
●flags
●Inventory command code (see Table 26: Command codes)
●AFI if the AFI flag is set
●mask length
●mask value
●CRC
The LRIS2K does not generate any answer in case of error.
Table 27.Inventory request format
Request
SOF
Request_flags Inventory
Optional
AFI
Mask
length
Mask
value
CRC16
Request
EOF
8 bits01h8 bits8 bits0 - 64 bits16 bits
The response contains the:
●flags
●unique ID
Table 28.Inventory response format
Response
SOF
Response_
flags
DSFIDUIDCRC16
Response
EOF
8 bits8 bits64 bits16 bits
During an Inventory process, if the VCD does not receive an RF LRIS2K response, it waits a
before sending an EOF to switch to the next slot. t3 starts from the rising edge of the
time t
3
request EOF sent by the VCD.
●If the VCD sends a 100% modulated EOF, the minimum value of t
min = 4384/fC (323.3µs) + t
t
3
●
If the VCD sends a 10% modulated EOF, the minimum value of t3 is:
min = 4384/fC (323.3µs) + t
t
3
SOF
NRT
is:
3
where:
●t
●t
t
NRT
is the time required by the LRIS2K to transmit an SOF to the VCD
SOF
is the nominal response time of the LRIS2K
NRT
and t
are dependent on the LRIS2K-to-VCD data rate and subcarrier modulation
SOF
mode.
54/98Doc ID 13888 Rev 9
LRIS2KStay Quiet
24 Stay Quiet
Command code = 0x02
On receiving the Stay Quiet command, the LRIS2K enters the Quiet state and does NOT
send back a request. There is NO response to the Stay Quiet command even if an error
occurs.
When in the Quiet state:
●the LRIS2K does not process any request if the Inventory_flag is set,
●the LRIS2K processes any Addressed request
The LRIS2K exits the Quiet state when:
●it is reset (power off),
●receiving a Select request. It then goes to the Selected state,
●receiving a Reset to Ready request. It then goes to the Ready state.
Table 29.Stay Quiet request format
Request
SOF
Request_flagsStay QuietUIDCRC16
Request
EOF
8 bits02h64 bits16 bits
The Stay Quiet command must always be executed in Addressed mode (Select_flag is reset
to 0 and Address_flag is set to 1).
Figure 40. Stay Quiet frame exchange between VCD and LRIS2K
VCDSOF
LRIS2K
Timing
Stay Quiet
request
EOF
Doc ID 13888 Rev 955/98
Read Single BlockLRIS2K
25 Read Single Block
On receiving the Read Single Block command, the LRIS2K reads the requested block and
sends back its 32 bits value in the request. The Option_flag is supported and gives access
to the protect status.
Table 30.Read Single Block request format
Request
SOF
Request_flags
8 bits20h
Read Single
Block
UID
64 bits8 bits16 bits
Block
number
CRC16
Request parameters:
●Option_flag
●UID (optional)
●Block number
Table 31.Read Single Block response format when Error_flag is NOT set
Response
SOF
Response_flags
8 bits
Block locking
status
DataCRC16
8 bits32 bits16 bits
Response
Response parameters:
●Block Locking Status if Option_flag is set (see Table 32: Block Locking status)
●4 bytes of block data
Table 32.Block Locking status
b
Reserved for future
b
7
use. All at 0
b
6
5
b
b
4
password
control bits
3
b
2
Read / Write
protection bits
b
1
0: Current Block not locked
1: Current Block locked
b
0
Request
EOF
EOF
Table 33.Read Single Block response format when Error_flag is set
Response
SOF
Response_
Flags
Error codeCRC16
8 bits8 bits16 bits
Response parameter:
●Error code as Error_flag is set
–0Fh: other error
–10h: block address not available
56/98Doc ID 13888 Rev 9
Response
EOF
LRIS2KRead Single Block
Figure 41. Read Single Block frame exchange between VCD and LRIS2K
VCDSOF
Read Single Block
request
EOF
LRIS2K<-t
-> SOF
1
Read Single Block
response
EOF
Doc ID 13888 Rev 957/98
Write Single BlockLRIS2K
26 Write Single Block
On receiving the Write Single Block command, the LRIS2K writes the data contained in the
request to the requested block and reports whether the write operation was successful in
the request. The Option_flag is supported.
During the write cycle t
Otherwise, the LRIS2K may not program correctly the data into the memory. The t
equal to t
Table 34.Write Single Block request format
Request
SOF
+ 18 × 302 µs.
1nom
Request_
flags
8 bits21h
, there should be no modulation (neither 100% nor 10%).
W
Write
Single
Block
UID
Block
number
DataCRC16
64 bits8 bits32 bits16 bits
time is
W
Request
Request parameters:
●UID (optional)
●Block number
●Data
Table 35.Write Single Block response format when Error_flag is NOT set
Response SOFResponse_flagsCRC16Response EOF
8 bits16 bits
Response parameter:
●No parameter. The response is send back after the writing cycle.
Table 36.Write Single Block response format when Error_flag is set
EOF
Response
SOF
Response_
Flags
Error codeCRC16
8 bits8 bits16 bits
Response parameter:
●Error code as Error_flag is set:
–10h: block address not available
–12h: block is locked
–13h: block not programmed
58/98Doc ID 13888 Rev 9
Response
EOF
LRIS2KWrite Single Block
Figure 42. Write Single Block frame exchange between VCD and LRIS2K
VCDSOF
LRIS2K<-t
Write Single
Block request
EOF
-> SOF
1
Write Single Block
response
EOF
LRIS2K<------------ tW ------------><- t1 ->SOF
Write sequence when
error
Write Single
Block response
EOF
Doc ID 13888 Rev 959/98
Lock BlockLRIS2K
27 Lock Block
On receiving the Lock Block command, the LRIS2K permanently locks the selected block.
During the write cycle t
Otherwise, the LRIS2K may not lock correctly the memory block. The t
+ 18 × 302µs.
t
1nom
Table 37.Lock Single Block request format
Request
SOF
Request_
flags
8 bits22h
, there should be no modulation (neither 100% nor 10%).
W
W
Lock
Block
UID
Block
number
64 bits8 bits16 bits
Request parameters:
●(Optional) UID
●Block number
Table 38.Lock Block response format when Error_flag is NOT set
Response
SOF
Response_flagsCRC16
8 bits16 bits
Response parameter:
●No parameter.
Table 39.Lock Block response format when Error_flag is set
time is equal to
CRC16
Request
EOF
Response
EOF
Response
SOF
Response_
Flags
Error codeCRC16
8 bits8 bits16 bits
Response parameter:
●Error code as Error_flag is set:
–10h: block address not available
–11h: block is locked
–14h: block not locked
60/98Doc ID 13888 Rev 9
Response
EOF
LRIS2KLock Block
Figure 43. Lock Block frame exchange between VCD and LRIS2K
VCDSOF
LRIS2K<-t
Lock Block
request
EOF
->SOF
1
LRIS2K<------------ t
Lock Block
response
------------><- t1 -> SOF
W
Lock sequence when
EOF
Lock Block
response
error
EOF
Doc ID 13888 Rev 961/98
SelectLRIS2K
28 Select
When receiving the Select command:
●if the UID is equal to its own UID, the LRIS2K enters or stays in the Selected state and
sends a request.
●if the UID does not match its own, the selected LRIS2K returns to the Ready state and
does not send a request.
The LRIS2K answers an error code only if the UID is equal to its own UID. If not, no
response is generated.
Table 40.Select request format
Request
SOF
Request_
flags
SelectUIDCRC16
8 bits25h64 bits16 bits
Request parameter:
●UID
Table 41.Select Block response format when Error_flag is NOT set
Response
SOF
Response_flagsCRC16
8 bits16 bits
Response parameter:
●No parameter.
Table 42.Select response format when Error_flag is set
Response
SOF
Response_
Flags
Error codeCRC16
8 bits8 bits16 bits
Request
EOF
Response
EOF
Response
EOF
Response parameter:
●Error code as Error_flag is set:
–0Fh: other error
Figure 44. Select frame exchange between VCD and LRIS2K
VCDSOF
LRIS2K<-t
62/98Doc ID 13888 Rev 9
Select
request
EOF
-> SOF
1
Select
response
EOF
LRIS2KReset to Ready
29 Reset to Ready
On receiving a Reset to Ready command, the LRIS2K returns to the Ready state. In the
Addressed mode, the LRIS2K answers an error code only if the UID is equal to its own UID.
If not, no response is generated.
Table 43.Reset to Ready request format
Request
SOF
Request_
flags
8 bits26h
Reset to
Ready
UIDCRC16
64 bits16 bits
Request parameter:
●UID (Optional)
Table 44.Reset to Ready response format when Error_flag is NOT set
Response
SOF
Response_flagsCRC16
8 bits16 bits
Response parameter:
●No parameter
Table 45.Reset to Ready request format when Error_flag is set
Response
SOF
Response_
flags
Error codeCRC16
8 bits8 bits16 bits
Request
EOF
Response
EOF
Response
EOF
Response parameter:
●Error code as Error_flag is set:
–0Fh: other error
Figure 45. Reset to Ready frame exchange between VCD and LRIS2K
Reset to
VCDSOF
LRIS2K<-t
Ready
request
EOF
Reset to
-> SOF
1
Ready
EOF
response
Doc ID 13888 Rev 963/98
Write AFILRIS2K
30 Write AFI
On receiving the Write AFI request, the LRIS2K writes the AFI byte value into its memory.
During the write cycle t
, there should be no modulation (neither 100% nor 10%).
W
Otherwise, the LRIS2K may not write correctly the AFI value into the memory. The t
equal to t
Table 46.Write AFI request format
Request
SOF
+ 18 × 302 µs.
1nom
Request
_flags
8 bits27h
Write
AFI
UIDAFICRC16
64 bits8 bits16 bits
Request parameters:
●UID (Optional)
●AFI
Table 47.Write AFI response format when Error_flag is NOT set
Response
SOF
Response_flagsCRC16
8 bits16 bits
Response parameter:
●No parameter.
Table 48.Write AFI response format when Error_flag is set
time is
W
Request
EOF
Response
EOF
Response
SOF
Response_
Flags
Error codeCRC16
8 bits8 bits16 bits
Response parameter:
●Error code as Error_flag is set
–12h: block is locked
–13h: block not programmed
64/98Doc ID 13888 Rev 9
Response
EOF
LRIS2KWrite AFI
Figure 46. Write AFI frame exchange between VCD and LRIS2K
VCDSOF
LRIS2K<-t
Write AFI
request
EOF
-> SOF
1
LRIS2K<------------ t
Write AFI
response
------------><- t1 -> SOF
W
EOF
Write sequence
when error
Write AFI
response
EOF
Doc ID 13888 Rev 965/98
Lock AFILRIS2K
31 Lock AFI
On receiving the Lock AFI request, the LRIS2K locks the AFI value permanently.
During the write cycle t
, there should be no modulation (neither 100% nor 10%).
W
Otherwise, the LRIS2K may not Lock correctly the AFI value in memory. The t
equal to t
Table 49.Lock AFI request format
Request
SOF
+ 18 × 302 µs.
1nom
Request_
flags
8 bits28h
Lock
AFI
UIDCRC16
64 bits16 bits
Request parameter:
●UID (optional)
Table 50.Lock AFI response format when Error_flag is NOT set
Response
SOF
Response_flagsCRC16
8 bits16 bits
Response parameter:
●No parameter
Table 51.Lock AFI response format when Error_flag is set
time is
W
Request
Response
EOF
EOF
Response
SOF
Response_
Flags
Error codeCRC16
8 bits8 bits16 bits
Response parameter:
●Error code as Error_flag is set
–11h: block is locked
–14h: block not locked
Figure 47. Lock AFI frame exchange between VCD and LRIS2K
VCDSOF
LRIS2K<-t
LRIS2K<------------ t
Lock AFI
request
EOF
-> SOF
1
Lock AFI
response
------------><- t1 -> SOF
W
EOF
Response
EOF
Lock sequence when
error
Lock AFI
response
EOF
66/98Doc ID 13888 Rev 9
LRIS2KWrite DSFID
32 Write DSFID
On receiving the Write DSFID request, the LRIS2K writes the DSFID byte value into its
memory.
During the write cycle t
, there should be no modulation (neither 100% nor 10%).
W
Otherwise, the LRIS2K may not write correctly the DSFID value in memory. The t
equal to t
Table 52.Write DSFID request format
Request
SOF
+ 18 × 302 µs.
1nom
Request_
flags
8 bits29h
Write
DSFID
UIDDSFIDCRC16
64 bits8 bits16 bits
Request parameters:
●UID (optional)
●DSFID
Table 53.Write DSFID response format when Error_flag is NOT set
Response
SOF
Response_flagsCRC16
8 bits16 bits
Response parameter:
●No parameter
Table 54.Write DSFID response format when Error_flag is set
time is
W
Request
EOF
Response
EOF
Response
SOF
Response_flagsError codeCRC16
8 bits8 bits16 bits
Response parameter:
●Error code as Error_flag is set
–12h: block is locked
–13h: block not programmed
Doc ID 13888 Rev 967/98
Response
EOF
Write DSFIDLRIS2K
Figure 48. Write DSFID frame exchange between VCD and LRIS2K
VCDSOF
LRIS2K<-t
Write DSFID
request
EOF
-> SOF
1
LRIS2K<------------ t
Write DSFID
response
------------><- t1 -> SOF
W
Write sequence when
EOF
Write DSFID
response
error
EOF
68/98Doc ID 13888 Rev 9
LRIS2KLock DSFID
33 Lock DSFID
On receiving the Lock DSFID request, the LRIS2K locks the DSFID value permanently.
During the write cycle t
, there should be no modulation (neither 100% nor 10%).
W
Otherwise, the LRIS2K may not lock correctly the DSFID value in memory. The t
equal to t
Table 55.Lock DSFID request format
Request
SOF
+ 18 × 302 µs.
1nom
Request_
flags
8 bits2Ah
Lock
DSFID
UIDCRC16
64 bits16 bits
Request parameter:
●UID (optional)
Table 56.Lock DSFID response format when Error_flag is NOT set
Response
SOF
Response_flagsCRC16
8 bits16 bits
Response parameter:
●No parameter.
Table 57.Lock DSFID response format when Error_flag is set
time is
W
Request
EOF
Response
EOF
Response
SOF
Response_flagsError codeCRC16
8 bits8 bits16 bits
Response parameter:
●Error code as Error_flag is set:
–11h: block is locked
–14h: block not locked
Figure 49. Lock DSFID frame exchange between VCD and LRIS2K
VCDSOF
LRIS2K<-t
LRIS2K<------------ t
Lock DSFID
request
EOF
-> SOF
1
Lock DSFID
response
------------><- t1 -> SOF
W
EOF
Response
Lock sequence
when error
Lock DSFID
response
EOF
EOF
Doc ID 13888 Rev 969/98
Get System InfoLRIS2K
34 Get System Info
When receiving the Get System Info command, the LRIS2K sends back its information data
in the request.The Option_flag is supported and must be reset to 0. The Get System Info
can be issued in both Addressed and Non Addressed modes.
Table 58.Get System Info request format
Request
SOF
Request
_flags
Get System
Info
UIDCRC16
Request
EOF
8 bits2Bh64 bits16 bits
Request parameter:
●UID (optional)
Table 59.Get System Info response format when Error_flag is NOT set
Response
SOF
Response
_flags
Information
_flags
UIDDSFID AFI
Memory
Size
reference
00h0Fh64 bits 8 bits 8 bits 033Fh 001010xx
IC
CRC16
16 bits
b
Response
EOF
Response parameters:
●Information flags set to 0Fh. DSFID, AFI, memory size and IC reference fields are
present
●UID code on 64 bits
●DSFID value
●AFI value
●Memory size. The LRIS2K provides 64 blocks (3Fh) of 4 byte (03h)
●IC Reference. Only the 6 MSB are significant. The product code of the LRIS2K is
00 1010
Table 60.Get System Info response format when Error_flag is set
b
=10
d
Response SOF
Response_
flags
Error codeCRC16Response EOF
01h0Fh16 bits
Response parameter:
●Error code as Error_flag is set:
–03h: Option not supported
–0Fh: other error
70/98Doc ID 13888 Rev 9
LRIS2KGet System Info
Figure 50. Get System Info frame exchange between VCD and LRIS2K
VCDSOF
Get System Info
request
EOF
LRIS2K<-t
-> SOF Get System Info response EOF
1
Doc ID 13888 Rev 971/98
Get Multiple Block Security StatusLRIS2K
35 Get Multiple Block Security Status
When receiving the Get Multiple Block Security Status command, the LRIS2K sends back
the block security status. The blocks are numbered from '00 to '3F' in the request and the
value is minus one (–1) in the field. For example, a value of '06' in the “Number of blocks”
field requests to return the security status of 7 blocks. In request, option flag must be set to
0.
Table 61.Get Multiple Block Security Status request format
Get
Request
SOF
Request
_flags
Multiple
Block
Security
Status
UID
First
block
number
Number
of
blocks
CRC16
Request
EOF
8 bits2Ch
64 bits8 bits8 bits16 bits
Request parameters:
●UID (optional)
●First block number
●Number of blocks
NOT set
Table 62.Get Multiple Block Security Status response format when Error_flag is
NOT set
Response
SOF
1. Repeated as needed.
Response_
Flags
8 bits
Block locking
status
(1)
8 bits
CRC16
16 bits
Response
EOF
Response parameters:
●Block Locking Status (see Table 63: Block Locking status)
●N blocks of data
Table 63.Block Locking status
b
7
Reserved for future use. All
b
at 0
6
b
5
b
4
b
3
password control
bits
b
2
b
Read / Write
protection bits
1
0: Current Block not locked
1: Current Block locked
b
0
Table 64.Get Multiple Block Security Status response format when Error_flag is
set
Response
SOF
72/98Doc ID 13888 Rev 9
Response_
Flags
Error codeCRC16
8 bits8 bits16 bits
Response
EOF
LRIS2KGet Multiple Block Security Status
Response parameter:
●Error code as Error_flag is set:
–03h: Option not supported
–0Fh: other error
Figure 51. Get Multiple Block Security Status frame exchange between VCD and
LRIS2K
VCDSOF
Get Multiple Block
Security Status
EOF
LRIS2K<-t
-> SOF
1
Get Multiple Block
Security Status
EOF
Doc ID 13888 Rev 973/98
KillLRIS2K
36 Kill
On receiving the Kill command, in the Addressed mode only, the LRIS2K compares the kill
code with the data contained in the request and reports whether the operation was
successful in the request. If the command is received in the Non Addressed or the Selected
mode, the LRIS2K returns an error response.
During the comparison cycle equal to t
10%). Otherwise, the LRIS2K may not match the kill code correctly. The t
+ 18 × 302 µs. After a successful Kill command, the LRIS2K is deactivated and does
t
1nom
, there should be no modulation (neither 100% nor
W
time is equal to
W
not interpret any other command.
Table 65.Kill request format
Request
SOF
Request
_flags
Kill
IC
MFG
Code
UID
Kill
access
Kill code CRC16
8 bitsA6h0x0264 bits00h32 bits16bits
Request parameters:
●UID
●Kill code
Table 66.Kill response format when Error_flag is NOT set
Response
SOF
Response_flagsCRC16
8 bits16 bits
Response parameter:
●No parameter. The response is send back after the writing cycle
Table 67.Kill response format when Error_flag is set
Request
EOF
Response
EOF
Response
SOF
Response_
Flags
Error codeCRC16
8 bits8 bits16 bits
Response parameter:
●Error code as Error_flag is set:
–0Fh: other error
–14h: LRIS2K not killed
74/98Doc ID 13888 Rev 9
Response
EOF
LRIS2KKill
Figure 52. Kill frame exchange between VCD and LRIS2K
VCDSOF Kill request EOF
LRIS2K<-t
-> SOFKill responseEOF
1
LRIS2K<------------ tW ------------><- t1 -> SOF
Kill sequence when
error
Kill
response
EOF
Doc ID 13888 Rev 975/98
Write PasswordLRIS2K
37 Write Password
On receiving the Write Password command, the LRIS2K uses the data contained in the
request to write the password and reports whether the operation was successful in the
request. The Option_flag is supported.
During the write cycle time, t
Otherwise, the LRIS2K may not correctly program the data into the memory. The t
equal to t
+ 18 × 302 µs. After a successful write, the selected password must be locked
1nom
, there must be no modulation at all (neither 100% nor 10%).
W
time is
W
again by issuing a Lock Password command to re-activate the block protection.
Prior to writing the password for a block, the Write Password command erases the Protect
Status area of the block.
Table 68.Write Password request format
Request
SOF
Request
_flags
Write
Password
8 bitsB1h02h
IC
MFG
code
UID
Password
number
DataCRC16
64 bits8 bits32 bits16 bits
Request
EOF
Request parameters:
●UID (optional)
●Password number (00h = Kill, 01h = Pswd1, 02h = Pswd2, 03h = Pswd3, other = Error)
●Data
Table 69.Write Password response format when Error_flag is NOT set
Response
SOF
Response_flagsCRC16
Response
EOF
8 bits16 bits
Response parameter:
●32-bit password value. The response is sent back after the write cycle.
Table 70.Write Password response format when Error_flag is set
Response
SOF
Response_
Flags
Error codeCRC16
8 bits8 bits16 bits
Response parameter:
●Error code as Error_flag is set:
–10h: block address not available
–12h: block is locked
–13h: block not programmed
76/98Doc ID 13888 Rev 9
Response
EOF
LRIS2KWrite Password
Figure 53. Write Password frame exchange between VCD and LRIS2K
Write
VCDSOF
Password
request
EOF
LRIS2K<-t1-> SOF
Write Password
response
EOF
LRIS2K<------------ tW ------------><- t1 -> SOF
Write sequence when
error
Write
Password
EOF
response
Doc ID 13888 Rev 977/98
Lock PasswordLRIS2K
38 Lock Password
On receiving the Lock Password command, the LRIS2K sets the access rights and
permanently locks the selected block. The Option_flag is supported.
RFU bit 8 of the request_flag is used to select either the memory area (bit 8 = ‘0’) or the
password area (bit 8 = ‘1’).
During the write cycle t
, there should be no modulation (neither 100% nor 10%) otherwise,
W
the LRIS2K may not correctly lock the memory block.
time is equal to t
The t
W
Table 71.Lock Password request format
Request
SOF
Request
_flags
Password
8 bitsB2h02h
+ 18 × 302 µs.
1nom
Lock
IC
MFG
code
UID
Block
number
Protect
Status
CRC16
64 bits8 bits8 bits16 bits
Request
EOF
Request parameters:
●(Optional) UID
●Block number (bit 8 = ‘1’: 00h = Kill, 01h = Pswd1, 02h = Pswd2, 03h = Pswd3, other =
Error)
●Protect status (refer to Ta bl e 7 2 )
Table 72.Protect status
b
7
000password control bits
1. b1b2 is 00 or 11. Other combinations are reserved but will behave as 11 in terms of protection settings.
b
6
b
5
b
4
b
3
b
2
Read / Write protection
bits
(1)
b
1
b
0
1
Table 73.Lock Password response format when Error_flag is NOT set
Response
SOF
Response_flagsCRC16
8 bits16 bits
Response parameter:
●No parameter.
Table 74.Lock Password response format when Error_flag is set
Response
SOF
78/98Doc ID 13888 Rev 9
Response_
Flags
Error codeCRC16
8 bits8 bits16 bits
Response
EOF
Response
EOF
LRIS2KLock Password
Response parameter:
●Error code as Error_flag is set:
–10h: block address not available
–11h: block is locked
–14: block not locked
Figure 54. Lock Password frame exchange between VCD and LRIS2K
Lock
VCDSOF
Password
request
EOF
LRIS2K<-t1-> SOF
LRIS2K<------------ t
Lock Password
response
------------><- t1 -> SOF
W
Lock sequence when
EOF
Lock
Password
response
error
EOF
Doc ID 13888 Rev 979/98
Present PasswordLRIS2K
39 Present Password
On receiving the Present Password command, the LRIS2K compares the requested
password with the data contained in the request and reports whether the operation has
been successful in the request. The Option_flag is supported.
During the comparison cycle equal to t
10%) otherwise, the LRIS2K the Password value may not be correctly compared.
time is equal to t
The t
W
+ 18 × 302 µs.
1nom
After a successful command, the access to all the memory blocks linked to the password is
changed as described in Section 2: LRIS2K block security.
Table 75.Present Password request format
, there should be no modulation (neither 100% nor
W
Request
SOF
Request
_flags
Present
Password
8 bitsB3h02h
IC
MFG
code
UID
Password
number
DataCRC16
64 bits8 bits32 bits16 bits
Request parameters:
●UID (optional)
●Password number (0x01 = Pswd1, 0x02 = Pswd2, 0x03 = Pswd3, other = Error)
●Data
Table 76.Present Password response format when Error_flag is NOT set
Response
SOF
Response_flagsCRC16
Response
EOF
8 bits16 bits
Response parameter:
●No parameter. The response is send back after the writing cycle
Table 77.Present Password response format when Error_flag is set
Response
SOF
Response_
Flags
Error codeCRC16
Response
Request
EOF
EOF
8 bits8 bits16 bits
Response parameter:
●Error code as Error_flag is set:
–0Fh: other error
80/98Doc ID 13888 Rev 9
LRIS2KPresent Password
Figure 55. Present Password frame exchange between VCD and LRIS2K
Present
VCDSOF
LRIS2K<-t
LRIS2K<------------ t
Password
request
EOF
-> SOF
1
Present
Password
response
------------><- t1 -> SOF
W
EOF sequence when error
Present
Password
EOF
response
Doc ID 13888 Rev 981/98
Fast Read Single BlockLRIS2K
40 Fast Read Single Block
On receiving the Fast Read Single Block command, the LRIS2K reads the requested block
and sends back its 32-bit value in the request. The Option_flag is supported. The data rate
of the response is multiplied by 2.
Table 78.Fast Read Single Block request format
Request
SOF
Request_
flags
Fast Read
Single
Block
8 bitsC0h02h
IC
MFG
code
UID
Block
number
CRC16
64 bits8 bits16 bits
Request
Request parameters:
●Option_flag
●UID (optional)
●Block number
Table 79.Fast Read Single Block response format when Error_flag is NOT set
Response
SOF
Response
_flags
8 bits
Block
Locking
DataCRC16
Status
8 bits32 bits16 bits
Response
EOF
Response parameters:
●Block Locking Status if Option_flag is set (see Ta bl e 8 0 )
●4 bytes of block data
Table 80.Block Locking status
b
7
Reserved for future used. All
b
at 0
6
b
5
b
4
b
3
password control
bits
b
2
b
1
Read / Write
protection bits
b
0
0: Current Block not locked
1: Current Block locked
EOF
Table 81.Fast Read Single Block response format when Error_flag is set
Response
SOF
Response_
Flags
Error codeCRC16
8 bits8 bits16 bits
Response parameter:
●Error code as Error_flag is set:
–0Fh: other error
–10h: block address not available
82/98Doc ID 13888 Rev 9
Response
EOF
LRIS2KFast Read Single Block
Figure 56. Fast Read Single Block frame exchange between VCD and LRIS2K
VCDSOF
Fast Read Single
Block request
EOF
LRIS2K<-t
-> SOF
1
Fast Read Single
Block response
EOF
Doc ID 13888 Rev 983/98
Fast Inventory InitiatedLRIS2K
41 Fast Inventory Initiated
Before receiving the Fast Inventory Initiated command, the LRIS2K must have received an
Initiate or a Fast Initiate command in order to set the Initiate_ flag. If not, the LRIS2K does
not answer to the Fast Inventory Initiated command.
On receiving the Fast Inventory Initiated request, the LRIS2K runs the anticollision
sequence. The Inventory_flag must be set to 1. The meaning of flags 5 to 8 is shown in
Table 19: Request_flags 5 to 8 when Bit 3 = 1. The data rate of the response is multiplied by
2.
The request contains the:
●flags
●Inventory command code
●AFI option not supported, AFI_flag must be set to 0
●mask length
●mask value
●CRC
The LRIS2K does not generate any answer in case of error.
During an Inventory process, if the VCD does not receive an RF LRIS2K response, it waits a
before sending an EOF to switch to the next slot. t3 starts from the rising edge of the
time t
3
request EOF sent by the VCD.
●If the VCD sends a 100% modulated EOF, the minimum value of t
min = 4384/fC (323.3µs) + t
t
3
If the VCD sends a 10% modulated EOF, the minimum value of t3 is:
●
min = 4384/fC (323.3µs) + t
t
3
SOF
NRT
is:
3
where:
●t
●t
t
NRT
is the time required by the LRIS2K to transmit an SOF to the VCD
SOF
is the nominal response time of the LRIS2K
NRT
and t
are dependent on the LRIS2K-to-VCD data rate and subcarrier modulation
SOF
mode.
84/98Doc ID 13888 Rev 9
LRIS2KFast Initiate
42 Fast Initiate
On receiving the Fast Initiate command, the LRIS2K sets the internal Initiate_flag and sends
back a request. The command has to be issued in the Non Addressed mode only
(Select_flag is reset to 0 and Address_flag is reset to 0). If an error occurs, the LRIS2K does
not generate any answer. The Initiate_flag is reset after a power off of the LRIS2K. The data
rate of the response is multiplied by 2.
The request contains:
●No data
Table 84.Fast Initiate request format
Request
SOF
Request_flags
Fast
Initiate
IC MFG
code
CRC16
8 bitsC2h02h16 bits
The response contains:
●the flags
●the Unique ID
Table 85.Fast Initiate response format
Response
SOF
Figure 57. Fast Initiate frame exchange between VCD and LRIS2K
VCDSOF Fast Initiate request EOF
LRIS2K<-t
Response
_flags
DSFIDUIDCRC16
8 bits00h64 bits16 bits
-> SOF Fast Initiate response EOF
1
Request
EOF
Response
EOF
Doc ID 13888 Rev 985/98
Inventory InitiatedLRIS2K
43 Inventory Initiated
Before receiving the Inventory Initiated command, the LRIS2K must have received an
Initiate or a Fast Initiate command in order to set the Initiate_ flag. If not, the LRIS2K does
not answer to the Inventory Initiated command.
On receiving the Inventory Initiated request, the LRIS2K runs the anticollision sequence.
The Inventory_flag must be set to 1. The meaning of flags 5 to 8 is given in Tab le 1 9 :
Request_flags 5 to 8 when Bit 3 = 1.
The request contains the:
●flags
●Inventory command code
●AFI option not supported, AFI_flag must be set to 0
●mask length
●mask value
●CRC
The LRIS2K does not generate any answer in case of error.
Table 86.Inventory Initiated request format
Request
SOF
Request
_flags
Inventory
Initiated
IC MFG
code
Optional
AFI
Mask
length
Mask valueCRC16
Request
EOF
8 bitsD1h02h8 bits8 bits0 - 64 bits16 bits
The response contains the:
●flags
●unique ID
Table 87.Inventory Initiated response format
Response SOF Response_flags DSFIDUIDCRC16Response EOF
8 bits0x0064 bits16 bits
During an Inventory process, if the VCD does not receive an RF LRIS2K response, it waits a
before sending an EOF to switch to the next slot. t3 starts from the rising edge of the
time t
3
request EOF sent by the VCD.
●If the VCD sends a 100% modulated EOF, the minimum value of t
min = 4384/fC (323.3µs) + t
t
3
If the VCD sends a 10% modulated EOF, the minimum value of t3 is:
●
min = 4384/fC (323.3µs) + t
t
3
SOF
NRT
is:
3
where:
●t
●t
t
NRT
is the time required by the LRIS2K to transmit an SOF to the VCD
SOF
is the nominal response time of the LRIS2K
NRT
and t
are dependent on the LRIS2K-to-VCD data rate and subcarrier modulation
SOF
mode.
86/98Doc ID 13888 Rev 9
LRIS2KInitiate
44 Initiate
On receiving the Initiate command, the LRIS2K sets the internal Initiate_flag and sends
back a request. The command has to be issued in the Non Addressed mode only
(Select_flag is reset to 0 and Address_flag is reset to 0). If an error occurs, the LRIS2K does
not generate any answer. The Initiate_flag is reset after a power off of the LRIS2K.
The request contains:
●No data
Table 88.Initiate request format
Request
SOF
Request_flagsInitiate
IC MFG
code
CRC16
8 bitsD2h02h16 bits
The response contains the:
●flags
●unique ID
Table 89.Initiate Initiated response format
Response
SOF
Figure 58. Initiate frame exchange between VCD and LRIS2K
VCDSOF
LRIS2K<-t
Response
_flags
DSFIDUIDCRC16
8 bits00h64 bits16 bits
Initiate
request
EOF
-> SOF
1
Initiate
response
EOF
Request
EOF
Response
EOF
Doc ID 13888 Rev 987/98
Maximum ratingLRIS2K
45 Maximum rating
Stressing the device above the rating listed in the absolute maximum ratings table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
This section summarizes the operating and measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC characteristic tables that
follow are derived from tests performed under the measurement conditions summarized in
the relevant tables. Designers should check that the operating conditions in their circuit
match the measurement conditions when relying on the quoted parameters.
Table 91.AC characteristics
SymbolParameterConditionMinTypMaxUnit
(1) (2)
f
CC
MI
CARRIER
t
RFR,tRFF
t
RFSBL
MI
CARRIER
t
RFR,tRFF
t
RFSBL
t
JIT
t
MIN CD
f
SH
f
SL
t
1
t
2
t
W
1. T
= –20 to 85 °C.
A
2. All timing measurements were performed on a reference antenna with the following characteristics:
External size: 75 mm x 48 mm
Number of turns: 6
Width of conductor: 1 mm
Space between 2 conductors: 0.4 mm
Value of the tuning capacitor: 21 pF (LRIS2K-SBN18)
Value of the coil: 4.3 µH
Tuning frequency: 13.8 MHz.
External RF signal frequency13.553 13.56 13.567 MHz
10% carrier modulation indexMI=(A-B)/(A+B)1030%
10% rise and fall time0.53.0µs
10% minimum pulse width for bit7.19.44µs
100% carrier modulation indexMI=(A-B)/(A+B)95100%
100% rise and fall time0.53.5µs
100% minimum pulse width for bit7.19.44µs
Bit pulse jitter-2+2µs
Minimum time from carrier
generation to first data
From H-field min0.11ms
Subcarrier frequency highFCC/32423.75KHz
Subcarrier frequency lowFCC/28484.28KHz
Time for LRIS2K response4224/F
Time between commands4224/F
Programming time (including
internal verify time)
S
S
318.6320.9323.3µs
309311.5314µs
5.8ms
Doc ID 13888 Rev 989/98
DC and AC parametersLRIS2K
AI06680
AB
t
RFF
t
RFR
t
RFSBL
t
MAXt
MIN CD
f
CC
Table 92.DC characteristics
(1)
SymbolParameterTest conditionsMin.Typ.Max.Unit
V
V
Regulated voltage1.53.0V
CC
Retromodulated induced
RET
voltage
ISO10373-710mV
ReadVCC= 3.0 V50µA
I
Supply current
CC
C
1. T
Table 93.Operating conditions
Internal tuning capacitor
TUN
= –20 to 85 °C.
A
WriteV
= 3.0 V150µA
CC
f = 13.56 MHz for
SBN18/1
21pF
SymbolParameterMin.Max.Unit
T
A
Ambient operating temperature–2085°C
Figure 59 shows an ASK modulated signal, from the VCD to the LRIS2K. The test condition
for the AC/DC parameters are:
●Close coupling condition with tester antenna (1mm)
●LRIS2K performance measured at the tag antenna
Figure 59. LRIS2K synchronous timing, transmit and receive
90/98Doc ID 13888 Rev 9
LRIS2KPart numbering
47 Part numbering
Table 94.Ordering information scheme
Example:LRIS2K - SBN18/ 1GE
Device type
LRIS2K
Package
SBN18 = 180 µm ± 15 µm bumped and sawn wafer on 8-inch frame
Tuning capacitance
1 = 21 pF
Customer code given by ST
GE
For further information on any aspect of this device, please contact your nearest ST sales
office.
Doc ID 13888 Rev 991/98
Anticollision algorithm (Informative)LRIS2K
Appendix A Anticollision algorithm (Informative)
The following pseudocode describes how anticollision could be implemented on the VCD,
using recursivity.
A.1 Algorithm for pulsed slots
function push (mask, address); pushes on private stack
function pop (mask, address); pops from private stack
function pulse_next_pause; generates a power pulse
function store(LRIS2K_UID); stores LRIS2K_UID
function poll_loop (sub_address_size as integer)
pop (mask, address)
mask = address & mask; generates new mask
; send the request
mode = anticollision
send_Request (Request_cmd, mode, mask length, mask value)
for sub_address = 0 to (2^sub_address_size - 1)
pulse_next_pause
if no_collision_is_detected ; LRIS2K is inventoried
then
store (LRIS2K_UID)
else ; remember a collision was detected
push(mask,address)
endif
next sub_address
if stack_not_empty ; if some collisions have been detected and
then ; not yet processed, the function calls itself
poll_loop (sub_address_size); recursively to process the
The cyclic redundancy check (CRC) is calculated on all data contained in a message, from
the start of the flags through to the end of data. The CRC is used from VCD to LRIS2K and
from LRIS2K to VCD.
To add extra protection against shifting errors, a further transformation on the calculated
CRC is made. The One’s Complement of the calculated CRC is the value attached to the
message for transmission.
To check received messages the 2 CRC bytes are often also included in the re-calculation,
for ease of use. In this case, the expected value for the generated CRC is the residue
F0B8h.
B.2 CRC calculation example
This example in C language illustrates one method of calculating the CRC on a given set of
bytes comprising a message.
C-example to calculate or check the CRC16 according to ISO/IEC 13239
#define NUMBER_OF_BYTES4// Example: 4 data bytes
#define CALC_CRC1
#define CHECK_CRC0
void main()
{
unsigned int current_crc_value;
unsigned char array_of_databytes[NUMBER_OF_BYTES + 2] = {1, 2, 3,
4, 0x91, 0x39};
int number_of_databytes = NUMBER_OF_BYTES;
int calculate_or_check_crc;
int i, j;
calculate_or_check_crc = CALC_CRC;
// calculate_or_check_crc = CHECK_CRC;// This could be an other
example
if (calculate_or_check_crc == CALC_CRC)
{
if (calculate_or_check_crc == CALC_CRC)
{
current_crc_value = ~current_crc_value;
printf ("Generated CRC is 0x%04X\n", current_crc_value);
// current_crc_value is now ready to be appended to the data
stream
// (first LSByte, then MSByte)
}
else // check CRC
{
if (current_crc_value == CHECK_VALUE)
{
printf ("Checked CRC is ok (0x%04X)\n",
current_crc_value);
}
else
{
printf ("Checked CRC is NOT ok (0x%04X)\n",
current_crc_value);
}
}
}
94/98Doc ID 13888 Rev 9
LRIS2KApplication family identifier (AFI) (informative)
Appendix C Application family identifier (AFI)
(informative)
The AFI (application family identifier) represents the type of application targeted by the VCD
and is used to extract from all the LRIS2K present only the LRIS2K meeting the required
application criteria.
It is programmed by the LRIS2K issuer (the purchaser of the LRIS2K). Once locked, it
cannot be modified.
The most significant nibble of the AFI is used to code one specific or all application families,
as defined in Ta b le 9 6 .
The least significant nibble of the AFI is used to code one specific or all application
subfamilies. Subfamily codes different from 0 are proprietary.
Table 96.AFI coding
(1)
AFI
Most
significant
nibble
‘0’‘0’All families and subfamilies No applicative preselection
‘X’'0'All subfamilies of family X Wide applicative preselection
'X'‘Y’Only the Yth subfamily of family X
‘0’ ‘Y’Proprietary subfamily Y only
‘1'‘0’, ‘Y’Transport Mass transit, Bus, Airline,...
Corrected IC reference in Table 59: Get System Info response format
when Error_flag is NOT set.
AFI_flag not supported by Fast Inventory and Inventory initiated
commands (see Section 41: Fast Inventory Initiated, Section 43:
Inventory Initiated).
19-Sep-20119
Updated Section 1: Description.
Updated disclaimer on last page.
Doc ID 13888 Rev 997/98
LRIS2K
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