1024-bit EEPROM tag IC at 13.56 MHz, with 64-bit UID and
Sawn and bumped wafer
kill code, ISO 15693 and ISO 18000-3 Mode 1 compliant
Features
■ ISO 15693 standard fully compliant
■ ISO 18000-3 Mode 1 standard fully compliant
■ 13.56 MHz ±7 kHz carrier frequency
■ To tag: 10% or 100% ASK modulation using
1/4 (26 Kbit/s) or 1/256 (1.6 Kbit/s) pulse
position coding
■ From tag: load modulation using Manchester
coding with 423 kHz and 484 kHz subcarriers
in low (6.6 Kbit/s) or high (26 Kbit/s) data rate
mode. Supports the 53 Kbit/s data rate with
Fast commands
The LRI1K is a contactless memory powered by the received carrier electromagnetic wave.
It is a 1024-bit electrically erasable programmable memory (EEPROM). The memory is
organized as 32 blocks of 32 bits. The LRI1K is accessed via the 13.56 MHz carrier
electromagnetic wave on which incoming data are demodulated from the received signal
amplitude modulation (ASK: amplitude shift keying). The received ASK wave is 10% or
100% modulated with a data rate of 1.6 Kbit/s using the 1/256 pulse coding mode or a data
rate of 26 Kbit/s using the 1/4 pulse coding mode.
Outgoing data are generated by the LRI1K load variation using Manchester coding with one
or two subcarrier frequencies at 423 kHz and 484 kHz. Data are transferred from the LRI1K
at 6.6 Kbit/s in low data rate mode and 26 Kbit/s fast data rate mode. The LRI1K supports
53 Kbit/s in high data rate mode with one subcarrier frequency at 423 kHz.
The LRI1K follows the ISO 15693 recommendation for radio-frequency power and signal
interface.
Figure 1.Pad connections
Table 1.Signal names
Signal nameFunction
AC1Antenna coil
AC0Antenna coil
10/86Doc ID 17170 Rev 3
LRI1KDescription
1.1 Memory mapping
The LRI1K is divided into 32 blocks of 32 bits. Each block can be individually write-protected
using the Lock command.
Table 2.LRI1K memory map
Add07 815 1623 2431
0User area
1User area
2User area
3User area
4User area
5User area
6User area
7User area
8User area
User area
User area
User area
28User area
29User area
30User area
31User area
UID 0UID 1UID 2UID 3
UID 4UID 5UID 6UID 7
AFIDSFID
Kill code
The User area consists of blocks that are always accessible in read mode. Write operations
are possible if the addressed block is not protected. During a write operation, the 32 bits of
the block are replaced by the new 32-bit value.
The LRI1K also has a 64-bit block that is used to store the 64-bit unique identifier (UID). The
UID is compliant to the ISO 15963 description, and its value is used during the anticollision
sequence (Inventory). This block is not accessible by the user and its value is written by ST
on the production line.
The LRI1K also includes an AFI register in which the application family identifier is stored,
and a DSFID register in which the data storage family identifier used in the anticollision
algorithm is stored. The LRI1K has an additional 32-bit block in which the kill code is stored.
Doc ID 17170 Rev 311/86
DescriptionLRI1K
1.2 Commands
The LRI1K supports the following commands:
●Inventory, used to perform the anticollision sequence.
●Stay Quiet, used to put the LRI1K in quiet mode, where it does not respond to any
inventory command.
●Select, used to select the LRI1K. After this command, the LRI1K processes all
Read/Write commands with Select_flag set.
●Reset To Ready, used to put the LRI1K in the ready state.
●Read Block, used to output the 32 bits of the selected block and its locking status.
●Write Block, used to write the 32-bit value in the selected block, provided that it is not
locked.
●Lock Block, used to lock the selected block. After this command, the block cannot be
modified.
●Read Multiple Blocks, used to read the selected blocks and send back their value.
●Write AFI, used to write the 8-bit value in the AFI register.
●Lock AFI, used to lock the AFI register.
●Write DSFID, used to write the 8-bit value in the DSFID register.
●Lock DSFID, used to lock the DSFID register.
●Get System Info, used to provide the system information value
●Get Multiple Block Security Status, used to send the security status of the selected
block.
●Initiate, used to trigger the tag response to the Inventory Initiated sequence.
●Inventory Initiated, used to perform the anticollision sequence triggered by the Initiate
command.
●Kill, used to definitively deactivate the tag.
●Write Kill, used to write the 32-bit Kill code value
●Lock Kill, used to lock the Kill Code register.
●Fast Initiate, used to trigger the tag response to the Inventory Initiated sequence.
●Fast Inventory Initiated, used to perform the anticollision sequence triggered by the
Initiate command.
●Fast Read Block, used to output the 32 bits of the selected block and its locking status.
●Fast Read Multiple Blocks, used to read the selected blocks and send back their
value.
12/86Doc ID 17170 Rev 3
LRI1KDescription
1.3 Initial dialogue for vicinity cards
The dialog between the vicinity coupling device (VCD) and the vicinity integrated circuit card
or VICC (LRI1K) takes place as follows:
●activation of the LRI1K by the RF operating field of the VCD
●transmission of a command by the VCD
●transmission of a response by the LRI1K
These operations use the RF power transfer and communication signal interface described
below (see Power transfer, Frequency and Operating field). This technique is called RTF
(reader talk first).
1.3.1 Power transfer
Power is transferred to the LRI1K by radio frequency at 13.56 MHz via coupling antennas in
the LRI1K and the VCD. The RF operating field of the VCD is transformed on the LRI1K
antenna as an AC voltage which is rectified, filtered and internally regulated. The amplitude
modulation (ASK) on this received signal is demodulated by the ASK demodulator.
1.3.2 Frequency
The ISO 15693 standard defines the carrier frequency (fc) of the operating field as
13.56 MHz ±7 kHz.
1.3.3 Operating field
The LRI1K operates continuously between H
●The minimum operating field is H
●The maximum operating field is H
A VCD must generate a field of at least H
volume.
and H
min
and has a value of 150 mA/m rms.
min
and has a value of 5 A/m rms.
max
and not exceeding H
min
max
.
max
in the operating
Doc ID 17170 Rev 313/86
Communication signal from VCD to LRI1KLRI1K
AI06683
tRFF
tRFSBL
tRFR
105%
a
t
100%
95%
60%
5%
AI06655B
tRFFtRFSFL tRFR
hr
hf
abt
2 Communication signal from VCD to LRI1K
Communications between the VCD and the LRI1K take place using the modulation principle
of ASK (amplitude shift keying). Two modulation indexes are used, 10% and 100%. The
LRI1K decodes both. The VCD determines which index is used.
The modulation index is defined as [a – b]/[a + b] where a is the peak signal amplitude and b
the minimum signal amplitude of the carrier frequency.
Depending on the choice made by the VCD, a "pause" will be created as described in
Figure 2 and Figure 3.
The LRI1K is operational for any degree of modulation index between 10% and 30%.
The data coding implemented in the LRI1K uses pulse position modulation. Both data
coding modes that are described in the ISO 15693 are supported by the LRI1K. The
selection is made by the VCD and indicated to the LRI1K within the start of frame (SOF).
3.1 Data coding mode: 1 out of 256
The value of one single byte is represented by the position of one pause. The position of the
pause on 1 of 256 successive time periods of 18.88 µs (256/f
byte. In this case the transmission of one byte takes 4.833 ms and the resulting data rate is
1.65 Kbits/s (f
/8192).
C
Figure 4 illustrates this pulse position modulation technique. In this Figure, data E1h (225
decimal) is sent by the VCD to the LRI1K.
The pause occurs during the second half of the position of the time period that determines
the value, as shown in Figure 5.
A pause during the first period transmits the data value 00h. A pause during the last period
transmits the data value FFh (255 decimal).
), determines the value of the
C
Figure 4.1 out of 256 coding mode
Doc ID 17170 Rev 315/86
Data rate and data codingLRI1K
AI06657
2
2
5
18.88 µs
9.44 µs
Pulse
Modulated
Carrier
2
2
6
2
2
4
. . . . . . .. . . . . . .
Time Period
one of 256
Figure 5.Detail of one time period
16/86Doc ID 17170 Rev 3
LRI1KData rate and data coding
AI06658
9.44 µs9.44 µs
75.52 µs
28.32 µs9.44 µs
75.52 µs
47.20µs9.44 µs
75.52 µs
66.08 µs9.44 µs
75.52 µs
Pulse position for "00"
Pulse position for "11"
Pulse position for "10" (0=LSB)
Pulse position for "01" (1=LSB)
3.2 Data coding mode: 1 out of 4
The value of 2 bits is represented by the position of one pause. The position of the pause on
1 of 4 successive time periods of 18.88 µs (256/f
successive pairs of bits form a byte, where the least significant pair of bits is transmitted first.
In this case the transmission of one byte takes 302.08 µs and the resulting data rate is
26.48 Kbit/s (f
/512). Figure 6 illustrates the 1 out of 4 pulse position technique and coding.
C
Figure 7 shows the transmission of E1h (225d - 1110 0001b) by the VCD.
Figure 6.1 out of 4 coding mode
) determines the value of the 2 bits. Four
C
Doc ID 17170 Rev 317/86
Data rate and data codingLRI1K
AI06659B
75.52 µs
75.52 µs
75.52 µs75.52 µs
00
10
0111
AI06661
37.76 µs
9.44 µs
9.44 µs
37.76 µs
Figure 7.1 out of 4 coding example
3.3 VCD to LRI1K frames
Frames are delimited by a start of frame (SOF) and an end of frame (EOF). They are
implemented using code violation. Unused options are reserved for future use.
The LRI1K is ready to receive a new command frame from the VCD 311.5 µs (t
sending a response frame to the VCD.
The LRI1K takes a Power-On time of 0.1 ms after being activated by the powering field.
After this delay, the LRI1K is ready to receive a command frame from the VCD.
3.4 Start of frame (SOF)
The SOF defines the data coding mode the VCD is to use for the following command frame.
The SOF sequence described in Figure 8 selects the 1 out of 256 data coding mode.
The SOF sequence described in Figure 9 selects the 1 out of 4 data coding mode.
The EOF sequence for either coding mode is described in Figure 10.
Figure 8.SOF to select 1 out of 256 data coding mode
) after
2
18/86Doc ID 17170 Rev 3
LRI1KData rate and data coding
AI06660
37.76µs
9.44µs
9.44µs
37.76µs
9.44µs
AI06662
9.44 µs
37.76 µs
9.44 µs
Figure 9.SOF to select 1 out of 4 data coding mode
Figure 10. EOF for either data coding mode
Doc ID 17170 Rev 319/86
Communications signal from LRI1K to VCDLRI1K
4 Communications signal from LRI1K to VCD
The LRI1K has several modes defined for some parameters, owing to which it can operate
in different noise environments and meet different application requirements.
4.1 Load modulation
The LRI1K is capable of communication with the VCD via an inductive coupling area
whereby the carrier is loaded to generate a subcarrier with frequency f
generated by switching a load in the LRI1K.
The load-modulated amplitude received on the VCD antenna shall be at least 10 mV when
measured as described in the test methods defined in International Standard ISO 10373-7.
4.2 Subcarrier
The LRI1K supports the one-subcarrier and two-subcarrier response formats. These
formats are selected by the VCD using the first bit in the protocol header. When one
subcarrier is used, the frequency f
When two subcarriers are used, frequency f
484.28 kHz (f
continuous phase relationship between f
C
of the subcarrier load modulation is 423.75 kHz (fC/32).
S1
is 423.75 kHz (fC/32), and frequency fS2 is
S1
/28). When using the two-subcarrier mode, the LRI1K generates a
and fS2.
S1
. The subcarrier is
S
4.3 Data rates
The LRI1K can respond using the low or the high data rate format. The selection of the data
rate is made by the VCD using the second bit in the protocol header. It also supports the x2
mode available on all the Fast commands. Table 4 shows the different data rates produced
by the LRI1K using the different response format combinations.
Table 4.Response data rate
Data rateOne subcarrierTwo subcarriers
Low
High
Standard commands6.62 Kbits/s (f
Fast commands13.24 Kbits/s (f
Standard commands26.48 Kbits/s (f
Fast commands52.97 Kbits/s (f
/2048)6.67 Kbits/s (fc/2032)
c
/1024)not applicable
c
/512)26.69 Kbits/s (fc/508)
c
/256)not applicable
c
20/86Doc ID 17170 Rev 3
LRI1KBit representation and coding
37.76µs
ai12076
18.88µs
ai12066
37.76µs
ai12077
18.88µs
ai12067
5 Bit representation and coding
Data bits are encoded using Manchester coding, according to the following schemes. For
the low data rate, the same subcarrier frequency or frequencies is/are used, in this case the
number of pulses is multiplied by 4 and all times are increased by this factor. For the Fast
commands using one subcarrier, all pulse numbers and times are divided by 2.
5.1 Bit coding using one subcarrier
5.1.1 High data rate
A logic 0 starts with 8 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of
18.88 µs as shown in Figure 11.
Figure 11. Logic 0, high data rate
For the Fast commands, a logic 0 starts with 4 pulses at 423.75 kHz (f
/32) followed by an
C
unmodulated time of 9.44 µs as shown in Figure 12.
Figure 12. Logic 0, high data rate x2
A logic 1 starts with an unmodulated time of 18.88 µs followed by 8 pulses at 423.75 kHz
(f
/32) as shown in Figure 13.
C
Figure 13. Logic 1, high data rate
For the Fast commands, a logic 1 starts with an unmodulated time of 9.44 µs followed by 4
pulses at 423.75 kHz (f
/32) as shown in Figure 14.
C
Figure 14. Logic 1, high data rate x2
Doc ID 17170 Rev 321/86
Bit representation and codingLRI1K
151.04µs
ai12068
75.52µs
ai12069
151.04µs
ai12070
75.52µs
ai12071
5.1.2 Low data rate
A logic 0 starts with 32 pulses at 423.75 kHz (fC/32) followed by an unmodulated time of
75.52 µs as shown in Figure 15.
Figure 15. Logic 0, low data rate
For the fast commands, a logic 0 starts with 16 pulses of 423,75 kHz (f
/32) followed by an
C
unmodulated time of 37,76 µs as shown in Figure 16.
Figure 16. Logic 0, low data rate x2
A logic 1 starts with an unmodulated time of 75,52 µs followed by 32 pulses of 423,75 kHz
(f
/32) as shown in Figure 17.
C
Figure 17. Logic 1, low data rate
For the Fast commands, a logic 1 starts with an unmodulated time of 37.76 µs followed by
16 pulses at 423.75 kHz (f
/32) as shown in Figure 18.
C
Figure 18. Logic 1, low data rate x2
22/86Doc ID 17170 Rev 3
LRI1KBit representation and coding
37.46µs
ai12074
37.46µs
ai12073
149.84µs
ai12072
149.84µs
ai12075
5.2 Bit coding using two subcarriers
5.2.1 High data rate
A logic 0 starts with 8 pulses at 423.75 kHz (fC/32) followed by 9 pulses at 484.28 kHz
(f
/28) as shown in Figure 19. For the Fast commands, the x2 mode is not available.
C
Figure 19. Logic 0, high data rate
A logic 1 starts with 9 pulses at 484.28 kHz (f
(f
/32) as shown in Figure 20. For the Fast commands, the x2 mode is not available.
C
Figure 20. Logic 1, high data rate
5.2.2 Low data rate
A logic 0 starts with 32 pulses at 423.75 kHz (fC/32) followed by 36 pulses at 484.28 kHz
(f
/28) as shown in Figure 21. For the Fast commands, the x2 mode is not available.
C
Figure 21. Logic 0, low data rate
A logic 1 starts with 36 pulses at 484.28kHz (fC/28) followed by 32 pulses at 423.75kHz
(f
/32) as shown in Figure 22. For the fast commands, the x2 mode is not available.
C
Figure 22. Logic 1, low data rate
/28) followed by 8 pulses at 423.75 kHz
C
Doc ID 17170 Rev 323/86
LRI1K to VCD framesLRI1K
113.28µs
ai12078
37.76µs
56.64µs
ai12079
18.88µs
6 LRI1K to VCD frames
Frames are delimited by an SOF and an EOF. They are implemented using code violation.
Unused options are reserved for future use. For the low data rate, the same subcarrier
frequency or frequencies is/are used. In this case the number of pulses is multiplied by 4.
For the Fast commands using one subcarrier, all pulse numbers and times are divided by 2.
6.1 SOF when using one subcarrier
6.1.1 High data rate
The SOF includes an unmodulated time of 56.64 µs followed by 24 pulses at 423.75 kHz
(f
/32), and a logic 1 that consists of an unmodulated time of 18.88 µs followed by 8 pulses
C
at 423.75 kHz. The SOF is shown in Figure 23.
Figure 23. Start of frame, high data rate, one subcarrier
For the Fast commands, the SOF comprises an unmodulated time of 28.32 µs, followed by
12 pulses at 423.75 kHz (f
/32), and a logic 1 that consists of an unmodulated time of
C
9.44 µs followed by 4 pulses at 423.75 kHz as shown in Figure 24.
Figure 24. Start of frame, high data rate, one subcarrier x2
24/86Doc ID 17170 Rev 3
LRI1KLRI1K to VCD frames
453.12µs
ai12080
151.04µs
226.56µs
ai12081
75.52µs
112.39µs
ai12082
37.46µs
449.56µs
ai12083
149.84µs
6.1.2 Low data rate
SOF comprises an unmodulated time of 226.56 µs, followed by 96 pulses at 423.75 kHz
(f
/32), and a logic 1 that consists of an unmodulated time of 75.52 µs followed by 32 pulses
C
at 423.75 kHz as shown in Figure 25.
Figure 25. Start of frame, low data rate, one subcarrier
For the Fast commands, the SOF comprises an unmodulated time of 113.28 µs followed by
48 pulses at 423.75 kHz (f
followed by 16 pulses at 423.75 kHz as shown in Figure 26.
Figure 26. Start of frame, low data rate, one subcarrier x2
/32), and a logic 1 that includes an unmodulated time of 37.76 µs
C
6.2 SOF when using two subcarriers
6.2.1 High data rate
The SOF comprises 27 pulses at 484.28 kHz (fC/28), followed by 24 pulses at 423.75 kHz
(f
/32), and a logic 1 that includes 9 pulses at 484.28 kHz followed by 8 pulses at 423.75
C
kHz as shown in Figure 27.
For the Fast commands, the x2 mode is not available.
Figure 27. Start of frame, high data rate, two subcarriers
6.2.2 Low data rate
The SOF comprises 108 pulses at 484.28 kHz (fC/28) followed by 96 pulses at 423.75 kHz
(f
/32), and a logic 1 that includes 36 pulses at 484.28 kHz followed by 32 pulses at
C
423.75 kHz as shown in Figure 28.
For the Fast commands, the x2 mode is not available.
Figure 28. Start of frame, low data rate, two subcarriers
Doc ID 17170 Rev 325/86
LRI1K to VCD framesLRI1K
113.28µs
ai12084
37.76µs
56.64µs
ai12085
18.88µs
453.12µs
ai12086
151.04µs
226.56µs
ai12087
75.52µs
6.3 EOF when using one subcarrier
6.3.1 High data rate
The EOF comprises a logic 0 that includes 8 pulses at 423.75 kHz and an unmodulated time
of 18.88 µs, followed by 24 pulses at 423.75 kHz (f
56.64 µs as shown in Figure 29.
Figure 29. End of frame, high data rate, one subcarrier
For the Fast commands, the EOF comprises a logic 0 that includes 4 pulses at 423.75 kHz
and an unmodulated time of 9.44 µs, followed by 12 pulses at 423.75 kHz (f
unmodulated time of 28.32 µs as shown in Figure 30.
Figure 30. End of frame, high data rate, one subcarrier x2
/32) and by an unmodulated time of
C
/32) and an
C
6.3.2 Low data rate
The EOF comprises a logic 0 that includes 32 pulses at 423.75 kHz and an unmodulated
time of 75.52 µs, followed by 96 pulses at 423.75 kHz (f
226.56 µs as shown in Figure 31.
Figure 31. End of frame, low data rate, one subcarrier
For the Fast commands, the EOF comprises a logic 0 that includes 16 pulses at 423.75 kHz
and an unmodulated time of 37.76 µs, followed by 48 pulses at 423.75 kHz (f
unmodulated time of 113.28 µs as shown in Figure 32.
Figure 32. End of frame, low data rate, one subcarrier x2
/32) and an unmodulated time of
C
/32) and an
C
26/86Doc ID 17170 Rev 3
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