ST LPS331AP User Manual

LPS331AP

MEMS pressure sensor: 260-1260 mbar absolute digital output barometer

Features

260 to 1260 mbar absolute pressure range

High-resolution mode: 0.020 mbar RMS

Low power consumption:

Low resolution mode: 5.5 µA

High resolution mode: 30 µA

High overpressure capability: 20x full scale

Embedded temperature compensation

Embedded 24-bit ADC

Selectable ODR from 1 Hz to 25 Hz

SPI and I2C interfaces

Supply voltage: 1.71 to 3.6 V

High shock survivability: 10,000 g

Small and thin package

ECOPACK® lead-free compliant

Applications

Indoor and outdoor navigation

Enhanced GPS for dead-reckoning

Altimeter and barometer for portable devices

Weather station equipment

Sport watches

Description

The LPS331AP is an ultra compact absolute piezoresistive pressure sensor. It includes a monolithic sensing element and an IC interface able to take the information from the sensing element and to provide a digital signal to the

external world.

Table 1. Device summary

Datasheet production data

HCLGA-16L (3 x 3 x 1 mm)

The sensing element consists of a suspended membrane realized inside a single mono-silicon substrate. It is capable to detecting pressure and is manufactured using a dedicated process developed by ST, called VENSENS.

The VENSENS process allows to build a monosilicon membrane above an air cavity with controlled gap and defined pressure. The membrane is very small compared to the traditionally built silicon micromachined membranes. Membrane breakage is prevented by an intrinsic mechanical stopper.

The IC interface is manufactured using a standard CMOS process that allows a high level of integration to design a dedicated circuit which is trimmed to better match the sensing element characteristics.

The LPS331AP is available in a small holed cap land grid array (HCLGA) package and it is guaranteed to operate over a temperature range extending from -40 °C to +85 °C. The package is holed to allow external pressure to reach the sensing element.

Order codes

Temperature range [°C]

Package

Packing

 

 

 

 

LPS331APY

-40 to +85

HCLGA-16L

Tray

 

 

LPS331APTR

Tape and reel

 

 

 

 

 

 

March 2012

Doc ID 022112 Rev 7

1/36

 

 

 

 

This is information on a product in full production.

 

www.st.com

Contents

LPS331AP

 

 

Contents

1

Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. 3

 

1.1

LPS331AP block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3

 

1.2

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3

2

Mechanical and electrical specifications . . . . . . . . . . . . . . . . . . . . . . . .

5

 

2.1

Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5

 

2.2

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6

 

2.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

3

Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8

 

3.1

Sensing element . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8

 

3.2

IC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8

 

3.3

Factory calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8

4

Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

9

 

4.1

Soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

9

5

Digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

10

 

5.1

I2C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

10

 

5.2

I2C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

10

5.2.1 I2C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.3 SPI bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

 

5.3.1

SPI read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13

 

5.3.2

SPI write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14

 

5.3.3

SPI read in 3-wires mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

15

6

Register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

16

7

Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

17

8

Package mechanical section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

32

9

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

35

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LPS331AP

Block diagram and pin description

 

 

1 Block diagram and pin description

1.1LPS331AP block diagram

Figure 1. LPS331AP block diagram

p

 

 

 

 

 

 

 

 

 

 

 

noiLowse

frontloga end

ADC ladigitfilter

 

 

 

 

 

 

 

 

 

 

 

 

 

Vup

 

 

 

 

 

MUX

 

 

 

 

 

 

 

 

 

Rs

 

 

 

 

 

Rs

 

 

 

 

an

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Vout

+

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rs

 

 

 

 

 

Rs

 

 

 

 

 

 

 

 

 

Vdown

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Temperature

Sensing sensor

element

Voltage and

current bias

Sensor bias

re

 

CS

forPtemperatu compensation

2C

SCL/SP C

I

SPI

SDA/SDO/SDI

S

 

SA 0/SDO

D

 

 

 

Clock and timing

AM08736V1

1.2Pin description

Figure 2. Pin connection

Pin 1 indicator

 

 

 

 

 

13

 

 

1

 

9

5

Bottom view

AM08737V1

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Block diagram and pin description

LPS331AP

 

 

 

 

 

Table 2.

Pin description

 

 

 

 

 

Pin#

Name

Function

 

 

 

 

 

1

Vdd_IO

Power supply for I/O pins

 

 

 

 

 

2

NC

Not connected

 

 

 

 

 

3

NC

Not connected

 

 

 

 

 

4

SCL

I2C serial clock (SCL)

 

SPC

SPI serial port clock (SPC)

 

 

 

 

 

 

 

5

GND

0 V supply

 

 

 

 

 

 

SDA

I2C serial data (SDA)

 

6

SDI

SPI serial data input (SDI)

 

 

SDO

3-wire interface serial data output (SDO)

 

 

 

 

 

7

SDO

SPI serial data output (SDO)

 

SA0

I2C less significant bit of the device address (SA0)

 

 

 

8

CS

SPI enable

 

I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)

 

 

 

 

9

INT2

Interrupt 2 (or data ready)

 

 

 

 

 

10

Reserved

Connect to GND

 

 

 

 

 

11

INT1

Interrupt 1 (or data ready)

 

 

 

 

 

12

GND

0 V supply

 

 

 

 

 

13

GND

0 V supply

 

 

 

 

 

14

VDD

Power supply

 

 

 

 

 

15

VCCA

Analog power supply

 

 

 

 

 

16

GND

0 V supply

 

 

 

 

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LPS331AP

Mechanical and electrical specifications

 

 

2 Mechanical and electrical specifications

Conditions at VDD = 2.5 V, T = 25 °C, unless otherwise noted.

2.1Mechanical characteristics

.

Mechanical characteristics

 

 

 

 

Table 3.

 

 

 

 

Symbol

Parameter

Test condition

Min.

Typ.(1)

Max.

Unit

 

 

 

 

 

 

 

Top

Operating temperature range

 

-40

85

°C

 

 

 

 

 

 

 

Tfull

Full accuracy temperature

 

0

80

°C

range

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pop

Operating pressure range

 

260

1260

mbar

 

 

 

 

 

 

 

Pbits

Pressure output data

 

24

bits

 

 

 

 

 

 

 

Pres

Pressure sensitivity

 

4096

LSB/

 

mbar

 

 

 

 

 

 

 

 

 

 

 

 

 

Paccrel

Relative accuracy over

P = 800 to 1100 mbar

± 0.1

± 0.2

mbar

pressure(2)

T= 25°C

 

 

 

 

 

PaccT

Absolute accuracy pressure

P = 800 to 1100 mbar

- 3.2

± 2

2.6

mbar

over temperature(3)

 

 

 

T = 0 +80 °C

 

 

 

 

Pnoise

Pressure noise

 

See Table 17.

mbar

 

RMS

 

 

 

 

 

 

 

 

 

 

 

 

 

Tbits

Temperature output data

 

16

bits

 

 

 

 

 

 

 

Tres

Temperature sensitivity

 

480

LSB/°C

 

 

 

 

 

 

 

Tacc

Absolute accuracy temperature

T= 0~+80 °C

± 2

°C

 

 

 

 

 

 

 

1.Typical specifications are not guaranteed.

2.Characterization data. Parameter not tested at final test

3.Embedded pwl compensation.

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Mechanical and electrical specifications

LPS331AP

 

 

2.2Electrical characteristics

Table 4.

Electrical characteristics

 

 

 

 

 

Symbol

Parameter

Test condition

Min.

Typ.(1)

Max.

Unit

 

 

 

 

 

 

 

Vdd

Supply voltage

 

1.71

3.6

V

 

 

 

 

 

 

 

Vdd_IO

IO supply voltage

 

1.71

3.6

V

 

 

 

 

 

 

 

Idd

Supply current @ ODRp 1 Hz and

 

 

see Table 5

µA

ODRt = 1Hz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IddPdn

Supply current in power-down mode

 

0.5

µA

T = 25 °C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1. Typical specifications are not guaranteed.

 

 

 

 

 

Table 5.

Supply current at ODRp 1 Hz, ODRt 1 Hz

 

 

 

Symbol

RES_CONF (hex)

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

73

5.5

 

 

 

 

 

 

 

 

75

6.6

 

 

 

 

 

 

 

Idd

77

11.5

µA

 

 

 

 

 

 

 

78

17.5

 

 

 

 

 

 

 

 

7A

30.0

 

 

 

 

 

 

 

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LPS331AP

Mechanical and electrical specifications

 

 

2.3Absolute maximum ratings

Stress above those listed as “Absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

 

Table 6.

Absolute maximum ratings

 

 

 

Symbol

Ratings

Maximum value

Unit

 

 

 

 

 

 

Vdd

Supply voltage

-0.3 to 4.8

V

 

 

 

 

 

 

Vdd_IO

I/O pins supply voltage

-0.3 to 4.8

V

 

 

 

 

 

 

Vin

Input voltage on any control pin

-0.3 to Vdd_IO +0.3

V

 

 

 

 

 

 

P

Overpressure

20

bar

 

 

 

 

 

 

TSTG

Storage temperature range

-40 to +125

°C

 

ESD

Electrostatic discharge protection

2 (HBM)

kV

 

 

 

 

 

Note:

Supply voltage on any pin should never exceed 4.8 V.

 

 

This is a mechanical shock sensitive device, improper handling can cause permanent damage to the part.

This is an ESD sensitive device, improper handling can cause permanent damage to the part.

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Functionality

LPS331AP

 

 

3 Functionality

The LPS331AP is a high resolution, digital output pressure sensor packaged in an HCLGA holed package. The complete device includes a sensing element based on a piezoresistive Wheatstone bridge approach, and an IC interface able to take the information from the sensing element to the external world, as a digital signal.

3.1Sensing element

An ST proprietary process is used to obtain a mono-silicon µ-sized membrane for MEMS pressure sensors, without requiring substrate to substrate bonding. When pressure is applied, the membrane deflection induces an imbalance in the Wheatstone bridge piezoresistances, whose output signal is converted by the IC interface.

Intrinsic mechanical stoppers prevent breakage in case of pressure overstress, ensuring measurement repeatability.

The pressure inside the buried cavity under the membrane is constant and controlled by process parameters.

3.2IC interface

The complete measurement chain consists of a low-noise capacitive amplifier, which converts the resistive unbalance of the MEMS sensor into an analog voltage signal, and of an analog-to-digital converter, which translates the produced signal into a digital bitstream.

The converter is coupled with a dedicated reconstruction filter which removes the high frequency components of the quantization noise and provides low rate and high resolution digital words.

The pressure data can be accessed through an I2C/SPI interface making the device particularly suitable for direct interfacing with a microcontroller.

3.3Factory calibration

The IC interface is factory calibrated at three temperatures and two pressures for sensitivity and accuracy.

The trimming values are stored inside the device by a non-volatile structure. Whenever the device is turned on, the trimming parameters are downloaded into the registers to be employed during normal operation. This allows the user to employ the device without requiring any further calibration.

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LPS331AP

Application hints

 

 

4 Application hints

Figure 3. LPS331AP electrical connection

Vdd

10µ

16

 

 

14

 

1

 

 

 

13

Vdd_IO

 

 

 

 

TOP VIEW

Res

100nF

 

 

 

 

 

 

 

 

 

 

5

 

 

 

9

 

6

 

 

8

Res

 

 

 

 

 

SCL/SPC

SDA/SDI/SDO

SDO/SA0

CS

 

GND

 

 

 

 

 

Digital signal from/to signal controller. Signal levels are defined through proper selection of Vdd_

The device core is supplied through the Vdd line. Power supply decoupling capacitors (100 nF ceramic, 10 µF aluminum) should be placed as near as possible to the supply pad of the device (common design practice).

The functionality of the device and the measured data outputs are selectable and accessible through the I2C/SPI interface. When using the I2C, CS must be tied high (i.e. connected to Vdd_IO).

4.1Soldering information

The HCLGA package is compliant with the ECOPACK® standard and it is qualified for soldering heat resistance according to JEDEC J-STD-020.

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Digital interfaces

LPS331AP

 

 

5 Digital interfaces

5.1I2C serial interface

The registers embedded in the LPS331AP may be accessed through both the I2C and SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire interface mode.

The serial interfaces are mapped onto the same pads. To select/exploit the I2C interface, CS line must be tied high (i.e. connected to Vdd_IO).

Table 7.

Serial interface pin description

Pin name

Pin description

 

 

 

CS

 

SPI enable

 

I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)

 

 

SCL/

 

I2C serial clock (SCL)

SPC

 

SPI serial port clock (SPC)

 

 

 

SDA/

 

I2C serial data (SDA)

SDI/

 

SPI serial data input (SDI)

SDO

 

3-wire interface serial data output (SDO)

 

 

 

SA0/

 

I2C less significant bit of the device address (SA0)

SDO

 

SPI serial data output (SDO)

 

 

 

5.2I2C serial interface

The LPS331AP I2C is a bus slave. The I2C is employed to write data into registers whose content can also be read back.

The relevant I2C terminology is given in Table 8.

Table 8.

Serial interface pin description

Term

 

Description

 

 

Transmitter

The device which sends data to the bus

 

 

Receiver

The device which receives data from the bus

 

 

 

Master

 

The device which initiates a transfer, generates clock signals and terminates a

 

transfer

 

 

 

 

 

Slave

 

The device addressed by the master

 

 

 

There are two signals associated with the I2C bus: the serial clock line (SCL) and the serial data line (SDA). The latter is a bi-directional line used for sending and receiving the data to/from the interface. Both lines have to be connected to Vdd_IO through pull-up resistors.

The I2C interface is compliant with fast mode (400 kHz) I2C standards as well as with the normal mode.

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LPS331AP

Digital interfaces

 

 

5.2.1I2C operation

The transaction on the bus is started through a START (ST) signal. A start condition is defined as a HIGH to LOW transition on the data line while the SCL line is held HIGH. After this has been transmitted by the master, the bus is considered busy. The next byte of data transmitted after the start condition contains the address of the slave in the first 7 bits and the eighth bit tells whether the master is receiving data from the slave or transmitting data to the slave. When an address is sent, each device in the system compares the first seven bits after a start condition with its address. If they match, the device considers itself addressed by the master.

The slave address (SAD) associated to the LPS331AP is 101110xb. The SDO/SA0 pad can be used to modify the less significant bit of the device address. If the SA0 pad is connected to voltage supply, LSb is ‘1’ (address 1011101b), otherwise if the SA0 pad is connected to ground, the LSb value is ‘0’ (address 1011100b). This solution permits to connect and address two different LPS331APs to the same I2C lines.

Data transfer with acknowledge is mandatory. The transmitter must release the SDA line during the acknowledge pulse. The receiver must then pull the data line LOW so that it remains stable low during the HIGH period of the acknowledge clock pulse. A receiver which has been addressed is obliged to generate an acknowledge after each byte of data received.

The I2C embedded in the LPS331AP behaves like a slave device and the following protocol must be adhered to. After the start condition (ST) a slave address is sent, once a slave acknowledge (SAK) has been returned, a 8-bit sub-address (SUB) will be transmitted: the 7 LSB represents the actual register address while the MSB enables address auto increment. If the MSb of the SUB field is ‘1’, the SUB (register address) will be automatically increased to allow multiple data read/write.

The slave address is completed with a Read/Write bit. If the bit was ‘1’ (Read), a repeated START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (Write) the master will transmit to the slave with direction unchanged. Table 9 explains how the SAD+read/write bit pattern is composed, listing all the possible configurations.

Table 9.

SAD+Read/Write patterns

 

 

 

Command

SAD[6:1]

SAD[0] = SA0

R/W

SAD+R/W

 

 

 

 

 

 

 

Read

 

101110

0

1

10111001

(B9h)

 

 

 

 

 

 

 

Write

 

101110

0

0

10111000

(B8h)

 

 

 

 

 

 

 

Read

 

101110

1

1

10111011

(BBh)

 

 

 

 

 

 

 

Write

 

101110

1

0

10111010

(BAh)

 

 

 

 

 

 

 

 

Table 10.

 

Transfer when master is writing one byte to slave

 

 

 

 

 

 

 

Master

 

ST

 

SAD + W

 

 

 

SUB

 

 

 

DATA

 

 

 

SP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Slave

 

 

 

 

 

 

 

SAK

 

 

SAK

 

 

 

 

SAK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 11.

 

Transfer when master is writing multiple bytes to slave

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Master

ST

 

SAD + W

 

 

SUB

 

 

 

DATA

 

 

 

DATA

 

 

SP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Slave

 

 

 

 

 

SAK

 

 

 

SAK

 

 

 

SAK

 

 

 

SAK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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