MEMS pressure sensor: 260-1260 mbar absolute digital output
barometer
Datasheet − production data
Features
■ 260 to 1260 mbar absolute pressure range
■ High-resolution mode: 0.020 mbar RMS
■ Low power consumption:
– Low resolution mode: 5.5
– High resolution mode: 30
■ High overpressure capability: 20x full scale
■ Embedded temperature compensation
■ Embedded 24-bit ADC
■ Selectable ODR from 1 Hz to 25 Hz
■ SPI and I
■ Supply voltage: 1.71 to 3.6 V
■ High shock survivability: 10,000 g
■ Small and thin package
■ ECOPACK
2
C interfaces
®
lead-free compliant
Applications
■ Indoor and outdoor navigation
■ Enhanced GPS for dead-reckoning
■ Altimeter and barometer for portable devices
■ Weather station equipment
■ Sport watches
µA
µA
HCLGA-16L
(3 x 3 x 1 mm)
The sensing element consists of a suspended
membrane realized inside a single mono-silicon
substrate. It is capable to detecting pressure and
is manufactured using a dedicated process
developed by ST, called VENSENS.
The VENSENS process allows to build a monosilicon membrane above an air cavity with
controlled gap and defined pressure. The
membrane is very small compared to the
traditionally built silicon micromachined
membranes. Membrane breakage is prevented by
an intrinsic mechanical stopper.
The IC interface is manufactured using a standard
CMOS process that allows a high level of
integration to design a dedicated circuit which is
trimmed to better match the sensing element
characteristics.
Description
The LPS331AP is available in a small holed cap
land grid array (HCLGA) package and it is
The LPS331AP is an ultra compact absolute
piezoresistive pressure sensor. It includes a
monolithic sensing element and an IC interface
able to take the information from the sensing
element and to provide a digital signal to the
external world.
Table 1.Device summary
Order codesTemperature range [°C]PackagePacking
LPS331APY
-40 to +85HCLGA-16L
LPS331APTRTape and reel
March 2012Doc ID 022112 Rev 71/36
This is information on a product in full production.
Conditions at VDD = 2.5 V, T = 25 °C, unless otherwise noted.
2.1 Mechanical characteristics
.
Table 3.Mechanical characteristics
SymbolParameterTest conditionMin. Typ.
TopOperating temperature range-40–85°C
Tfull
Full accuracy temperature
range
0–80 °C
PopOperating pressure range260–1260mbar
PbitsPressure output data –24–bits
(1)
Max.Unit
PresPressure sensitivity–4096–
Paccrel
PaccT
Relative accuracy over
pressure
Absolute accuracy pressure
over temperature
(2)
(3)
P = 800 to 1100 mbar
T= 25°C
P = 800 to 1100 mbar
T = 0 ∼ +80 °C
–± 0.1± 0.2mbar
- 3.2± 22.6 mbar
PnoisePressure noiseSee Table 17.
LSB/
mbar
mbar
RMS
TbitsTemperature output data–16–bits
TresTemperature sensitivity–480–LSB/°C
TaccAbsolute accuracy temperature T= 0~+80 °C–± 2– °C
1. Typical specifications are not guaranteed.
2. Characterization data. Parameter not tested at final test
3. Embedded pwl compensation.
Doc ID 022112 Rev 75/36
Mechanical and electrical specificationsLPS331AP
2.2 Electrical characteristics
Table 4.Electrical characteristics
SymbolParameterTest conditionMin. Typ.
VddSupply voltage1.71–3.6V
Vdd_IO IO supply voltage1.71–3.6V
Supply current @ ODRp 1 Hz and
Idd
ODRt = 1Hz
IddPdn
1. Typical specifications are not guaranteed.
Table 5.Supply current at ODRp 1 Hz, ODRt 1 Hz
Supply current in power-down mode
T = 25 °C
–0.5 – µA
SymbolRES_CONF (hex)Min.Typ.Max.Unit
73–5.5–
75–6.6–
(1)
Max.Unit
see Ta b le 5µA
Idd
77–11.5–
78–17.5–
7A–30.0–
µA
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LPS331APMechanical and electrical specifications
2.3 Absolute maximum ratings
Stress above those listed as “Absolute maximum ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device under these
conditions is not implied. Exposure to maximum rating conditions for extended periods may
affect device reliability.
Table 6.Absolute maximum ratings
SymbolRatingsMaximum valueUnit
VddSupply voltage-0.3 to 4.8V
Vdd_IO I/O pins supply voltage-0.3 to 4.8V
VinInput voltage on any control pin -0.3 to Vdd_IO +0.3V
POverpressure20bar
T
ESDElectrostatic discharge protection2 (HBM)kV
Note:Supply voltage on any pin should never exceed 4.8 V.
Storage temperature range-40 to +125°C
STG
This is a mechanical shock sensitive device, improper handling can cause permanent
damage to the part.
This is an ESD sensitive device, improper handling can cause permanent damage to
the part.
Doc ID 022112 Rev 77/36
FunctionalityLPS331AP
3 Functionality
The LPS331AP is a high resolution, digital output pressure sensor packaged in an HCLGA
holed package. The complete device includes a sensing element based on a piezoresistive
Wheatstone bridge approach, and an IC interface able to take the information from the
sensing element to the external world, as a digital signal.
3.1 Sensing element
An ST proprietary process is used to obtain a mono-silicon µ-sized membrane for MEMS
pressure sensors, without requiring substrate to substrate bonding. When pressure is
applied, the membrane deflection induces an imbalance in the Wheatstone bridge
piezoresistances, whose output signal is converted by the IC interface.
Intrinsic mechanical stoppers prevent breakage in case of pressure overstress, ensuring
measurement repeatability.
The pressure inside the buried cavity under the membrane is constant and controlled by
process parameters.
3.2 IC interface
The complete measurement chain consists of a low-noise capacitive amplifier, which
converts the resistive unbalance of the MEMS sensor into an analog voltage signal, and of
an analog-to-digital converter, which translates the produced signal into a digital bitstream.
The converter is coupled with a dedicated reconstruction filter which removes the high
frequency components of the quantization noise and provides low rate and high resolution
digital words.
The pressure data can be accessed through an I
particularly suitable for direct interfacing with a microcontroller.
3.3 Factory calibration
The IC interface is factory calibrated at three temperatures and two pressures for sensitivity
and accuracy.
The trimming values are stored inside the device by a non-volatile structure. Whenever the
device is turned on, the trimming parameters are downloaded into the registers to be
employed during normal operation. This allows the user to employ the device without
requiring any further calibration.
2
C/SPI interface making the device
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LPS331APApplication hints
4 Application hints
Figure 3.LPS331AP electrical connection
Vdd
TOP VIEW
6
SDA/SDI/SDO
1416
8
SDO/SA0
CS
13
Res
9
9
Res
10µ
100nF
GND
Digital signal from/to signal controller. Signal levels are defined through proper selection of Vdd_
Vdd_IO
SCL/SPC
1
5
5
The device core is supplied through the Vdd line. Power supply decoupling capacitors (100
nF ceramic, 10 µF aluminum) should be placed as near as possible to the supply pad of the
device (common design practice).
The functionality of the device and the measured data outputs are selectable and accessible
through the I
2
C/SPI interface. When using the I2C, CS must be tied high (i.e. connected to
Vdd_IO).
4.1 Soldering information
The HCLGA package is compliant with the ECOPACK® standard and it is qualified for
soldering heat resistance according to JEDEC J-STD-020.
Doc ID 022112 Rev 79/36
Digital interfacesLPS331AP
5 Digital interfaces
5.1 I2C serial interface
The registers embedded in the LPS331AP may be accessed through both the I2C and SPI
serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped onto the same pads. To select/exploit the I
line must be tied high (i.e. connected to Vdd_IO).
I2C serial data (SDA)
SPI serial data input (SDI)
3-wire interface serial data output (SDO)
2
C less significant bit of the device address (SA0)
I
SPI serial data output (SDO)
5.2 I2C serial interface
The LPS331AP I2C is a bus slave. The I2C is employed to write data into registers whose
content can also be read back.
The relevant I
Table 8.Serial interface pin description
TransmitterThe device which sends data to the bus
ReceiverThe device which receives data from the bus
Master
2
C terminology is given in Table 8.
TermDescription
The device which initiates a transfer, generates clock signals and terminates a
transfer
SlaveThe device addressed by the master
There are two signals associated with the I2C bus: the serial clock line (SCL) and the serial
data line (SDA). The latter is a bi-directional line used for sending and receiving the data
to/from the interface. Both lines have to be connected to Vdd_IO through pull-up resistors.
2
The I
C interface is compliant with fast mode (400 kHz) I2C standards as well as with the
normal mode.
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LPS331APDigital interfaces
5.2.1 I2C operation
The transaction on the bus is started through a START (ST) signal. A start condition is
defined as a HIGH to LOW transition on the data line while the SCL line is held HIGH. After
this has been transmitted by the master, the bus is considered busy. The next byte of data
transmitted after the start condition contains the address of the slave in the first 7 bits and
the eighth bit tells whether the master is receiving data from the slave or transmitting data to
the slave. When an address is sent, each device in the system compares the first seven bits
after a start condition with its address. If they match, the device considers itself addressed
by the master.
The slave address (SAD) associated to the LPS331AP is 101110xb. The SDO/SA0 pad can
be used to modify the less significant bit of the device address. If the SA0 pad is connected
to voltage supply, LSb is ‘1’ (address 1011101b), otherwise if the SA0 pad is connected to
ground, the LSb value is ‘0’ (address 1011100b). This solution permits to connect and
address two different LPS331APs to the same I
Data transfer with acknowledge is mandatory. The transmitter must release the SDA line
during the acknowledge pulse. The receiver must then pull the data line LOW so that it
remains stable low during the HIGH period of the acknowledge clock pulse. A receiver which
has been addressed is obliged to generate an acknowledge after each byte of data
received.
2
The I
C embedded in the LPS331AP behaves like a slave device and the following protocol
must be adhered to. After the start condition (ST) a slave address is sent, once a slave
acknowledge (SAK) has been returned, a 8-bit sub-address (SUB) will be transmitted: the 7
LSB represents the actual register address while the MSB enables address auto increment.
If the MSb of the SUB field is ‘1’, the SUB (register address) will be automatically increased
to allow multiple data read/write.
2
C lines.
The slave address is completed with a Read/Write bit. If the bit was ‘1’ (Read), a repeated
START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (Write)
the master will transmit to the slave with direction unchanged. Tab l e 9 explains how the
SAD+read/write bit pattern is composed, listing all the possible configurations.
Table 9.SAD+Read/Write patterns
CommandSAD[6:1]SAD[0] = SA0R/WSAD+R/W
Read1011100110111001 (B9h)
Write1011100010111000 (B8h)
Read1011101110111011 (BBh)
Write1011101010111010 (BAh)
Table 10.Transfer when master is writing one byte to slave
MasterSTSAD + WSUBDATASP
SlaveSAKSAKSAK
Table 11.Transfer when master is writing multiple bytes to slave
MasterSTSAD + WSUBDATADATASP
SlaveSAKSAKSAKSAK
Doc ID 022112 Rev 711/36
Digital interfacesLPS331AP
Table 12.Transfer when master is receiving (reading) one byte of data from slave
MasterSTSAD + WSUBSRSAD + RNMAKSP
SlaveSAKSAKSAKDATA
Table 13.Transfer when master is receiving (reading) multiple bytes of data from
slave
MasterST SAD+WSUBSR SAD+RMAKMAKNMAKSP
SlaveSAKSAKSAKDATADATADATA
Data are transmitted in byte format (DATA). Each data transfer contains 8 bits. The number
of bytes transferred per transfer is unlimited. Data is transferred with the most significant bit
(MSb) first. If a receiver can’t receive another complete byte of data until it has performed
some other functions, it can hold the clock line, SCL LOW to force the transmitter into a wait
state. Data transfer only continues when the receiver is ready for another byte and releases
the data line. If a slave receiver does not acknowledge the slave address (i.e. it is not able to
receive because it is performing some real time function) the data line must be kept HIGH by
the slave. The master can then abort the transfer. A LOW to HIGH transition on the SDA line
while the SCL line is HIGH is defined as a STOP condition. Each data transfer must be
terminated by the generation of a STOP (SP) condition.
In order to read multiple bytes incrementing the register address, it is necessary to assert
the most significant bit of the sub-address field. In other words, SUB(7) must be equal to 1
while SUB(6-0) represents the address of the first register to be read.
In the presented communication format MAK is Master acknowledge and NMAK is no
master acknowledge.
5.3 SPI bus interface
The LPS331AP SPI is a bus slave. The SPI allows to write and read the registers of the
device.
The serial interface interacts with the outside world with 4 wires: CS, SPC, SDI and SDO.
Figure 4.Read and write protocol
CS
SPC
SDI
RW
MS
SDO
AD5 AD4 AD3 AD2 AD1 AD0
DI7DI6DI5DI4DI3DI2DI1DI0
DO7DO6DO5DO4DO3DO2DO1DO0
CS is the serial port enable and it is controlled by the SPI master. It goes low at the start of
the transmission and returns to high at the end. SPC is the serial port clock and it is
controlled by the SPI master. It is stopped high when CS is high (no transmission). SDI and
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LPS331APDigital interfaces
SDO are respectively the serial port data input and output. Those lines are driven at the
falling edge of SPC and should be captured at the rising edge of SPC.
Both the read register and write register commands are completed in 16 clock pulses or in
multiples of 8 in the case of multiple bytes read/write. Bit duration is the time between two
falling edges of SPC. The first bit (bit 0) starts at the first falling edge of SPC after the falling
edge of CS while the last bit (bit 15, bit 23, ...) starts at the last falling edge of SPC just
before the rising edge of CS.
bit 0: RW
from the device is read. In the latter case, the chip will drive SDO at the start of bit 8.
bit 1: MS
When 1, the address will be auto incremented in multiple read/write commands.
bit 2-7: address AD(5:0). This is the address field of the indexed register.
bit 8-15: data DI(7:0) (write mode). This is the data that is written into the device (MSb first).
bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).
In multiple read/write commands further blocks of 8 clock periods are added. When the MS
bit is 0 the address used to read/write data remains the same for every block. When MS
is 1 the address used to read/write data is increased at every block.
The function and the behavior of SDI and SDO remain unchanged.
5.3.1 SPI read
Figure 5.SPI read protocol
bit. When 0, the data DI(7:0) is written into the device. When 1, the data DO(7:0)
bit. When 0, the address will remain unchanged in multiple read/write commands.
bit
CS
SPC
SDI
RW
MS
AD5 AD4 AD3 AD2 AD1 AD0
SDO
DO7 DO6 DO5DO4 DO3 DO2 DO1DO0
The SPI Read command is performed with 16 clock pulses. The multiple byte read
command is performed adding blocks of 8 clock pulses at the previous one.
bit 0: READ bit. The value is 1.
bit 1: MS
bit. When 0 do not increment address, when 1 increment address in multiple
reading.
bit 2-7: address AD(5:0). This is the address field of the indexed register.
bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).
bit 16-... : data DO(...-8). Further data in multiple byte readings.
The SPI Write command is performed with 16 clock pulses. The multiple byte write
command is performed adding blocks of 8 clock pulses at the previous one.
bit 0: WRITE bit. The value is 0.
bit 1: MS
bit. When 0 do not increment the address, when 1 increment the address in
multiple writings.
bit 2 -7: address AD(5:0). This is the address field of the indexed register.
bit 8-15: data DI(7:0) (write mode). This is the data that is written in the device (MSb first).
bit 16-... : data DI(...-8). Further data in multiple byte writings.
A 3-wires mode is entered by setting to ‘1’ bit SIM (SPI serial interface mode selection) in
CTRL_REG4.
Figure 9.SPI read protocol in 3-wires mode
CS
SPC
SDI/O
RW
MS
AD5 AD4 AD3 AD2 AD1 AD0
The SPI read command is performed with 16 clock pulses:
bit 0: READ bit. The value is 1.
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
bit 1: MS
bit. When 0, do not increment the address, when 1, increment the address in
multiple readings.
bit 2-7: address AD(5:0). This is the address field of the indexed register.
bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).
Multiple read command is also available in 3-wires mode.
Doc ID 022112 Rev 715/36
Register mappingLPS331AP
6 Register mapping
Ta bl e 1 4 provides a list of the 8-bit registers embedded in the device and the related
addresses.
.
Table 14.Registers address map
Register Address
NameType
HexBinary
Reserved (Do not modify)
REF_P_XLR/W08000100000000000
REF_P_LR/W09000100100000000
REF_P_HR/W0A000101000000000
WHO_AM_IR0F000111110111011Dummy register
RES_CONFR/W100010000 011111010
Reserved (Do not modify)11-1FReserved
CTRL_REG1R/W20010 000000000000
CTRL_REG2R/W21010 000100000000
CTRL_REG3R/W22010 001000000000
INT_CFG_REGR/W23010001100000000
INT_SOURCE_REGR24010010000000000
THS_P_LOW_REGR/W2501001010000000
THS_P_HIGH_REGR/W2601001100000000
STATUS_REGR27010 011100000000
00-07
0D - 0E
Default
Function and
comment
Reserved
PRESS_POUT_XL_REHR28010 1000output
PRESS_OUT_LR29010 1001output
PRESS_OUT_HR2A010 1010output
TEMP_OUT_LR2B010 1011output
TEMP_OUT_HR2C010 1100output
Reserved (Do not modify)2D-2FReserved
AMP_CTRLR/W30011 0000Partially reserved
Registers marked as Reserved must not be changed. The writing to those registers may
cause permanent damages to the device.
The content of the registers that are loaded at boot should not be changed. They contain the
factory calibration values. Their content is automatically restored when the device is
powered-up.
16/36Doc ID 022112 Rev 7
LPS331APRegister description
7 Register description
The device contains a set of registers which are used to control its behavior and to retrieve
pressure and temperature data. The register address, made up of 7 bits, is used to identify
them and to read/write the data through the serial interface.
REF_P_XLReference pressure (LSB data)
76543210
REFL7REFL6REFL5REFL4REFL3REFL2REFL1REFL0
Address:08h
Type:R/W
Reset:00h
Description:This reference pressure register contains the lower part of the reference pressure that
is sum to the sensor output pressure. The full value is REF_P_XL & REF_P_H &
REF_P_L and is represented as 2’s complement.
Description:AVGP3-AVGP0 allow to select the pressure internal average. AVGT2-AVGT0 allow to
select the temperature internal average.
AVGP3-AVGP0 bits can be configured as described in Ta b le 1 5 .
AVGT2-AVGT0 bits can be configured as described in Tab le 1 6 .
Table 15.Pressure resolution configuration
AVGP3AVGP2AVGP1AVGP0Nr. internal average
00001
00012
00104
00118
010016
010132
011064
0111128
1000256
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LPS331APRegister description
Table 15.Pressure resolution configuration
AVGP3AVGP2AVGP1AVGP0Nr. internal average
1001384
1010512
1. Register configuration 7Ah not allowed with ODR = 25Hz/25Hz (Register CTRL_REG1). For ORD
25Hz/25Hz the suggested configuration for RES_CONF is 6Ah.
(1)
Table 16.Temperature resolution configuration
AVGT2AVGT1AVGT1Nr. internal average
0001
0012
0104
0118
10016
10132
11064
111128
1. Register configuration 7Ah not allowed with ODR = 25Hz/25Hz (Register CTRL_REG1). For ORD
25Hz/25Hz the suggested configuration for RES_CONF is 6Ah.
(1)
Table 17.Pressure resolution
0.020
(1)
Unit
mbar
RES_CONF (hex)RMS noise
700.450
710.320
720.230
730.160
740.110
750.080
760.060
770.040
780.030
790.025
(2)
7A
1. Rms noise is calculated as standard deviation of 10 data points.
2. This configuration is not allowed for ODR = 25Hz/25HZ (register CTRL_REG1). For ORD = 25 Hz/ 25 Hz
the suggested configuration for RES_CONF is 6Ah.
Doc ID 022112 Rev 719/36
Register descriptionLPS331AP
WHO_AM_IDevice identification
76543210
10111011
Address:0Fh
Type:R
Description:This read-only register contains the device identifier that, for LPS331AP, is set to BBh.
CTRL_REG1Control register 1
76543210
PDODR2ODR1ODR0DIFF_ENDBDUDELTA_ENSIM
Address:20h
Type:R/W
Description:Control register.
[7] PD: power down control.
Default value: 0
(0: power-down mode; 1: active mode)
[6:4] ODR2, ODR1, ODR0: output data rate selection.
(0: continuous update; 1: output registers not updated until MSB and LSB reading)
[1] DELTA_EN: delta pressure enable
(1: delta pressure registers enabled. 0: disable)
[0] SIM: SPI Serial Interface Mode selection.
Default value: 0
(0: 4-wire interface; 1: 3-wire interface)
PD bit allows to turn on the device. The device is in power-down mode when PD = ‘0’
(default value after boot). The device is active when PD is set to ‘1’.
ODR2- ODR1 - ODR0 bits allow to change the output data rates of pressure and
temperature samples. The default value is “000” which corresponds to “one shot
configuration” for both pressure and temperature output. ODR2, ODR1 and ODR0 bits can
be configured as described in Ta bl e 1 8.
Note:Before changing the ODR it is necessary to power down the device (CTRL_REG1[7]).
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LPS331APRegister description
Table 18.Output data rate bit configurations
ODR2ODR1ODR0Pressure output data rate
000One shotOne shot
0011Hz1Hz
0107Hz1Hz
01112.5Hz1Hz
10025Hz 1Hz
1017Hz7Hz
11012.5 Hz12.5 Hz
11125 Hz25 Hz
Temperature output data
rate
DIFF_EN bit is used to enable the circuitry for the computing of differential pressure output.
In default mode (DIF_EN=’0’) the circuitry is turned off. It is suggested to turn on the circuitry
only after the configuration of REF_P_x and THS_P_x.
BDU bit is used to inhibit the output registers update between the reading of upper and
lower register parts. In default mode (BDU = ‘0’), the lower and upper register parts are
updated continuously. If it is not sure to read faster than output data rate, it is recommended
to set BDU bit to ‘1’. In this way, after the reading of the lower (upper) register part, the
content of that output registers is not updated until the upper (lower) part is read too.
This feature avoids reading LSB and MSB related to different samples.
SIM bit selects the SPI serial interface mode. When SIM is ‘0’ (default value) the 4-wire
interface mode is selected and data coming from the device are sent to pin #7 (SDO).
In 3-wire interface mode, output data are sent to pin #6 (SDI/SDO).
Doc ID 022112 Rev 721/36
Register descriptionLPS331AP
CTRL_REG2Control register 2
76543210
BOOTRESERVEDSWRESETAUTO_ZEROONE_SHOT
Address:21h
Type:R/W
Description:Control register.
[7] BOOT: Reboot memory content. Default value: 0
(0: normal mode; 1: reboot memory content)
[6:3] RESERVED
[2] Software reset. Default value: 0
(0: normal mode; 1: software reset)
[1] Autozero enable. Default value: 0
(0: normal mode; 1: autozero enable)
[0] One shot enable. Default value: 0
(0: waiting for start of conversion; 1: start for a new dataset)
BOOT bit is used to refresh the content of the internal registers stored in the Flash memory
block. At the device power-up the content of the Flash memory block is transferred to the
internal registers related to trimming functions to permit a good behavior of the device itself.
If for any reason, the content of the trimming registers is modified, it is sufficient to use this
bit to restore the correct values. When BOOT bit is set to ‘1’ the content of the internal Flash
is copied inside the corresponding internal registers and is used to calibrate the device.
These values are factory trimmed and they are different for every device. They permit good
behavior of the device and normally they should not be changed. At the end of the boot
process the BOOT bit is set again to ‘0’.
BOOT bit takes effect after one ODR clock cycle.
SWRESET is the software reset bit. The device is reset to the power on configuration if the
SWRESET bit is set to ‘1’ and BOOT is set to ‘1’.
AUTO_ZERO, when set to ‘1’, the actual pressure output is copied in the REF_P_H &
REF_P_L & REF_P_XL and kept as reference and the PRESS_OUT_H & PRESS_OUT_L
& PRESS _OUT_XL is the difference between this reference and the pressure sensor value.
ONE_SHOT bit is used to start a new conversion when ODR1-ODR0 bits in CTRL_REG1
are set to “000”. In this situation a single acquisition of temperature and pressure is started
when ONE_SHOT bit is set to ‘1’. At the end of conversion the new data are available in the
output registers, the STAUS_REG[0] and STAUS_REG[1] bits are set to ‘1’ and the
ONE_SHOT bit comes back to ‘0’ by hardware.
[5:3] INT2_S3, INT2_S2, INT2_S1: data signal on INT2 pad control bits. Default value: 00
(see Table 19.)
[2:0 INT1_S3, INT1_S2, INT1_S1: data signal on INT1 pad control bits. Default value: 00
(see Table 19.)
Table 19.Interrupt configurations
INT1(2)_S3INT1(2)_S2INT1(2)S1INT1(2) pin
000GND
001Pressure high (P_high)
010Pressure low (P_low)
011P_low OR P_high
100 Data ready
101Reserved
110Reserved
111Tri-state
The device features two fully-programmable interrupt sources (INT1 and INT2) which may
be configured to trigger different pressure events. Figure 10 shows the block diagram of the
interrupt generation block and output pressure data.
The device may also be configured to generate, through interrupt pins, a Data Ready signal
(Drdy) which indicates when a new measured pressure data is available, thus simplifying
data synchronization in digital systems.
Doc ID 022112 Rev 723/36
Register descriptionLPS331AP
Figure 10. Interrupt generation block and output pressure data.
Description:The content of this register is updated every ODR cycle, regardless of BDU value in
CTRL_REG1.
P_DA is set to 1 whenever a new pressure sample is available. P_DA is cleared
anytime PRESS_OUT_H (29h) register is read.
T_DA is set to 1 whenever a new temperature sample is available. T_DA is cleared
anytime TEMP_OUT_H (2Bh) register is read.
P_OR bit is set to '1' whenever new pressure data is available and P_DA was set in
the previous ODR cycle and not cleared. P_OR is cleared anytime PRESS_OUT_H
(29h) register is read.
T_OR is set to ‘1’ whenever new temperature data is available and T_DA was set in
the previous ODR cycle and not cleared. T_OR is cleared anytime TEMP_OUT_H
(2Bh) register is read.
[7:6] 0
[5] P_OR: Pressure data overrun. Default value: 0
(0: no overrun has occurred;
1: new data for pressure has overwritten the previous one)
[4] T_OR: Temperature data overrun. Default value: 0
(0: no overrun has occurred;
1: a new data for temperature has overwritten the previous one)
26/36Doc ID 022112 Rev 7
LPS331APRegister description
[3:2] 0
[1] P_DA: Pressure data available. Default value: 0
(0: new data for pressure is not yet available;
1: new data for pressure is available)
[0] T_DA: Temperature data available. Default value: 0
(0: new data for temperature is not yet available;
1: new data for temperature is available)
PRESS_OUT_XL Pressure data (LSB)
76543210
POUT7POUT6POUT5POUT4POUT3POUT2POUT1POUT0
Address:28h
Type:R
Reset:00h
Description:Pressure data.
[7:0] POUT7 - POUT0: Pressure data LSB
PRESS_OUT_L Pressure data
15141312111098
POUT15POUT14POUT13POUT12POUT11POUT10POUT9POUT8
Address:29h
Type:R
Reset:80
Description:Pressure data.
[15:8] POUT15 - POUT8: Pressure data
Doc ID 022112 Rev 727/36
Register descriptionLPS331AP
PRESS_OUT_H (2Ah)Pressure data (MSB)
2423222120191817
POUT23POUT22POUT21POUT20POUT19POUT18POUT17POUT16
Address:2Ah
Type:R
Reset:2F
Description:Pressure data are expressed as PRESS_OUT_H & PRESS_OUT_L &
PRESS_OUT_XL in 2’s complement. Values exceeding the operating pressure
Range (see Table 3) are clipped.
Pressure output data: Pout(mbar)=(PRESS_OUT_H & PRESS_OUT_L &
PRESS_OUT_XL)[dec]/4096
[24:17] POUT23 - POUT16: Pressure data MSB
28/36Doc ID 022112 Rev 7
LPS331APRegister description
TEMP_OUT_L (2Bh)Temperature data (LSB)
76543210
TOUT7TOUT6TOUT5TOUT4TOUT3TOUT2TOUT1TOUT0
Address:2Bh
Type:R
Reset:00h
[7:0] TOUT7 - TOUT0: temperature data LSBl
TEMP_OUT_H (2Ch)Temperature data (MSB)
15141312111098
TOUT15TOUT14TOUT13TOUT12TOUT11TOUT10TOUT9TOUT8
Address:2Ch
Type:R
Reset:00h
[15:8] TOUT15 - TOUT8: temperature data MSB.
Temperature data are expressed as TEMP_OUT_H & TEMP_OUT_L as 2’s complement
numbers.
[23:16] DELTA23-DELTA16: Delta pressure register for One Point calibration
DELTA_PRESS registers are used to store the one point calibration value to eliminate
accuracy shift after soldering. DELTA_PRESS acts on the output pressure when
CTRL_REG1[1] DELTA_EN is set to ‘1’.
Doc ID 022112 Rev 731/36
Package mechanical sectionLPS331AP
8 Package mechanical section
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
Figure 11. Package outline for HCLGA-16L (3 x 3 x 1 mm)
®
packages, depending on their level of environmental compliance. ECOPACK®
is an ST trademark.
32/36Doc ID 022112 Rev 7
LPS331APPackage mechanical section
Table 20.HCLGA-16L (3 x 3 x 1 mm) mechanical data
Symbol
MinTypMax
E12.8503.0003.150
E3–0–
D12.8503.0003.150
D3–0.700–
R1–0.400–
A1–1.000–
L1–1.000–
N1–0.500–
L2–2.000–
N2–1.000–
P1–0.875–
P2–1.275–
T1–0.350–
Millimeters
T2–0.250–
d–0.150–
K–0.050–
M–0.100–
Figure 12. Tray information
Doc ID 022112 Rev 733/36
Package mechanical sectionLPS331AP
Figure 13. Tape information
34/36Doc ID 022112 Rev 7
LPS331APRevision history
9 Revision history
Table 21.Document revision history
DateRevisionChanges
12-Aug-20111Initial release.
16-Aug-20112
20-Oct-20113
15-Dec-20114
13-Jan-20125
27-Feb-20126
29-Mar-20127
– Updated order code in Table 1: Device summary
– Minor formatting and text modifications throughout the document
– Updated: features list, Ta bl e 3 , Ta bl e 6 , Section 4 and Section 7.
– Added: Ta bl e 1 7 , Figure 12 and Figure 13.
– Modified: minor text updates in the Features section, Tab le 3 ,
Ta bl e 4 , Ta bl e 5 , Section 3.1: Sensing element and Figure 11.
Modified:
– Temperature range in Ta b le 1 from “-20 to +105” to “-40 to +85”.
– Temperature output data in register TEMP_OUT_H (2Ch) from
“42.5” to “22.5”.
– PaccT test condition data in Ta bl e 3 from “P = 260 to 1260 mbar”
to “P = 800 to 1100 mbar”
– Device operating range in Description on page 1 from “
-20 °C to
+105 °C” to “-40 °C to +85 °C”
Document status promoted from preliminary data to datasheet.
Modified:
– Temperature output data in register TEMP_OUT_H (2Ch) from
“22.5” to “42.5”
– Added register address in register DELTA_PRESS_XL (3Ch) and
modified register address in DELTA_PRESS_L from “3Dh” to
“3Eh”.
Modified the description for pin 14 inTa bl e 2 and the list of
applications in the cover page.
Doc ID 022112 Rev 735/36
LPS331AP
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