MEMS pressure sensor: 260-1260 mbar absolute digital output
barometer
Datasheet − production data
Features
■ 260 to 1260 mbar absolute pressure range
■ High-resolution mode: 0.020 mbar RMS
■ Low power consumption:
– Low resolution mode: 5.5
– High resolution mode: 30
■ High overpressure capability: 20x full scale
■ Embedded temperature compensation
■ Embedded 24-bit ADC
■ Selectable ODR from 1 Hz to 25 Hz
■ SPI and I
■ Supply voltage: 1.71 to 3.6 V
■ High shock survivability: 10,000 g
■ Small and thin package
■ ECOPACK
2
C interfaces
®
lead-free compliant
Applications
■ Indoor and outdoor navigation
■ Enhanced GPS for dead-reckoning
■ Altimeter and barometer for portable devices
■ Weather station equipment
■ Sport watches
µA
µA
HCLGA-16L
(3 x 3 x 1 mm)
The sensing element consists of a suspended
membrane realized inside a single mono-silicon
substrate. It is capable to detecting pressure and
is manufactured using a dedicated process
developed by ST, called VENSENS.
The VENSENS process allows to build a monosilicon membrane above an air cavity with
controlled gap and defined pressure. The
membrane is very small compared to the
traditionally built silicon micromachined
membranes. Membrane breakage is prevented by
an intrinsic mechanical stopper.
The IC interface is manufactured using a standard
CMOS process that allows a high level of
integration to design a dedicated circuit which is
trimmed to better match the sensing element
characteristics.
Description
The LPS331AP is available in a small holed cap
land grid array (HCLGA) package and it is
The LPS331AP is an ultra compact absolute
piezoresistive pressure sensor. It includes a
monolithic sensing element and an IC interface
able to take the information from the sensing
element and to provide a digital signal to the
external world.
Table 1.Device summary
Order codesTemperature range [°C]PackagePacking
LPS331APY
-40 to +85HCLGA-16L
LPS331APTRTape and reel
March 2012Doc ID 022112 Rev 71/36
This is information on a product in full production.
Conditions at VDD = 2.5 V, T = 25 °C, unless otherwise noted.
2.1 Mechanical characteristics
.
Table 3.Mechanical characteristics
SymbolParameterTest conditionMin. Typ.
TopOperating temperature range-40–85°C
Tfull
Full accuracy temperature
range
0–80 °C
PopOperating pressure range260–1260mbar
PbitsPressure output data –24–bits
(1)
Max.Unit
PresPressure sensitivity–4096–
Paccrel
PaccT
Relative accuracy over
pressure
Absolute accuracy pressure
over temperature
(2)
(3)
P = 800 to 1100 mbar
T= 25°C
P = 800 to 1100 mbar
T = 0 ∼ +80 °C
–± 0.1± 0.2mbar
- 3.2± 22.6 mbar
PnoisePressure noiseSee Table 17.
LSB/
mbar
mbar
RMS
TbitsTemperature output data–16–bits
TresTemperature sensitivity–480–LSB/°C
TaccAbsolute accuracy temperature T= 0~+80 °C–± 2– °C
1. Typical specifications are not guaranteed.
2. Characterization data. Parameter not tested at final test
3. Embedded pwl compensation.
Doc ID 022112 Rev 75/36
Mechanical and electrical specificationsLPS331AP
2.2 Electrical characteristics
Table 4.Electrical characteristics
SymbolParameterTest conditionMin. Typ.
VddSupply voltage1.71–3.6V
Vdd_IO IO supply voltage1.71–3.6V
Supply current @ ODRp 1 Hz and
Idd
ODRt = 1Hz
IddPdn
1. Typical specifications are not guaranteed.
Table 5.Supply current at ODRp 1 Hz, ODRt 1 Hz
Supply current in power-down mode
T = 25 °C
–0.5 – µA
SymbolRES_CONF (hex)Min.Typ.Max.Unit
73–5.5–
75–6.6–
(1)
Max.Unit
see Ta b le 5µA
Idd
77–11.5–
78–17.5–
7A–30.0–
µA
6/36Doc ID 022112 Rev 7
LPS331APMechanical and electrical specifications
2.3 Absolute maximum ratings
Stress above those listed as “Absolute maximum ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device under these
conditions is not implied. Exposure to maximum rating conditions for extended periods may
affect device reliability.
Table 6.Absolute maximum ratings
SymbolRatingsMaximum valueUnit
VddSupply voltage-0.3 to 4.8V
Vdd_IO I/O pins supply voltage-0.3 to 4.8V
VinInput voltage on any control pin -0.3 to Vdd_IO +0.3V
POverpressure20bar
T
ESDElectrostatic discharge protection2 (HBM)kV
Note:Supply voltage on any pin should never exceed 4.8 V.
Storage temperature range-40 to +125°C
STG
This is a mechanical shock sensitive device, improper handling can cause permanent
damage to the part.
This is an ESD sensitive device, improper handling can cause permanent damage to
the part.
Doc ID 022112 Rev 77/36
FunctionalityLPS331AP
3 Functionality
The LPS331AP is a high resolution, digital output pressure sensor packaged in an HCLGA
holed package. The complete device includes a sensing element based on a piezoresistive
Wheatstone bridge approach, and an IC interface able to take the information from the
sensing element to the external world, as a digital signal.
3.1 Sensing element
An ST proprietary process is used to obtain a mono-silicon µ-sized membrane for MEMS
pressure sensors, without requiring substrate to substrate bonding. When pressure is
applied, the membrane deflection induces an imbalance in the Wheatstone bridge
piezoresistances, whose output signal is converted by the IC interface.
Intrinsic mechanical stoppers prevent breakage in case of pressure overstress, ensuring
measurement repeatability.
The pressure inside the buried cavity under the membrane is constant and controlled by
process parameters.
3.2 IC interface
The complete measurement chain consists of a low-noise capacitive amplifier, which
converts the resistive unbalance of the MEMS sensor into an analog voltage signal, and of
an analog-to-digital converter, which translates the produced signal into a digital bitstream.
The converter is coupled with a dedicated reconstruction filter which removes the high
frequency components of the quantization noise and provides low rate and high resolution
digital words.
The pressure data can be accessed through an I
particularly suitable for direct interfacing with a microcontroller.
3.3 Factory calibration
The IC interface is factory calibrated at three temperatures and two pressures for sensitivity
and accuracy.
The trimming values are stored inside the device by a non-volatile structure. Whenever the
device is turned on, the trimming parameters are downloaded into the registers to be
employed during normal operation. This allows the user to employ the device without
requiring any further calibration.
2
C/SPI interface making the device
8/36Doc ID 022112 Rev 7
LPS331APApplication hints
4 Application hints
Figure 3.LPS331AP electrical connection
Vdd
TOP VIEW
6
SDA/SDI/SDO
1416
8
SDO/SA0
CS
13
Res
9
9
Res
10µ
100nF
GND
Digital signal from/to signal controller. Signal levels are defined through proper selection of Vdd_
Vdd_IO
SCL/SPC
1
5
5
The device core is supplied through the Vdd line. Power supply decoupling capacitors (100
nF ceramic, 10 µF aluminum) should be placed as near as possible to the supply pad of the
device (common design practice).
The functionality of the device and the measured data outputs are selectable and accessible
through the I
2
C/SPI interface. When using the I2C, CS must be tied high (i.e. connected to
Vdd_IO).
4.1 Soldering information
The HCLGA package is compliant with the ECOPACK® standard and it is qualified for
soldering heat resistance according to JEDEC J-STD-020.
Doc ID 022112 Rev 79/36
Digital interfacesLPS331AP
5 Digital interfaces
5.1 I2C serial interface
The registers embedded in the LPS331AP may be accessed through both the I2C and SPI
serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped onto the same pads. To select/exploit the I
line must be tied high (i.e. connected to Vdd_IO).
I2C serial data (SDA)
SPI serial data input (SDI)
3-wire interface serial data output (SDO)
2
C less significant bit of the device address (SA0)
I
SPI serial data output (SDO)
5.2 I2C serial interface
The LPS331AP I2C is a bus slave. The I2C is employed to write data into registers whose
content can also be read back.
The relevant I
Table 8.Serial interface pin description
TransmitterThe device which sends data to the bus
ReceiverThe device which receives data from the bus
Master
2
C terminology is given in Table 8.
TermDescription
The device which initiates a transfer, generates clock signals and terminates a
transfer
SlaveThe device addressed by the master
There are two signals associated with the I2C bus: the serial clock line (SCL) and the serial
data line (SDA). The latter is a bi-directional line used for sending and receiving the data
to/from the interface. Both lines have to be connected to Vdd_IO through pull-up resistors.
2
The I
C interface is compliant with fast mode (400 kHz) I2C standards as well as with the
normal mode.
10/36Doc ID 022112 Rev 7
LPS331APDigital interfaces
5.2.1 I2C operation
The transaction on the bus is started through a START (ST) signal. A start condition is
defined as a HIGH to LOW transition on the data line while the SCL line is held HIGH. After
this has been transmitted by the master, the bus is considered busy. The next byte of data
transmitted after the start condition contains the address of the slave in the first 7 bits and
the eighth bit tells whether the master is receiving data from the slave or transmitting data to
the slave. When an address is sent, each device in the system compares the first seven bits
after a start condition with its address. If they match, the device considers itself addressed
by the master.
The slave address (SAD) associated to the LPS331AP is 101110xb. The SDO/SA0 pad can
be used to modify the less significant bit of the device address. If the SA0 pad is connected
to voltage supply, LSb is ‘1’ (address 1011101b), otherwise if the SA0 pad is connected to
ground, the LSb value is ‘0’ (address 1011100b). This solution permits to connect and
address two different LPS331APs to the same I
Data transfer with acknowledge is mandatory. The transmitter must release the SDA line
during the acknowledge pulse. The receiver must then pull the data line LOW so that it
remains stable low during the HIGH period of the acknowledge clock pulse. A receiver which
has been addressed is obliged to generate an acknowledge after each byte of data
received.
2
The I
C embedded in the LPS331AP behaves like a slave device and the following protocol
must be adhered to. After the start condition (ST) a slave address is sent, once a slave
acknowledge (SAK) has been returned, a 8-bit sub-address (SUB) will be transmitted: the 7
LSB represents the actual register address while the MSB enables address auto increment.
If the MSb of the SUB field is ‘1’, the SUB (register address) will be automatically increased
to allow multiple data read/write.
2
C lines.
The slave address is completed with a Read/Write bit. If the bit was ‘1’ (Read), a repeated
START (SR) condition must be issued after the two sub-address bytes; if the bit is ‘0’ (Write)
the master will transmit to the slave with direction unchanged. Tab l e 9 explains how the
SAD+read/write bit pattern is composed, listing all the possible configurations.
Table 9.SAD+Read/Write patterns
CommandSAD[6:1]SAD[0] = SA0R/WSAD+R/W
Read1011100110111001 (B9h)
Write1011100010111000 (B8h)
Read1011101110111011 (BBh)
Write1011101010111010 (BAh)
Table 10.Transfer when master is writing one byte to slave
MasterSTSAD + WSUBDATASP
SlaveSAKSAKSAK
Table 11.Transfer when master is writing multiple bytes to slave
MasterSTSAD + WSUBDATADATASP
SlaveSAKSAKSAKSAK
Doc ID 022112 Rev 711/36
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