ST LIS3LV02DL User Manual

3-axis - ±2g/±6g digital output low voltage linear accelerometer

Features

■ 2.16 V to 3.6 V single supply operation

■ 1.8 V compatible IOs

■ I

C/SPI digital output interfaces

■ Programmable 12 or 16 bit data representation

■ Interrupt activated by motion

■ Programmable interrupt threshold

■ Embedded self test

■ High shock survivability

■ ECOPACK® compliant (see Section 9)

Description

LIS3LV02DL

MEMS inertial sensor

LGA-16

The LIS3LV02DL has a user selectable full scale of ±2g, ±6g and it is capable of measuring acceleration over a bandwidth of 640 Hz for all axes. The device bandwidth may be selected accordingly to the application requirements.

The self-test capability allows the user to check the functioning of the device.

The LIS3LV02DL is a three axes digital output linear accelerometer that includes a sensing element and an IC interface able to take the information from the sensing element and to provide the measured acceleration signals to the external world through an I

C/SPI serial interface.

The sensing element, capable of detecting the acceleration, is manufactured using a dedicated process developed by ST to produce inertial sensors and actuators in silicon.

The IC interface instead is manufactured using a CMOS process that allows high level of integration to design a dedicated circuit which is factory trimmed to better match the sensing element characteristics.

The device may be also configured to generate an inertial wake-up/free-fall interrupt signal when a programmable acceleration threshold is crossed at least in one of the three axes.

The LIS3LV02DL is available in plastic SMD package and it is specified over a temperature range extending from -40°C to +85°C.

The LIS3LV02DL belongs to a family of products suitable for a variety of applications:

– Free-Fall detection – Motion activated functions in portable

terminals – Antitheft systems and Inertial navigation – Gaming and virtual reality input devices – Vibration monitoring and compensation

Table 1. Device summary

Order code

LIS3LV02DL -40 to +85 LGA-16 Tray

LIS3LV02DLTR -40 to +85 LGA-16 Tape and reel

Operating temperature

range [° C]

Package Packing

January 2008 Rev 2 1/48

www.st.com

Content LIS3LV02DL

Content

1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

1.2 LGA-16 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2 Mechanical and electrical specifications . . . . . . . . . . . . . . . . . . . . . . . 10

2.1 Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.3 Communication interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.3.1 SPI - serial peripheral interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.3.2 I2C - Inter IC control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.5 Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5.1 Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5.2 Zero-g level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.5.3 Self test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.1 Sensing element . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.2 IC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.3 Factory calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4 Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4.1 Soldering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5 Digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.1 I2C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.1.1 I2C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.2 SPI bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5.2.1 SPI read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.2.2 SPI write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5.2.3 SPI Read in 3-wires mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

6 Register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2/48

LIS3LV02DL Content

7 Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

7.1 WHO_AM_I (0Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

7.2 OFFSET_X (16h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

7.3 OFFSET_Y (17h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

7.4 OFFSET_Z (18h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

7.5 GAIN_X (19h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

7.6 GAIN_Y (1Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

7.7 GAIN_Z (1Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

7.8 CTRL_REG1 (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

7.9 CTRL_REG2 (21h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

7.10 CTRL_REG3 (22h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

7.11 HP_FILTER_RESET (23h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

7.12 STATUS_REG (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

7.13 OUTX_L (28h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7.14 OUTX_H (29h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7.15 OUTY_L (2Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7.16 OUTY_H (2Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

7.17 OUTZ_L (2Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

7.18 OUTZ_H (2Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

7.19 FF_WU_CFG (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

7.20 FF_WU_SRC (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

7.21 FF_WU_ACK (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

7.22 FF_WU_THS_L (34h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

7.23 FF_WU_THS_H (35h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

7.24 FF_WU_DURATION (36h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

7.25 DD_CFG (38h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

7.26 DD_SRC (39h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

7.27 DD_ACK (3Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

7.28 DD_THSI_L (3Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

7.29 DD_THSI_H (3Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

7.30 DD_THSE_L (3Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

7.31 DD_THSE_H (3Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

3/48

Content LIS3LV02DL

8 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

8.1 Mechanical characteristics at 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

8.2 Mechanical characteristics derived from measurement in the -40°C to +85°C

temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

8.3 Electro-mechanical characteristics at 25°C . . . . . . . . . . . . . . . . . . . . . . . 44

9 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

4/48

LIS3LV02DL List of figures

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. SPI slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 5. LIS3LV02DL electrical connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 6. Read and write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 7. SPI read protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 8. Multiple bytes SPI read protocol (2 bytes example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 9. SPI write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 10. Multiple bytes SPI write protocol (2 bytes example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 11. SPI read protocol in 3-wires mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 12. X-axis zero-g level at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 13. X-axis sensitivity at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 14. Y-axis zero-g level at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 15. Y-axis sensitivity at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 16. Z-axis zero-g level at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 17. Z-axis Sensitivity at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 18. X-axis zero-g level change vs. temperature at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 19. X-axis sensitivity change vs. temperature at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 20. Y-axis zero-g level change vs. temperature at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 21. Y-axis sensitivity change vs. temperature at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 22. Z-axis zero-g level change vs. temperature at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 23. Z-axis sensitivity change vs. temperature at 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 24. X and Y axis zero-g level as function of supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 25. Z axis zero-g level as function of supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 26. Current consumption in Power-Down mode (Vdd=3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Figure 27. Current consumption in operational mode (Vdd=3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Figure 28. LGA-16 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

5/48

List of tables LIS3LV02DL

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Table 3. Mechanical characteristics @ Vdd=3.3 V, T=25 °C unless otherwise noted . . . . . . . . . . . . 5

Table 4. Mechanical characteristics @ Vdd=2.5 V, T=25 °C unless otherwise noted . . . . . . . . . . . . 7

Table 5. Electrical characteristics @ Vdd=3.3 V, T=25 °C unless otherwise noted . . . . . . . . . . . . . 9

Table 6. SPI Slave Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 7. I2C slave timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 8. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 9. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 10. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 11. Transfer when master is writing one byte to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 12. Transfer when master is writing multiple bytes to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 13. Transfer when master is receiving (reading) one byte of data from slave . . . . . . . . . . . . . 18

Table 14. Transfer when master is receiving (reading) multiple bytes of data from slave . . . . . . . . . 18

Table 15. Registers address map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Table 16. Register (0Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 17. Register description (0Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 18. Register (16h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 19. Register description (16h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 20. Register (17h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 21. Register description (17h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 22. Register (18h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 23. Register description (18h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 24. Register (19h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 25. Register description (19h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 26. Register (1Ah). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 27. Register description (1Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 28. Register (1Bh). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 29. Register description (1Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 30. Register (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 31. Register description (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Table 32. Register (21h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 33. Register description (21h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 34. Register (22h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 35. Register description (22h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 36. Register (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 37. Register description (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 38. Register (28h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 39. Register description (28h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 40. Register (29h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 41. Register description (29h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 42. Register (2Ah). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 43. Register description (2Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 44. Register (2Bh). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 45. Register description (2Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 46. Register (2Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 47. Register description (2Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 48. Register (2Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6/48

LIS3LV02DL List of tables

Table 49. Register description (2Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 50. Register (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 51. Register description (30h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 52. Register (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 53. Register description (31h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 54. Register (34h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 55. Register description (34h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 56. Register (35h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 57. Register description (35h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 58. Register (36h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 59. Register description (36h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 60. Register (38h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 61. Register description (38h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 62. Register (39h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 63. Register description (39h). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 64. Register (3Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 65. Register description (3Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 66. Register (3Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 67. Register description (3Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 68. Register (3Eh). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 69. Register description (3Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 70. Register (3Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 71. Register description (3Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 72. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

7/48

Block diagram and pin description LIS3LV02DL

1 Block diagram and pin description

1.1 Block diagram

Figure 1. Block diagram

X+

Y+

Z+

MUX

Z-

Y-

X-

REFERENCESELF TEST

CHARGE

AMPLIFIER

1.2 LGA-16 pin description

Figure 2. Pin connection

MUX

TRIMMING

CIRCUITS

Σ∆

Reconstruction

CLOCK

SCL/SPC

Filter

VDD_IO

SDA/SDI/SDO

Regs

Array

CONTROL LOGIC

INTERRUPT GEN.

SDO

RDY/INT

SPI

SCL/SPC

I2C

SDA/SDO/SDI

SDO

RDY/INT

DIRECTION OF THE DETECTABLE ACCELERATIONS

Table 2. Pin description

Pin# Name Function

1 RDY/INT Data ready/inertial wake-up interrupt

2 SDO SPI Serial Data Output

8/48

LIS3LV02DL

(TOP VIEW)

RES

GND

VDD

RES

VDD

GND

RES

LIS3LV02DL Block diagram and pin description

Table 2. Pin description

Pin# Name Function

SDA/

SDI/

SDO

C Serial Data (SDA)

I SPI Serial Data Input (SDI) 3-wire Interface Serial Data Output (SDO)

4 Vdd_IO Power supply for I/O pads

C Serial Clock (SCL)

5SCL/SPC

6CS

I SPI Serial Port Clock (SPC)

SPI enable

C/SPI mode selection (1: I2C mode; 0: SPI enabled)

7 NC Internally not connected

8CK

Optional external clock, if not used either leave unconnected or connect to GND

9 GND 0 V supply

10 Reserved Either leave unconnected or connect to Vdd_IO

11 Vdd Power supply

12 Reserved Connect to Vdd

13 Vdd Power supply

14 GND 0 V supply

15 Reserved Either leave unconnected or connect to GND

16 GND 0 V supply

9/48

Mechanical and electrical specifications LIS3LV02DL

2 Mechanical and electrical specifications

2.1 Mechanical characteristics

Table 3. Mechanical characteristics @ Vdd=3.3 V, T=25 °C unless otherwise noted

Symbol Parameter Test conditions Min.

Dres Device resolution

So Sensitivity

TCSo

Off

LTO f f

TCOff

Measurement range

Sensitivity change vs temperature

Zero-g level offset

accuracy

Zero-g Level offset long term

accuracy

Zero-g Level Change Vs Temperature

(4),(5)

(6)

(3)

FS bit set to 0 ±1.7 ±2.0

FS bit set to 1 ±5.3 ±6.0

Full-scale = ±2 g ODR1=40 Hz

Full-scale = ±2 g ODR2=160 Hz

Full-scale = ±2 g ODR3=640 Hz

Full-scale = ±2 g ODR4=2560 Hz

Full-scale = ±2 g 12 bit representation

Full-scale = ±6 g 12 bit representation

Full-scale = ±2 g 12 bit representation

Full-scale = ±2 g X, Y axis

Full-scale = ±2 g Z axis

Full-scale = ±6 g X, Y axis

Full-scale = ±6 g Z axis

Full-scale = ±2 g X, Y axis

Full-scale = ±2 g Z axis

Full-scale = ±6 g X, Y axis

Full-scale = ±6 g Z axis

Max Delta from 25°C 0.2 mg/

920 1024 1126

306 340 374

-70 70

-90 90

-100 100

-4.5 4.5

-6 6

-1.8 1.8

-2.2 2.2

(2)

Typ .

1.0

2.0

3.9

15.6

0.025 %/

Max. Unit

(1)

LSb/g

°C

%FS

°C

10/48

LIS3LV02DL Mechanical and electrical specifications

Table 3. Mechanical characteristics @ Vdd=3.3 V, T=25 °C unless otherwise noted

(1)

(continued)

Symbol Parameter Test conditions Min.

Best fit straight line X, Y axis Full-scale = ±2 g ODR=40 Hz

NL Non Linearity

Best fit straight line Z axis Full-scale = ±2 g ODR=40 Hz

CrAx Cross axis -3.5 3.5 %

Full-scale= ±2g X axis

Full-scale= ±2 g Y axis

Full-scale= ±2 g Z axis

Self test output change

(7),(8)

Full-scale= ±6 g X axis

250 550 900 LSb

-100 -350 -600 LSb

80 180 300 LSb

Typ .

±2

±3

(2)

Max. Unit

%FS

To p

System Bandwidth

(9)

Operating Temperature Range

Full-scale= ±6 g Y axis

Full-scale= ±6 g Z axis

80 180 300 LSb

-30 -120 -200 LSb

ODRx/4 Hz

-40 +85 °C

Wh Product Weight 72 mgram

1. The product is factory calibrated at 3.3 V. The device can be used from 2.16 V to 3.6 V

2. Typical specifications are not guaranteed

3. Verified by wafer level test and specification of initial offset and sensitivity

4. Zero-g level offset value after MSL3 preconditioning

5. Offset can be eliminated by enabling the built-in high pass filter (HPF)

6. Results of accelerated reliability tests

7. Self Test output changes with the power supply. “Self test output change” is defined as OUTPUT[LSb]

ctrl_reg1=1)

8. Output data reach 99% of final value after 5/ODR when enabling Self-Test mode due to device filtering

9. ODRx is output data rate. Refer to Table 5 for specifications

- OUTPUT[LSb]

(Self-test bit on ctrl_reg1=0)

. 1LSb=1g/1024 at 12bit representation, 2g Full-Scale

(Self-test bit on

11/48

Mechanical and electrical specifications LIS3LV02DL

Table 4. Mechanical characteristics @ Vdd=2.5 V, T=25 °C unless otherwise noted

(1)

Symbol Parameter Test conditions Min.

Measurement range

(3)

FS bit set to 0 ±1.7 ±2.0

FS bit set to 1 ±5.3 ±6.0

Full-scale = ±2g ODR1=40Hz

Full-scale = ±2g ODR2=160Hz

Dres Device resolution

Full-scale = ±2g ODR3=640Hz

Full-scale = ±2g ODR4=2560Hz

Full-scale = ±2g 12 bit representation

920 1024 1126

So Sensitivity

TCSo

Off

LTO f f

TCOff

Sensitivity change vs temperature

Zero-g level offset

accuracy

(4),(5)

Zero-g level offset long term

accuracy

(6)

Zero-g level change vs temperature

Full-scale = ±6g 12 bit representation

Full-scale = ±2g 12 bit representation

Full-scale = ±2g X, Y axis

Full-scale = ±2g Z axis

Full-scale = ±6g X, Y axis

Full-scale = ±6g Z axis

Full-scale = ±2g X, Y axis

Full-scale = ±2g Z axis

Full-scale = ±6g X, Y axis

Full-scale = ±6g Z axis

Max Delta from 25°C 0.2 mg/

306 340 374

-90 90

-110 110

-120 120

-5.5 5.5

-7 7

-2.8 2.8

-3.2 3.2

(2)

Typ .

Max. Unit

1.0

2.0

3.9

15.6

LSb/g

0.025 %/

°C

%FS

°C

12/48

LIS3LV02DL Mechanical and electrical specifications

Table 4. Mechanical characteristics @ Vdd=2.5 V, T=25 °C unless otherwise noted

(1)

(continued)

Symbol Parameter Test conditions Min.

Best fit straight line X, Y axis Full-scale = ±2g ODR=40Hz

NL Non linearity

Best fit straight line Z axis Full-scale = ±2g ODR=40Hz

CrAx Cross axis -3.5 3.5 %

Full-scale= ±2g X axis

Full-scale= ±2g Y axis

Full-scale= ±2g Z axis

Self test output change

(7),(8)

Full-scale= ±6g X axis

100 240 400 LSb

-30 -150 -350 LSb

30 80 130 LSb

Typ .

±2

±3

(2)

Max. Unit

%FS

System bandwidth

Full-scale= ±6g Y axis

Full-scale= ±6g Z axis

(9)

30 80 130 LSb

-10 -50 -120 LSb

ODRx/4 Hz

Top Operating temperature range -40 +85 °C

Wh Product weight 72 mgram

1. The product is factory calibrated at 3.3 V. The device can be used from 2.16 V to 3.6 V

2. Typical specifications are not guaranteed

3. Verified by wafer level test and specification of initial offset and sensitivity

4. Zero-g level offset value after MSL3 preconditioning

5. Offset can be eliminated by enabling the built-in high pass filter (HPF)

6. Results of accelerated reliability tests

7. Self Test output changes with the power supply. “Self test output change” is defined as OUTPUT[LSb]

ctrl_reg1=1)

8. Output data reach 99% of final value after 5/ODR when enabling Self-Test mode due to device filtering

9. ODRx is output data rate. Refer to Table 5 for specifications

- OUTPUT[LSb]

(Self-test bit on ctrl_reg1=0)

. 1LSb=1g/1024 at 12bit representation, 2g Full-Scale

(Self-test bit on

13/48

Mechanical and electrical specifications LIS3LV02DL

2.2 Electrical characteristics

Table 5. Electrical characteristics @ Vdd=3.3 V, T=25 °C unless otherwise noted

Symbol Parameter Test conditions Min.

Typ .

(2)

(1)

Max. Unit

Vdd Supply voltage 2.16 3.3 3.6 V

Vdd_IO I/O pads supply voltage 1.71 Vdd V

Vdd = 3.3 V 0.65 0.80

Idd Supply current

Vdd = 2.5 V 0.60 0.75

IddPdn

VIH

VIL

VOH High level output voltage

VOL Low level output voltage

Current consumption in Power-down mode

Digital High level Input voltage

Digital Low level Input voltage

110µA

0.8*Vdd _IO

0.2*Vdd _IO

0.9*Vdd _IO

0.1*Vdd _IO

ODR1 Output Data Rate 1 Dec factor = 512 40

ODR2 Output Data Rate 2 Dec factor = 128 160

ODR3 Output Data Rate 3 Dec factor = 32 640

ODR4 Output Data Rate 4 Dec factor = 8 2560

To n

System bandwidth

Turn-on time

(4)

(3)

ODRx/4 Hz

5/ODRx s

Top Operating temperature range -40 +85 °C

1. The product is factory calibrated at 3.3 V. The device can be used from 2.16 V to 3.6 V

2. Typical specifications are not guaranteed

3. Digital filter cut-off frequency

4. Time to obtain valid data after exiting Power-Down mode

14/48

LIS3LV02DL Mechanical and electrical specifications

2.3 Communication interface characteristics

2.3.1 SPI - serial peripheral interface

Subject to general operating conditions for Vdd and Top.

Table 6. SPI Slave Timing Values

(1)

Val ue

Symbol Parameter

Min Max

tc(SPC) SPI clock cycle 125 ns

fc(SPC) SPI clock frequency 8 MHz

tsu(CS) CS setup time 5

th(CS) CS hold time 10

tsu(SI) SDI input setup time 5

Unit

th(SI) SDI input hold time 15

tv(SO) SDO valid output time 55

th(SO) SDO output hold time 7

tdis(SO) SDO output disable time 50

1. Values are guaranteed at 8 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results, not tested in production

(2)

h(SI)

v(SO)

(3)

c(SPC)

h(SO)

h(CS)

LSB IN

LSB OUT

(3)

dis(SO)

(3)

Figure 3. SPI slave timing diagram

(3)

su(CS)

SPC

(3)

su(SI)

SDI

SDO

(3)

MSB IN

MSB OUT

2. Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both input and output port

3. When no communication is on-going, data on CS, SPC, SDI and SDO are driven by internal pull-up resistors

15/48

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