LIS3DSH
MEMS digital output motion sensor ultra low-power high performance three-axis “nano” accelerometer
Features
■Wide supply voltage, 1.71 V to 3.6 V
■Independent IOs supply (1.8 V) and supply voltage compatible
■Ultra low-power consumption
■±2g/±4g/±6g/±8g/±16g dynamically selectable full-scale
■I2C/SPI digital output interface
■16-bit data output
■Programmable embedded state machines
■Embedded temperature sensor
■Embedded self-test
■Embedded FIFO
■10000 g high shock survivability
■ECOPACK® RoHS and “Green” compliant
Applications
■Motion controlled user interface
■Gaming and virtual reality
■Pedometer
■Intelligent power saving for handheld devices
■Display orientation
■Click/double click recognition
■Impact recognition and logging
■Vibration monitoring and compensation
Description
Preliminary data
LGA-16 (3x3x1 mm)
of measuring accelerations with output data rates from 3.125 Hz to 1.6 kHz.
The self-test capability allows the user to check the functioning of the sensor in the final application.
The device can be configured to generate interrupt signals activated by user defined motion patterns.
The LIS3DSH has an integrated first in, first out (FIFO) buffer allowing the user to store data for host processor intervention reduction.
The LIS3DSH is available in a small thin plastic land grid array package (LGA) and it is guaranteed to operate over an extended temperature range from -40 °C to +85 °C.
Table 1. |
Device summary |
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Order |
Temperature |
Package |
Packaging |
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range [° C] |
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LIS3DSH |
-40 to +85 |
LGA-16 |
Tray |
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LIS3DSHTR |
-40 to +85 |
LGA-16 |
Tape and |
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reel |
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The LIS3DSH is an ultra low-power high performance three-axis linear accelerometer belonging to the “nano” family with embedded state machine that can be programmed to implement autonomous applications.
The LIS3DSH has dynamically selectable full scales of ±2g/±4g/±6g/±8g/±16g and it is capable
October 2011 |
Doc ID 022405 Rev 1 |
1/53 |
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to |
www.st.com |
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change without notice. |
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Contents |
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LIS3DSH |
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1 |
Contents |
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1 |
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 2 |
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2 |
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . |
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2.1 |
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2.2 |
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . 7 |
3 |
Mechanical and electrical specifications . . . . . . . . . . . . . . . . . . . |
. . . . . 9 |
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3.1 |
Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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3.2 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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3.3 |
Communication interface characteristics . . . . . . . . . . . . . . . . . . . . . |
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3.3.1 SPI - serial peripheral interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.3.2 I2C - inter IC control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5 Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.5.1 Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.5.2 Zero-g level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.6 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.6.1 Self-test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.7 Sensing element . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.8 IC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.9 Factory calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 |
Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
17 |
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4.1 |
Soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
17 |
5 |
Digital main blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
18 |
5.1 State machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2 FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.2.1 Bypass mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.2.2 FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.2.3 Stream mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.2.4 Stream-to-FIFO mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.2.5 Retrieve data from FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
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Digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
20 |
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6.1 |
I2C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
20 |
6.1.1 I2C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.2 SPI bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
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6.2.1 |
SPI read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.2.2 |
SPI write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.2.3 SPI read in 3-wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
30 |
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8.1 |
INFO1 (0Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
30 |
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8.2 |
INFO2 (0Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
30 |
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8.3 |
WHO_AM_I (0Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
30 |
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8.4 |
CTRL_REG3 (23h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
30 |
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8.5 |
CTRL_REG4 (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
31 |
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8.6 |
CTRL_REG5 (24h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
32 |
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8.7 |
CTRL_REG6 (25h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
32 |
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8.8 |
STATUS (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
33 |
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8.9 |
OUT_T (0Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
34 |
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8.10 |
OFF_X (10h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
34 |
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8.11 |
OFF_Y (11h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
34 |
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8.12 |
OFF_Z (12h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
34 |
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8.13 |
CS_X (13h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
35 |
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8.14 |
CS_Y (14h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
35 |
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8.15 |
CS_Z (15h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
35 |
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8.16 |
LC (16h - 17h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
35 |
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8.17 |
STAT (18h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
35 |
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8.18 |
VFC_1 (1Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
36 |
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8.19 |
VFC_2 (1Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
36 |
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8.20 |
VFC_3 (1Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.21 |
VFC_4 (1Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
36 |
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8.22 |
THRS3 (1Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
37 |
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8.23 |
OUT_X (28h - 29h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.24 OUT_Y (2Ah - 2Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.25 OUT_Z (2Ch - 2Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.26 FIFO_CTRL (2Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.27 FIFO_SRC (2Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.28 CTRL_REG1 (21h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.29 STx_1 (40h-4Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.30 TIM4_1 (50h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.31 TIM3_1 (51h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.32 TIM2_1 (52h - 53h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.33 TIM1_1 (54h - 55h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.34 THRS2_1 (56h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.35 THRS1_1 (57h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.36 MASK1_B (59h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.37 MASK1_A (5Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.38 SETT1 (5Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.39 PR1 (5Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8.40 TC1 (5Dh-5E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8.41 OUTS1 (5Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.42 PEAK1 (19h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.43 CTRL_REG2 (22h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.44 STx_1 (60h-6Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.45 TIM4_2 (70h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.46 TIM3_2 (71h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.47 TIM2_2 (72h - 73h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.48 TIM1_2 (74h - 75h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
8.49 THRS2_2 (76h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
8.50 THRS1_2 (77h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
8.51 MASK2_B (79h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
8.52 MASK2_A (7Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
8.53 SETT2 (7Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
8.54 PR2 (7Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
8.55 TC2 (7Dh-7E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
8.56 OUTS2 (7Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
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8.57 |
PEAK2 (1Ah) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.58 |
DES2 (78h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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List of tables |
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List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 5. SPI slave timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 6. I2C slave timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 7. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 8. LIS3DSH state machines: sequence of state to execute an algorithm. . . . . . . . . . . . . . . . 15 Table 9. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 10. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 11. SAD+Read/Write patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 12. Transfer when master is writing one byte to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 13. Transfer when master is writing multiple bytes to slave:. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 14. Transfer when master is receiving (reading) one byte of data from slave: . . . . . . . . . . . . . 19 Table 15. Transfer when master is receiving (reading) multiple bytes of data from slave . . . . . . . . . 19 Table 16. Register address map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 17. INFO1 register default value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 18. INFO2 register default value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 19. WHO_AM_I register default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 20. Control register 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 21. CTRL_REG3 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 22. Control register 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 23. CTRL_REG4 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 24. CTRL4 ODR configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 25. Control register 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 26. Control register 5 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 27. Self-test mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 28. Control register 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 29. Control register 6 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 30. Status register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 31. Status register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 32. OUT_T register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 33. OUT_T register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 34. Offset X default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 35. Offset Y default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 36. Offset Z default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 37. Constant shift X-axis default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 38. Constant shift Y-axis default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 39. Constant shift Y-axis default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 40. LC_L default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 41. LC_H default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 42. STAT register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 43. STAT register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 44. Vector filter coefficient register 1 default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 45. Vector filter coefficient register 2 default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 46. Vector filter coefficient register 3 default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 47. Vector filter coefficient register 4 default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 48. Threshold value register 3 default value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
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Table 49. OUT_X_L register default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 50. OUT_X_H register default value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 51. OUT_Y_L register default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 52. OUT_Y_H register default value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 53. OUT_Z_L register default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 54. OUT_Z_H register default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 55. FIFO control register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 56. FIFO mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 57. FIFO_SRC register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 58. FIFO_SRC register description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 59. SM1 control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 60. SM1 control register structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 61. Timer4 default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 62. Timer3 default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 63. TIM2_1_L default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 64. TIM2_1_H default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 65. TIM1_1_L default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 66. TIM1_1_H default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 67. THRS2_1 default value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 68. THRS1_1 default value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 69. MASK1_B axis and sign mask register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 70. MASK1_B register structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 71. MASK1_A axis and sign mask register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 72. MASK1_A register structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 73. SETT1 register structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 74. SETT1 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 75. PR1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 76. PR1 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 77. TC1_L default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 78. TC1_H default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 79. OUTS1 register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 80. OUTS1 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 81. PEAK1 default value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 82. SM2 control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 83. SM2 control register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 84. Timer4 default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 85. Timer3 default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 86. TIM2_2_L default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 87. TIM2_2_H default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 88. TIM1_2_L default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 89. TIM1_2_H default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 90. THRS2_2 default value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 91. THRS1_2 default value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 92. MASK2_B axis and sign mask register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 93. MASK2_B register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 94. MASK2_A axis and sign mask register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 95. MASK2_B register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 96. SETT2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 97. SETT2 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 98. PR2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 99. PR2 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 100. TC2_L default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
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Table 101. TC2_H default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 102. OUTS2 register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 103. OUTS2 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 104. PEAK2 default value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 105. DES2 default value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 106. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
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List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. SPI slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 4. I2C slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5. LIS3DSH electrical connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 6. Read and write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 7. SPI read protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 8. Multiple bytes SPI read protocol (2-byte example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 9. SPI write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 10. Multiple bytes SPI write protocol (2-byte example). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 11. SPI read protocol in 3-wire mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 12. LGA-16: mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
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Block diagram and pin description |
LIS3DSH |
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X+ |
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Y+ |
CHARGE |
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CS |
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Z+ |
AMPLIFIER |
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STATE MACHINES |
I2C |
SCL/SPC |
a |
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AND CONTROL |
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SDA/SDO/SDI |
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A/D |
LOGIC |
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MUX |
SPI |
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CONVERTER |
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SDO/SEL |
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Z- |
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Y- |
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FIFO / |
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X- |
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INT 1/DRDY |
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TEMP. SENSOR |
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INT 2 |
SELF TEST |
REFERENCE |
TRIMMING |
CLOCK |
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CIRCUITS |
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AM10209V1 |
Z
1
X
Y
(TOP VIEW)
DIRECTION OF THE
DETECTABLE
ACCELERATIONS
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Vdd |
RES |
GND |
Pin 1 indicator |
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GND |
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13 |
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1 |
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Vdd_IO |
GND |
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NC |
INT1/DRDY |
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NC |
RES |
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SCL/SPC |
INT2 |
|
9 |
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5 |
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GND |
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CS |
SEL/SDO |
SDA/SDI/SDO |
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(BOTTOM VIEW) |
am10210V1
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Block diagram and pin description |
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Table 2. |
Pin description |
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Pin# |
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Name |
Function |
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1 |
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Vdd_IO |
Power supply for I/O pins |
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2 |
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NC |
Not connected |
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3 |
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NC |
Not connected |
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4 |
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SCL |
I2C serial clock (SCL) |
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SPC |
SPI serial port clock (SPC) |
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5 |
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GND |
0 V supply |
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SDA |
I2C serial data (SDA) |
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6 |
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SDI |
SPI serial data input (SDI) |
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SDO |
3-wire interface serial data output (SDO) |
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7 |
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SEL |
I2C address selection |
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SDO |
SPI serial data output (SDO) |
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SPI enable |
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8 |
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CS |
I2C/SPI mode selection (1: SPI idle mode / I2C communication |
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enabled; 0: SPI communication mode / I2C disabled) |
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9 |
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INT 2 |
Interrupt 2 |
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10 |
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Reserved |
Connect to GND |
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11 |
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INT 1/DRDY |
Interrupt 1/ DRDY |
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12 |
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GND |
0 V supply |
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13 |
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GND |
0 V supply |
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14 |
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Vdd |
Power supply |
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15 |
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Reserved |
Connect to Vdd |
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16 |
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GND |
0 V supply |
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Doc ID 022405 Rev 1 |
11/53 |
Mechanical and electrical specifications |
LIS3DSH |
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3.1Mechanical characteristics
@ Vdd = 2.5 V, T = 25 °C unless otherwise noted(a).
Table 3. |
Mechanical characteristics |
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Symbol |
Parameter |
Test conditions |
Min. |
Typ.(1) |
Max. |
Unit |
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FS bit set to 000 |
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±2.0 |
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g |
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FS bit set to 001 |
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±4.0 |
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g |
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Measurement range(2) |
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FS |
FS bit set to 010 |
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±6.0 |
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g |
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FS bit set to 011 |
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±8.0 |
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g |
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FS bit set to 100 |
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±16.0 |
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g |
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FS bit set to 000 |
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0.06 |
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mg/digit |
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FS bit set to 001 |
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0.12 |
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mg/digit |
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So |
Sensitivity |
FS bit set to 010 |
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0.18 |
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mg/digit |
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FS bit set to 011 |
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0.24 |
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mg/digit |
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FS bit set to 100 |
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0.73 |
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mg/digit |
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TCSo |
Sensitivity change vs. |
FS bit set to 00 |
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0.01 |
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%/°C |
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temperature |
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TyOff |
Typical zero-g level |
FS bit set to 00 |
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±40 |
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mg |
offset accuracy(3) |
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TCOff |
Zero-g level change |
Max. delta from 25 °C |
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±0.5 |
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mg/°C |
vs. temperature |
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An |
Acceleration noise |
FS bit set to 00, normal mode, |
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150 |
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ug/ |
density |
ODR = 100 Hz |
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sqrt(Hz) |
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± 2g range, X,Y-axis ST2,ST1 = [01] |
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140 |
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Self test positive |
see Figure 24 |
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ST |
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mg |
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difference(4) |
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± 2g range, Z-axis ST2,ST1 = [01] |
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590 |
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see Figure 24 |
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Top |
Operating |
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-40 |
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+85 |
°C |
temperature range |
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1.Typical specifications are not guaranteed.
2.Verified by wafer level test and measurement of initial offset and sensitivity.
3.Typical zero-g level offset value after MSL3 preconditioning.
4.Self-test output change” is defined as: OUTPUT[mg](CNTL5 ST2, ST1 bits=01) - OUTPUT[mg](CNTL5 ST2, ST1 bits=00)
a. The product is factory calibrated at 2.5 V. The operational power supply range is from 1.71 V to 3.6 V.
12/53 |
Doc ID 022405 Rev 1 |
LIS3DSH |
Mechanical and electrical specifications |
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@ Vdd = 2.5 V, T = 25 °C unless otherwise noted(b).
Table 4. |
Electrical characteristics (1) |
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Symbol |
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Parameter |
Test conditions |
Min. |
Typ.(2) |
Max. |
Unit |
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Vdd |
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Supply voltage |
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1.71 |
2.5 |
3.6 |
V |
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Vdd_IO |
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I/O pins supply voltage(3) |
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1.71 |
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Vdd+0.1 |
V |
IddA |
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Current consumption in Active |
1.6 kHz ODR |
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225 |
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µA |
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mode |
3.125 Hz ODR |
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11 |
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µA |
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IddPdn |
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Current consumption in power- |
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2 |
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µA |
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down/standby mode |
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VIH |
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Digital high level input voltage |
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0.8*Vdd_IO |
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V |
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VIL |
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Digital low level input voltage |
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0.2*Vdd_IO |
V |
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VOH |
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High level output voltage |
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0.9*Vdd_IO |
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V |
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VOL |
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Low level output voltage |
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0.1*Vdd_IO |
V |
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Top |
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Operating temperature range |
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-40 |
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+85 |
°C |
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1.The product is factory calibrated at 2.5 V. The operational power supply range is from 1.71 V to 3.6 V.
2.Typical specifications are not guaranteed.
3.It is possible to remove Vdd maintaining Vdd_IO without blocking the communication buses, in this condition the measurement chain is powered off.
b. The product is factory calibrated at 2.5 V. The operational power supply range is from 1.71 V to 3.6 V.
Doc ID 022405 Rev 1 |
13/53 |
Mechanical and electrical specifications |
LIS3DSH |
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Subject to general operating conditions for Vdd and Top.
Table 5. |
SPI slave timing values |
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Symbol |
Parameter |
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Value (1) |
Unit |
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Min. |
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Max. |
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tc(SPC) |
SPI clock cycle |
100 |
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ns |
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fc(SPC) |
SPI clock frequency |
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10 |
MHz |
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tsu(CS) |
CS setup time |
6 |
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th(CS) |
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CS hold time |
8 |
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tsu(SI) |
SDI input setup time |
5 |
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th(SI) |
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SDI input hold time |
15 |
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ns |
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tv(SO) |
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SDO valid output time |
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50 |
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th(SO) |
SDO output hold time |
9 |
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tdis(SO) |
SDO output disable time |
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50 |
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1.Values are guaranteed at 10 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results, not tested in production.
CS |
(2) |
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(2) |
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tsu(CS) |
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tc(SPC) |
th(CS) |
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SPC |
(2) |
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(2) |
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tsu(SI) |
th(SI) |
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SDI |
(2) |
M SB IN |
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LSB IN |
(2) |
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tv(SO) |
th(SO) |
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tdis(SO) |
SDO |
(2) |
M SB OUT |
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LSB OUT |
(2) |
2. When no communication is on-going, data on SDO is driven by internal pull-up resistor.
c. Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both input and output ports.
14/53 |
Doc ID 022405 Rev 1 |
LIS3DSH |
Mechanical and electrical specifications |
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3.3.2I2C - inter IC control interface
Subject to general operating conditions for Vdd and Top.
Table 6. |
I2C slave timing values |
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Symbol |
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Parameter |
I2C standard mode (1) |
I2C fast mode (1) |
Unit |
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Min. |
Max. |
Min. |
Max. |
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f(SCL) |
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SCL clock frequency |
0 |
100 |
0 |
400 |
kHz |
tw(SCLL) |
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SCL clock low time |
4.7 |
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1.3 |
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µs |
tw(SCLH) |
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SCL clock high time |
4.0 |
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0.6 |
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tsu(SDA) |
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SDA setup time |
250 |
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100 |
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ns |
th(SDA) |
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SDA data hold time |
0.01 |
3.45 |
0.01 |
0.9 |
µs |
tr(SDA) tr(SCL) |
SDA and SCL rise time |
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1000 |
20 + 0.1Cb (2) |
300 |
ns |
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tf(SDA) tf(SCL) |
SDA and SCL fall time |
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300 |
20 + 0.1Cb (2) |
300 |
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th(ST) |
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START condition hold time |
4 |
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0.6 |
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tsu(SR) |
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Repeated START condition |
4.7 |
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0.6 |
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setup time |
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µs |
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tsu(SP) |
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STOP condition setup time |
4 |
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0.6 |
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tw(SP:SR) |
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Bus free time between STOP |
4.7 |
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1.3 |
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and START condition |
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1.Data based on standard I2C protocol requirement, not tested in production.
2.Cb = total capacitance of one bus line, in pF.
Figure 4. I2C slave timing diagram (d)
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REPEATED |
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START |
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START |
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tsu(SR) |
START |
SDA |
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tw(SP:SR) |
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f(SDA) |
tr(SDA) |
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tsu(SDA) |
th(SDA) |
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tsu(SP) |
STOP |
SCL |
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th(ST) |
tw(SCLL) |
tw(SCLH) |
tr(SCL) |
tf(SCL) |
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d. Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both ports.
Doc ID 022405 Rev 1 |
15/53 |
Mechanical and electrical specifications |
LIS3DSH |
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3.4Absolute maximum ratings
Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
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Table 7. |
Absolute maximum ratings |
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Symbol |
Ratings |
Maximum value |
Unit |
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Vdd |
Supply voltage |
-0.3 to 4.8 |
V |
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Vdd_IO |
I/O pins supply voltage |
-0.3 to 4.8 |
V |
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Vin |
Input voltage on any control pin |
-0.3 to Vdd_IO +0.3 |
V |
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(CS, SCL/SPC, SDA/SDI/SDO, SDO/SEL) |
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APOW |
Acceleration (any axis, powered, Vdd = 2.5 V) |
3000 for 0.5 ms |
g |
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10000 for 0.1 ms |
g |
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AUNP |
Acceleration (any axis, unpowered) |
3000 for 0.5 ms |
g |
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10000 for 0.1 ms |
g |
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TOP |
Operating temperature range |
-40 to +85 |
°C |
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TSTG |
Storage temperature range |
-40 to +125 |
°C |
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ESD |
Electrostatic discharge protection |
2 (HBM) |
kV |
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Note: |
Supply voltage on any pin should never exceed 4.8 V |
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This is a mechanical shock sensitive device, improper handling can cause permanent damage to the part.
This is an ESD sensitive device, improper handling can cause permanent damage to the part.
16/53 |
Doc ID 022405 Rev 1 |