ST LIS331DL User Manual

LIS331DL

MEMS motion sensor 3-axis - ±2g/±8g smart digital output “nano” accelerometer

Features

■2.16 V to 3.6 V supply voltage

■1.8 V compatible IOs

■<1 mW power consumption

■±2g / ±8g dynamically selectable full-scale

■I2C/SPI digital output interface

■Programmable interrupt generator

■Embedded click and double click recognition

■Embedded free-fall and motion detection

■Embedded high pass filter

■Embedded self test

■10000 g high shock survivability

■ECOPACK® RoHS and “Green” compliant (see Section 9)

Applications

■Free-Fall detection

■Motion activated functions

■Gaming and virtual reality input devices

■Vibration monitoring and compensation

Description

The LIS331DL, belonging to the “nano” family of ST motion sensors, is the smallest consumer low-

power three axes linear accelerometer. The device features digital I2C/SPI serial interface standard output and smart embedded functions.

The sensing element, capable of detecting the acceleration, is manufactured using a dedicated

LGA 16 (3x3x1 mm)

process developed by ST to produce inertial sensors and actuators in silicon.

The IC interface is manufactured using a CMOS process that allows to design a dedicated circuit which is trimmed to better match the sensing element characteristics.

The LIS331DL has dynamically user selectable full scales of ±2g/±8g and it is capable of measuring accelerations with an output data rate of 100 Hz or 400 Hz.

A self-test capability allows the user to check the functioning of the sensor in the final application.

The device may be configured to generate inertial wake-up/free-fall interrupt signals when a programmable acceleration threshold is crossed at least in one of the three axes. Thresholds and timing of interrupt generators are programmable by the end user on the fly.

The LIS331DL is available in plastic Land Grid Array package (LGA) and it is guaranteed to operate over an extended temperature range from -40 °C to +85 °C.

Table 1.	Device summary
Order code			Temp range [°C]		Package	Packing
LIS331DL			-40 to +85		LGA	Tray
LIS331DLTR			-40 to +85		LGA	Tape and reel
April 2008				Rev 3		1/42
						www.st.com

Contents	LIS331DL

Contents

1	Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 6
	1.1	Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
	1.2	Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
2	Mechanical and electrical specifications . . . . . . . . . . . . . . . . . . . . . . . .		8
	2.1	Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	8
	2.2	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	2.3	Communication interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . .	10

2.3.1 SPI - serial peripheral interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.3.2 I2C - Inter IC control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.5 Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.5.1 Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.5.2 Zero-g level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.5.3 Self test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.5.4 Click and double click recognition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3	Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		14
	3.1	Sensing element . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14
	3.2	IC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14
	3.3	Factory calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14

4	Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		15
	4.1	Soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
5	Digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		16
	5.1	I2C serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16

5.1.1 I2C operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.2 SPI bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.2.1	SPI read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
5.2.2	SPI write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
5.2.3	SPI read in 3-wires mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21

2/42

LIS331DL Contents

6	Register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		22
7	Register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		24
	7.1	WHO_AM_I (0Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	7.2	CTRL_REG1 (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	7.3	CTRL_REG2 (21h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25
	7.4	CTRL_REG3 [interrupt CTRL register] (22h) . . . . . . . . . . . . . . . . . . . . . .	26
	7.5	HP_FILTER_RESET (23h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	26
	7.6	STATUS_REG (27h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	27
	7.7	OUT_X (29h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	27
	7.8	OUT_Y (2Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	27
	7.9	OUT_Z (2Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	28
	7.10	FF_WU_CFG_1 (30h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	28
	7.11	FF_WU_SRC_1 (31h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	29
	7.12	FF_WU_THS_1 (32h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	29
	7.13	FF_WU_DURATION_1 (33h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	30
	7.14	FF_WU_CFG_2 (34h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	30
	7.15	FF_WU_SRC_2 (35h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	31
	7.16	FF_WU_THS_2 (36h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	31
	7.17	FF_WU_DURATION_2 (37h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	32
	7.18	CLICK_CFG (38h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	32
	7.19	CLICK_SRC (39h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	33
	7.20	CLICK_THSY_X (3Bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	33
	7.21	CLICK_THSZ (3Ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	34
	7.22	CLICK_TimeLimit (3Dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	34
	7.23	CLICK_Latency (3Eh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	34
	7.24	CLICK_Window (3Fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	34
8	Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .		35
	8.1	Mechanical characteristics at 25 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	35

8.2Mechanical characteristics derived from measurement in the -40 °C to +85

°C temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 8.3 Electrical characteristics at 25 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

3/42

Contents		LIS331DL
9	Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . 38
10	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . 39

4/42

LIS331DL	List of figures

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. SPI slave timing diagram (2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 4. I2C slave timing diagram (4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 5. LIS331DL electrical connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 6. Read & write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 7. SPI read protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 8. Multiple bytes SPI read protocol (2 bytes example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 9. SPI write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 10. Multiple bytes SPI write protocol (2 bytes example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 11. SPI read protocol in 3-wires mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 12. X axis Zero-g level at 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 13. X axis Sensitivity at 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 14. Y axis Zero-g level at 2.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 15. Y axis Sensitivity at 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 16. Z axis Zero-g level at 2.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 17. Z axis Sensitivity at 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 18. X axis Zero-g level change vs. temperature at 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 19. X axis Sensitivity change vs. temperature at 2.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 20. Y axis Zero-g level change vs. temperature at 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 21. Y axis Sensitivity change vs. temperature at 2.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 22. Z axis Zero-g level change vs. temperature at 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 23. Z axis Sensitivity change vs. temperature at 2.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 24. Current consumption in normal mode at 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 25. LGA 16: Mechanical data and package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5/42

List of tables	LIS331DL

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Mechanical characteristics @ Vdd=2.5 V, T= 25 °C unless otherwise noted . . . . . . . . . . . . 7 Table 4. Electrical characteristics @ Vdd=2.5 V, T= 25 °C unless otherwise noted. . . . . . . . . . . . . . 8 Table 5. SPI slave timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 6. I2C slave timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 7. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 8. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 9. Serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 10. SAD+Read/Write patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 11. Transfer when Master is writing one byte to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 12. Transfer when Master is writing multiple bytes to slave . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 13. Transfer when Master is receiving (reading) one byte of data from slave . . . . . . . . . . . . . 17 Table 14. Transfer when Master is receiving (reading) multiple bytes of data from slave . . . . . . . . . 17 Table 15. Register address map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 16. WHO_AM_I register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 17. CTRL_REG1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 18. CTRL_REG1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 19. CTRL_REG2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 20. CTRL_REG2 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 21. High pass filter cut-off frequency configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 22. CTRL_REG3 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 23. CTRL_REG3 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 24. Data Signal on INT1(2) pad control bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 25. STATUS_REG register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 26. STATUS_REG description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 27. OUT_X register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 28. OUT_Y register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 29. OUT_Z register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 30. FF_WU_CFG_1 register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 31. FF_WU_CFG_1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 32. FF_WU_SRC_1 register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 33. FF_WU_SRC_1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 34. FF_WU_THS_1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 35. FF_WU_THS_1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 36. FF_WU_DURATION_1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 37. FF_WU_DURATION_1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 38. FF_WU_CFG_2 register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 39. FF_WU_CFG_2 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 40. FF_WU_SRC_2 register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 41. FF_WU_SRC_2 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 42. FF_WU_THS_2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 43. FF_WU_THS_2 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 44. FF_WU_DURATION_2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 45. FF_WU_DURATION_2 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 46. CLICK_CFG register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 47. CLICK_CFG description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 48. Click interrupt configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6/42

LIS331DL	List of tables

Table 49. CLICK_SRC register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 50. CLICK_SRC description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 51. CLICK_THSY_X register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 52. CLICK_THSY_X description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 53. CLICK_THSZ register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 54. CLICK_THSZ description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 55. CLICK_TimeLimit register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 56. CLICK_Latency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 57. CLICK_Window register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 58. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

7/42

Block diagram and pin description	LIS331DL

1 Block diagram and pin description

1.1Block diagram

Figure 1. Block diagram

		X+
		Y+	CHARGE
		Z+	AMPLIFIER			CS
	a		A/D		I2C	SCL/SPC
		MUX		CONTROL LOGIC		SDA/SDO/SDI
			CONVERTER
		Z-			SPI	SDO
		Y-
		X-
			TRIMMING		CONTROL LOGIC	INT 1
	SELF TEST	REFERENCE		CLOCK	&
			CIRCUITS
					INTERRUPT GEN.	INT 2

1.2Pin description

Figure 2. Pin connection

Z

1	13			1
X
Y	9			5
(TOP VIEW)
DIRECTION OF THE		(BOTTOM VIEW)
DETECTABLE
ACCELERATIONS

8/42

LIS331DL				Block diagram and pin description
	Table 2.	Pin description
	Pin#		Name	Function
	1		Vdd_IO	Power supply for I/O pins
	2		NC	Internally Not Connected
	3		NC	Internally Not Connected
	4		SCL	I2C Serial Clock (SCL)
			SPC	SPI Serial Port Clock (SPC)
	5		GND	0V supply
			SDA	I2C Serial Data (SDA)
	6		SDI	SPI Serial Data Input (SDI)
			SDO	3-wire Interface Serial Data Output (SDO)
	7		SDO	SPI Serial Data Output (SDO)
			SA0	I2C less significant bit of the device address (SA0)
	8		CS	SPI enable
				I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)
	9		INT 2	Inertial interrupt 2
	10		Reserved	Connect to GND
	11		INT 1	Inertial interrupt 1
	12		GND	0V supply
	13		GND	0V supply
	14		Vdd	Power supply
	15		Reserved	Connect to Vdd
	16		GND	0V supply

9/42

Mechanical and electrical specifications	LIS331DL

2 Mechanical and electrical specifications

2.1Mechanical characteristics

Table 3. Mechanical characteristics @ Vdd=2.5 V, T= 25 °C unless otherwise noted(1)

	Symbol	Parameter	Test conditions	Min.	Typ.(2)	Max.	Unit
	FS	Measurement range(3)	FS bit set to 0	±2.0	±2.3		g
			FS bit set to 1	±8.0	±9.2
	So	Sensitivity	FS bit set to 0	16.2	18	19.8	mg/digit
			FS bit set to 1	64.8	72	79.2
	TCSo	Sensitivity change vs	FS bit set to 0		±0.01		%/°C
		temperature
	TyOff	Typical zero-g level offset	FS bit set to 0		±40		mg
		accuracy(4),(5)
			FS bit set to 1		±60		mg
	TCOff	Zero-g level change vs	Max delta from 25 °C		±0.5		mg/°C
		temperature
	NL	Non linearity	Best fit straight line		±0.5		% FS
			FS bit set to 0
			STP bit used	-3	-19	-32	LSb
			X axis
		Self test output	FS bit set to 0
	Vst		STP bit used	3	19	32	LSb
		change(6),(7),(8)
			Y axis
			FS bit set to 0
			STP bit used	-3	-19	-32	LSb
			Z axis
	BW	System bandwidth(9)			ODR/2		Hz
	Top	Operating temperature range		-40		+85	°C
	Wh	Product weight			20		mgram

1.The product is factory calibrated at 2.5 V. The operational power supply range is from 2.16 V to 3.6 V.

2.Typical specifications are not guaranteed

3.Verified by wafer level test and measurement of initial offset and sensitivity

4.Typical zero-g level offset value after MSL3 preconditioning

5.Offset can be eliminated by enabling the built-in high pass filter

6.If STM bit is used values change in sign for all axes

7.Self Test output changes with the power supply. “Self test output change” is defined as OUTPUT[LSb](Self-test bit on CTRL_REG1=1) -OUTPUT[LSb](Self-test bit on CTRL_REG1=0). 1LSb=4.6g/256 at 8bit representation, ±2.3 g Full-Scale

8.Output data reach 99% of final value after 3/ODR when enabling Self-Test mode due to device filtering

9.ODR is output data rate. Refer to Table 4 for specifications

10/42

LIS331DL	Mechanical and electrical specifications

2.2Electrical characteristics

Table 4. Electrical characteristics @ Vdd=2.5 V, T= 25 °C unless otherwise noted(1)

Symbol	Parameter	Test conditions	Min.	Typ.(2)	Max.	Unit
Vdd	Supply voltage		2.16	2.5	3.6	V
Vdd_IO	I/O pins supply voltage(3)		1.71		Vdd+0.1	V
Idd	Supply current	ODR=100 Hz		0.3	0.4	mA
IddPdn	Current consumption in			1	5	µA
	power-down mode
VIH	Digital high level input voltage		0.8*Vdd_IO			V
VIL	Digital low level input voltage				0.2*Vdd_IO	V
VOH	High level output voltage		0.9*Vdd_IO			V
VOL	Low level output voltage				0.1*Vdd_IO	V
ODR	Output data rate	DR=0		100		Hz
		DR=1		400
BW	System bandwidth(4)			ODR/2		Hz
Ton	Turn-on time(5)			3/ODR		s
Top	Operating temperature range		-40		+85	°C

1.The product is factory calibrated at 2.5 V. The operational power supply range is from 2.16 V to 3.6 V.

2.Typical specification are not guaranteed

3.It is possible to remove Vdd maintaining Vdd_IO without blocking the communication busses, in this condition the measurement chain is powered off.

4.Filter cut-off frequency

5.Time to obtain valid data after exiting Power-Down mode

11/42

Mechanical and electrical specifications	LIS331DL

2.3Communication interface characteristics

2.3.1SPI - serial peripheral interface

Subject to general operating conditions for Vdd and top.

Table 5.		SPI slave timing values
Symbol		Parameter		Value(1)		Unit
			Min		Max
tc(SPC)	SPI clock cycle		100			ns
fc(SPC)	SPI clock frequency				10	MHz
tsu(CS)	CS setup time		5
th(CS)	CS hold time		8
tsu(SI)	SDI input setup time		5
th(SI)	SDI input hold time		15			ns
tv(SO)	SDO valid output time				50
th(SO)	SDO output hold time		6
tdis(SO)	SDO output disable time				50

1.Values are guaranteed at 10 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results, not tested in production

Figure 3. SPI slave timing diagram (2)

CS	(3)				(3)
	tsu(CS)		tc(SPC)	th(CS)
SPC	(3)				(3)
	tsu(SI)	th(SI)
SDI	(3)	MSB IN		LSB IN	(3)
		tv(SO)	th(SO)		tdis(SO)
SDO	(3)	MSB OUT		LSB OUT	(3)

2.Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both Input and Output port

3.When no communication is on-going, data on CS, SPC, SDI and SDO are driven by internal pull-up resistors

12/42

LIS331DL	Mechanical and electrical specifications

2.3.2I2C - Inter IC control interface

Subject to general operating conditions for Vdd and top.

Table 6.		I2C slave timing values
Symbol		Parameter	I2C Standard mode(1)		I2C Fast mode (1)			Unit
			Min	Max	Min		Max
f(SCL)	SCL clock frequency		0	100	0		400	KHz
tw(SCLL)	SCL clock low time		4.7		1.3			µs
tw(SCLH)	SCL clock high time		4.0		0.6
tsu(SDA)	SDA setup time		250		100			ns
th(SDA)	SDA data hold time		0(2)	3.45	0(2)		0.9	µs
tr(SDA) tr(SCL)	SDA and SCL rise time			1000	20 + 0.1Cb (3)		300	ns
tf(SDA) tf(SCL)	SDA and SCL fall time			300	20 + 0.1C	(3)	300
						b
th(ST)	START condition hold time		4		0.6
tsu(SR)	Repeated START condition		4.7		0.6
	setup time
								µs
tsu(SP)	STOP condition setup time		4		0.6
tw(SP:SR)	Bus free time between STOP		4.7		1.3
	and START condition

1.Data based on standard I2C protocol requirement, not tested in production

2.A device must internally provide an hold time of at least 300ns for the SDA signal (referred to VIHmin of the SCL signal) to bridge the undefined region of the falling edge of SCL

3.Cb = total capacitance of one bus line, in pF

Figure 4. I2C slave timing diagram (4)
				REPEATED
	START				START
				tsu(SR)	START
SDA				tw(SP:SR)
tf(SDA)	tr(SDA)		tsu(SDA)	th(SDA)
				tsu(SP)	STOP
SCL
th(ST)	tw(SCLL)	tw(SCLH)	tr(SCL)	tf(SCL)

4. Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both ports

13/42