These circuits are high speed JFET input single
operational amplifiers incorporating well matched,
high voltage JFET and bipolar transistors in a
monolithic integrated circui t.
The devices feature high slew rates, low input
bias and offset currents, and low offset voltage
temperature coefficient.
LF351Absolute maximum ratings and operating conditions
2 Absolute maximum ratings and operating conditions
Table 1.Absolute maximum ratings
SymbolParameterValueUnit
(2)
(1)
(7)
(3)
(6)
(5)
(8)
(4)
CC
(4)
+
and V
CC
±18V
±15V
±30V
125
°C/W
85
40
°C/W
41
Infinite
500V
200V
1.5kV
-
.
V
CC
V
i
V
id
Supply voltage
Input voltage
Differential input voltage
Thermal resistance junction to ambient
R
thja
SO-8
DIP8
Thermal resistance junction to case
R
thjc
SO-8
DIP8
Output short-circuit duration
T
stg
Storage temperature range-65 to +150°C
HBM: human body model
ESD
MM: machine model
CDM: charged device model
1. All voltage values, except differential voltage, are with respect to the zero reference level (ground) of the supply voltages
where the zero reference level is the midpoint between V
2. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts, whichever is less.
3. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
4. Short-circuits can cause excessive heating and destructive dissipation. Values are typical.
5. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure
that the dissipation rating is not exceeded
6. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor
between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
7. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the
device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations
while the other pins are floating.
8. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly
to the ground through only one pin. This is done for all pins.
Table 2.Operating conditions
SymbolParameterLF151LF251LF351Unit
T
V
oper
Supply voltage6 to 32V
CC
Operating free-air temperature range-55 to +125-40 to +1050 to +70°C
3/14
Electrical characteristicsLF351
3 Electrical characteristics
Table 3.Electrical characteristics at VCC = ±15 V, T
= +25°C (unless otherwise specified)
amb
SymbolParameterMin. Typ. Max.Unit
V
io
DV
I
io
I
ib
A
vd
SVR
I
CC
V
icm
CMR
I
OS
Input offset voltage (Rs = 10kΩ)
≤ T
≤ T
≤ T
amb
amb
amb
≤ T
≤ T
≤ T
max
max
(1)
max
(1)
T
min
Input offset voltage drift10µV/°C
io
Input offset current
T
min
Input bias current
T
min
Large signal voltage gain (RL = 2kΩ, Vo = ±10V)
T
≤ T
≤ T
amb
amb
≤ T
≤ T
max
max
= 10kΩ)
S
min
Supply voltage rejection ratio (R
T
min
Supply current, no load
≤ T
T
min
amb
≤ T
max
Input common mode voltage range
Common mode rejection ratio (RS = 10kΩ)
T
≤ T
amb
≤ T
max
min
Output short-circuit current
T
≤ T
amb
≤ T
max
min
310
5100
20200
5025200
808086
1.43.4
±11 +15
-12
707086
10104060
13
4
20
V/mV
3.4
60
Output voltage swing
RL = 2kΩ
= 10kΩ
R
±V
opp
L
≤ T
T
min
amb
≤ T
max
RL = 2kΩ
= 10kΩ
R
L
SRSlew rate, V
Rise time, Vi = 20mV, RL = 2kΩ, CL = 100pF, unity gain0.1µs
1. The input bias currents are junction leakage currents which approximately double for every 10°C increase in the junction
temperature.
4/14
LF351Electrical characteristics
Figure 3.Maximum peak-to-peak output
voltage versus frequency
Figure 5.Maximum peak-to-peak output
voltage versus frequency
Figure 4.Maximum peak-to-peak output
voltage versus frequency
Figure 6.Maximum peak-to-peak output
voltage versus free air temp.
Figure 7.Maximum peak-to-peak output
voltage versus load resistance
Figure 8.Maximum peak-to-peak output
voltage versus supply vo ltage
5/14
Electrical characteristicsLF351
Figure 9.Input bias current versus free air
temperature
Figure 11. Large signal differential voltage
amplification and phase shift
versus frequency
Figure 10. Large signal differential voltage
amplification versus free air temp.
Figure 12. Total power dissipation versus free
air temperature
Figure 13. Supply current per amplifier ver sus
free air temperature
6/14
Figure 14. Supply current per ampli fier ver sus
supply voltage
LF351Electrical characteristics
Figure 15. Common mode rejection ratio
versus free air temperature
Figure 16. Voltage follower large signal pulse
response
Figure 17. Output voltage versus elapsed time Figure 18. Equivalent input noise voltage
versus frequency
Figure 19. Total harmonic distortion versus
frequency
7/14
Parameter measurement informationLF351
4 Parameter measurement information
Figure 20. Voltage followerFigure 21. Gain-of-10 inverting amplifier
8/14
LF351Typical application
5 Typical application
Figure 22. Square wave oscillator (0.5 Hz)
Figure 23. High Q notch filter
9/14
Package informationLF351
6 Package information
In order to meet environmental requirements, STMicroelectronics offers these devices in
ECOPACK
category of second level interconnect is marke d on the pa ckage and on the inner box label,
in compliance with JEDEC Standard JESD97. The maximum ratings related t o soldering
conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics
trademark. ECOPACK specifications are available at: www.st.com
®
packages. These packages have a lead-free second level interconnect. The
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