ST LDLN015PU10R, LDLN015PU12R, LDLN015PU15R, LDLN015PU18R, LDLN015PU28R User Manual

Wide range of output voltage from 0.8 V to 3.3 V with 100 mV step

Input voltage from 2.1 to 5.5 V

Very low quiescent current (17 µA typ. at no load, 54 µA typ. at 150 mA load; 2 µA max. in off mode)

LDLN015xx

150 mA - ultra low noise - high PSRR linear voltage regulator IC

Preliminary data

Features

■ Ultra low noise: 6.3 µVRMS from 10 Hz to 100 kHz

■

■

DFN6 (2 x 2 mm)

■Output voltage tolerance: ± 1% at 25 °C

■150 mA guaranteed output current

■

■Logic-controlled electronic shutdown

■Compatible with ceramic capacitor (COUT = 0.47 µF)

■No bypass capacitor is required

■Internal current and thermal limit

■Package DFN6 (2 x 2 mm)

■Temperature range: - 40 °C to 125 °C

Description

The LDLN015xx is an ultra low noise linear regulator which provides 150 mA maximum current from an input voltage ranging from 2.1 V to 5.5 V with a typical dropout voltage of 86 mV.

With its 6.3 µVRMS noise value in a band from 10 Hz to 100 kHz, the LDLN015xx provides a very

clean output suitable for ultra sensitive loads. It is

stable with ceramic capacitors. High PSRR, low quiescent current and very low noise features make it suitable for low power battery powered applications. Power supply rejection is higher than 90 dB at low frequencies and starts to roll off at 10 kHz. The enable logic control function puts the LDLN015xx into shutdown mode allowing a total current consumption lower than 1 µA. The device also includes a short-circuit constant current limiting and thermal protection. Typical applications are noise sensitive loads like ADC, VCO in mobile phones, and personal digital assistants (PDAs).

Table 1.	Device summary
	Part numbers	Order codes	Output voltages
	LDLN015XX10	LDLN015PU10R	1.0 V
	LDLN015XX12	LDLN015PU12R	1.2 V
	LDLN015XX15	LDLN015PU15R	1.5 V
	LDLN015XX18	LDLN015PU18R	1.8 V
	LDLN015XX28	LDLN015PU28R	2.8 V
	LDLN015XX33	LDLN015PU33R	3.3 V

January 2012	Doc ID 022735 Rev 1	1/17
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to		www.st.com
change without notice.

Contents	LDLN015xx

Contents

1	Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 3
2	Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 4
3	Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	5
4	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	6
5	Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .	8
6	Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	12
7	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16

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LDLN015xx	Application diagram

1 Application diagram

Figure 1. Block diagram

VIN

VBG	RC filter
Bandgap	VREF	PDMOS
reference	OPAMP
		OPAMP
	VFB

VOUT

Figure 2. Typical application circuit

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Pin configuration	LDLN015xx

2 Pin configuration

Figure 3. Pin connections (top view)

IN	1	6	OUT
NC	2	5	NC
EN	3	4	GND
		CS26700

	Table 2.	Pin description
	Pin n°	Symbol	Name and function
	1	IN	Input voltage
	2	NC	Not connected
			Enable input.
	3	EN	Set VEN > 0.9 to turn on the device
			Set VEN < 0.4 to turn off the device
	4	GND	Ground
	5	NC	Not connected
	6	OUT	Output voltage
Note:	Exposed pad is electrically connected to GND.

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LDLN015xx				Maximum ratings
3	Maximum ratings
Table 3.	Absolute maximum ratings
Symbol		Parameter		Value		Unit
VIN	DC input voltage			-0.3 to 7		V
VOUT	DC output voltage			from -0.3 to 4.6		V
VEN	Enable input voltage		from -0.3 to VIN + 0.3			V
IOUT	Output current		Internally limited			mA
PD	Power dissipation		Internally limited			mW
TSTG	Storage temperature range			-65 to 150		°C
TOP	Operating junction temperature range			-40 to 125		°C
ESD	Human body model		± 3			kV
	Machine model		± 300			V
Note:	Absolute maximum ratings are those values beyond which damage to the device may occur.
	Functional operation under these conditions is not implied.
Table 4.	Thermal data
Symbol		Parameter		Value		Unit
RthJA		Thermal resistance junction-ambient		105		°C/W
RthJC		Thermal resistance junction-case		20		°C/W

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Electrical characteristics	LDLN015xx

4 Electrical characteristics

TJ = 25 °C, VIN = VOUT(NOM) + 1 V, CIN = COUT = 0.47 µF, IOUT = 1 mA, VEN = VIN, unless otherwise specified.

Table 5.	Electrical characteristics (1) (2)
Symbol	Parameter		Test conditions			Min.	Typ.	Max.	Unit
VIN	Operating input voltage					2.1		5.5	V
		IOUT =1mA				-1		1
VOUT	VOUT accuracy	-40°C<TJ<125°C, IOUT=from 1mA to				-2		2	%
		150mA, VIN=VOUT(NOM) + 1V to 5.5
VOUT	Static line regulation	VOUT +1V ≤VIN ≤5.5V, IOUT = 1mA					0.005		%/V
VOUT	Static load regulation	IOUT = 1mA to 150mA					0.001		%/mA
VDROP	Dropout voltage (3)	IOUT = 150mA, VOUT > 1.9V					86	180	mV
		-40°C<TJ<125°C
		10Hz to 100kHz, IOUT = 0mA,					6.3
eN	Output noise voltage	VOUT =1.0V							µVRMS
		10Hz to 100kHz, IOUT = 150mA,					9.9
		VOUT =1.0V
		VIN = VOUTNOM+1V+/-VRIPPLE					92
		VRIPPLE = 0.5V Freq.=1kHz
		IOUT = 10mA
SVR	Supply voltage	VIN = VOUTNOM+1V+/-VRIPPLE					89		dB
	rejection VOUT =1.0V	VRIPPLE = 0.5V Freq.=10kHz
		IOUT = 10mA
		VIN = VOUTNOM+1V+/-VRIPPLE					50
		VRIPPLE = 0.5V Freq.=100kHz
		IOUT = 1mA
		IOUT=0mA					17	60
		IOUT=0mA, -40°C<TJ<125°C					54
IQ	Quiescent current	IOUT=150mA						120	µA
		I	=150mA, -40°C<T	J	<125°C
		OUT
		VIN input current in OFF mode					0.002	2
		VEN=GND
ISC	Short-circuit current	RL=0; VIN=2.0V				300			mA
VEN	Enable input logic low	VIN = 2.1V to 5.5V, -40°C<TJ <125°C						0.4	V
	Enable input logic high	VIN = 2.1V to 5.5V, -40°C<TJ <125°C				0.9
IEN	Enable pin input	VEN=5.5V					0.1	100	nA
	current
T	Turn-on time (4)						110		µs
ON

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