The L99MC6 IC is a highly flexible monolithic
medium current output driver that incorporates 3
dedicated low-side outputs (channels 4 to 6) and
3 independently self configuring outputs
(channels 1 to 3) that can be used as either lowside or high-side drivers in any combination. The
L99MC6 can control inductive loads,
incandescent bulbs or LEDs.
The L99MC6 can be used in a half bridge
configuration with crosscurrent protection.
The channel 2 can be controlled directly via the
IN/PWM pin for PWM applications. The IN/PWM
signal can be applied to any other output.
The integrated 16-bit standard serial peripheral
interface (SPI) controls all outputs and provides
diagnostic information: normal operation, openload in off-state, overcurrent, temperature
warning, overtemperature.
4DRN1Drain of self configurable channel 1, in HS mode also V
5DRN2Drain of self configurable channel 2
15SRC2Source of self configurable channel 2
12DRN3Drain of self configurable channel 3
13SRC3Source of self configurable channel 3
2DRN4Drain of channel 4
16DRN5Drain of channel 5
14DRN6Drain of channel 6
11DI
Ground:
Reference potential
IN/PWM direct mode:
Direct input for channel 2. Other channels can be driven in PWM mode via SPI.
Logic voltage supply 3.3 V/5 V:
For this input a ceramic capacitor as close as possible to GND is recommended
supply
S
SPI data in:
The input requires CMOS logic levels and receives serial data from the
microcontroller. The data is a 16-bit control word and the most significant bit
(MSB, bit 7) is transferred first.
SPI data out:
9DO
The diagnosis data is available via the SPI and this tristate-output. The output
remains in tristate, if the chip is not selected by the input CSN (CSN = high).
SPI chip select not (active low):
7CSN
This input is low active and requires CMOS logic levels. The serial data transfer
between the L99MC6 and microcontroller is enabled by pulling the input CSN to
low-level.
SPI serial clock input:
10SCK
This input controls the internal shift register of the SPI and requires CMOS logic
levels.
10/55Doc ID 16523 Rev 1
L99MC6Introduction
Figure 3.Configuration diagram (top view) not in scale
GND
1
16
DRN5
DRN4
SRC1
DRN1
DRN2
PWM/IN
CSN
VCC
The tab must be connected to GND
2
3
4
PowerSSO-16
5
6
7
8
TAB = GN D
15
14
13
12
11
8
9
SRC2
DRN6
SRC3
DRN3
DI
SCK
DO
Doc ID 16523 Rev 111/55
DescriptionL99MC6
2 Description
2.1 Dual power supply: VS and V
The supply voltage VCC (3.3 V/5 V) supplies the whole device. In case of power-on (VCC
increases from undervoltage to V
internally generated power-on reset (POR). If the voltage V
minimum threshold (V
POR ON
impedance) and the status registers are cleared (see Figure 4).
Figure 4.Power-on reset
V
V
POR OFF
V
POR ON
All Status Registers are cleared
POR OFF
= 2.4 V, typical), the outputs are switched-off (high-
CC
CC
= 2.7 V, typical) the circuit is initialized by an
decreases under the
CC
V
POR hyst.
IC is disabled
2.1.1 Channels
The channels 1 to 3 are self configuring high-side or low-side n-channel mosfets. This
flexibility allows the user to connect loads in high-side or low-side configuration in any
combination.
In order to provide low R
charge pump (CP) to drive the internal gate voltage(s) is implemented. If the charge pump is
activated (ENCP1 = 1, DISCP2 = 0, see Section 9.3: Control and status registers), the
internal charge-pump uses V
V
is used to drive all channels.
CC
The channels 4 to 6 are n-channel low-side drivers. The source of the respective mosfet are
internally connected to the device GND.
Caution:For any high-side configuration, channel 1 must be used as a high-side switch.
If channel 1 is configured as low-side, the charge pump has to be deactivated to avoid
charge pump current from the drain.
Caution:The charge pump may not be deactivated (see Section 9.3: Control and status registers) if
one of the channels is in high-side configuration, while a short-circuit from the source to the
battery is present. If these conditions occur, the voltage of the shorted source is applied to
the VCC pin.
values for high-side configured switches (channels 1 to 3), a
dson
from the drain of channel 1, as its power source. Otherwise
S
12/55Doc ID 16523 Rev 1
L99MC6Description
2.2 Standby mode
The standby mode of the L99MC6 is activated by SPI command (EN bit of CTRL 0 reset to
0, see Section 9.3.2: Register description). The inputs and outputs are switched-off. The
status registers are cleared and the control registers are reset to their default values.
In the standby mode the current consumption is 5 µA (typical value). A SPI command is
needed to switch the L99MC6 in normal mode.
2.3 Inductive loads
Each switch is built by a power DMOS transistor. For low-side configured outputs an internal
zener clamp from the drain to gate with a breakdown of 31 V minimum provides for fast turnoff of inductive loads.
For high-side configured outputs, an internal zener clamp with a breakdown of -15 V
maximum provides for fast turn-off of inductive loads (Figure 5).
The maximum clamping energy is specified in Chapter 10.
Figure 5.Output voltage clamping
Low Side Configuration
Drain Clamp
Voltage
(V
DRN_CL1-6)
= 35V)
V
GND
Output Current
S
Drain Voltage
2.4 Diagnostic functions
All diagnostic functions (overload, open-load, temperature warning and thermal shutdown)
are internally filtered and the condition has to be valid for at least 32 µs (open-load: typ.
400 µs, respectively) before the corresponding status bit in the status registers are set. The
filters are used to improve the noise immunity of the device. Open-load and temperature
warning function are intended for information purpose and do not change the state of the
output drivers. On contrary, the overload and thermal shutdown condition disable the
corresponding driver (overload) or all drivers (thermal shutdown), respectively. Without
setting the overcurrent recovery bit in the input data register to logic high, the microcontroller
has to clear the overcurrent status bit to reactivate the corresponding driver. (All switches
have a corresponding overcurrent recovery bit) If this bit is set, the device automatically
switches-on the outputs again after a short recovery time. With this feature the device can
drive loads with start-up currents higher than the overcurrent limits (that is inrush current of
incandescent lamps, cold resistance of motors and heaters, Figure 7).
Time
GND
Source Clamp
Voltage
(V
SRC_CL1-3)
= -19V)
High Side Configuration
Output Current
V
S
Time
Source Voltage
Doc ID 16523 Rev 113/55
DescriptionL99MC6
2.4.1 Direct input IN/PWM
The IN/PWM input allows channel 2 to be enabled without the use of SPI. The IN/PWM pin
is OR-ed with the SPI command bit. This pin can be left open if the channel 2 is controlled
only via the SPI. This input has an internal pull-down.
The IN/PWM signal can also be applied to any other switches by the activation of the PWM
mode.
This input is suited for non-inductive loads that are pulse width modulated. This allows PWM
control without further use of the SPI.
2.4.2 Temperature warning and thermal shutdown
If the junction temperature rises above T
detectable via the SPI. If the junction temperature increases above the second threshold
T
, the thermal shutdown bit is set and power DMOS transistors of all output stages are
jSD
switched-off to protect the device. Temperature warning flag and thermal shutdown bits are
latched. In order to reactivate the output stages, the junction temperature must decrease
below T
jSD-TjSDHYS
and the thermal shutdown bit has to be cleared by the
microcontroller.
2.4.3 Open-load detection in off-state
The open-load detection monitors the load at each output stage in off mode. A current
source of 150 µA (I
OLD1-6
, I
OLS 1-3
) is connected between drain and source or GND. An
open-load failure is detected if the drain or source voltage reaches an internal V
for at least 3 ms (t
). The corresponding open-load bit is set in the status register. In
dOL typ.
LED mode the open-load detection is disabled and the current source is switched-off, which
avoids a turn-on of the LEDs in off-state.
2.4.4 Overload detection
In case of an overcurrent condition, a flag is set in the corresponding status register. If the
overcurrent signal is valid for at least t
corresponding driver is switched-off to reduce the power dissipation and to protect the
integrated circuit. If the overcurrent recovery bit of the output is zero the microcontroller has
to clear the status bit to reactivate the corresponding driver.
ISC
a temperature warning flag is set and is
j TW
OLD/S
= 32 µs, the overcurrent flag is set and the
(2.0 V)
2.5 Bridge mode
The L99MC6 can be configured as bridge driver. Up to three half bridges can be used. In
Bridge mode the device is crosscurrent protected by an internal delay time. If one driver (LS
or HS) is turned-off the activation of the other driver of the same half bridge is automatically
delayed by the crosscurrent protection time. After the crosscurrent protection time is expired
the slew rate limited switch-off phase of the driver is changed to a fast turn-off phase and the
opposite driver is turned-on with slew-rate limitation. Due to this behavior it is always
guaranteed that the previously activated driver is totally turned-off before the opposite driver
starts to conduct.
Due to the built-in reverse diodes of the output transistors, inductive loads can be driven at
the outputs without external free-wheeling diodes.
14/55Doc ID 16523 Rev 1
L99MC6Description
The following combination must be used: channel 1 + 4, channel 2 + 5, channel 3 + 6
(Figure 6).
A V
voltage exceeding the low-side clamping voltage (V
S
DRN_CL1-6
) , while the high one of
the high-side drivers is turned on, may cause a destruction of the device.
Caution:In bridge mode using channels 2 and 5, the IN/PWM pin has to be grounded. Therefore
PWM mode on other channels is not possible.
Figure 6.Example of bridge configuration
V
5V
DD
Out1
VS12V
IN/PWM
GND
SCK
CSN
DO
DI
SPI
GND
=1
Control
Out2
M
Out3
M
Out4
Out5
Out6
2.6 LED mode
Open-load detection in off-state can be deactivated to avoid the turn on of the LEDs by the
current source (150 µA typ.) when the channel is switched-off.
Moreover, it is possible to select a high slew rate to support PWM operations with small duty
cycle (see Section 9.3.1: Channel configuration decoding).
Doc ID 16523 Rev 115/55
DescriptionL99MC6
2.7 Bulb mode (programmable soft start function to drive loads
with higher inrush current)
Loads with start-up currents higher than the overcurrent limits (for example inrush current of
lamps, start current of motors and cold resistance of heaters) can be driven by using the
programmable soft start function (that is overcurrent recovery mode). Each driver has a
corresponding overcurrent recovery bit. If this bit is set, the device automatically switches-on
the outputs again after a fixed recovery time. The PWM modulated current provides
sufficient average current to power up the load (for example heat up the bulb) until the load
reaches operating condition (Figure 6).
The device itself cannot distinguish between a real overload and a non linear load like a light
bulb. A real overload condition can only be qualified by time. As an example the
microcontroller can switch-on light bulbs by setting the overcurrent recovery bit for the first
50 ms. After clearing the recovery bit, the output is automatically disabled if the overload
condition still exits.
Figure 7.Example of programmable soft start function for inductive loads and incandescent
Load Current
bulbs
Unlimited Inrush Current
Load Current
Unlimited Inrush Current
Limited Inrush Current in
overcurrent recovery
mode with inductive load
t
Limited Inrush Current in
overcurrent recovery mode
with incandescent bulb
t
16/55Doc ID 16523 Rev 1
L99MC6Absolute maximum ratings
3 Absolute maximum ratings
Stressing the device above the rating listed in Ta bl e 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics™ SURE program and other relevant quality
document.
Table 3.Absolute maximum ratings
SymbolParameterValueUnit
DC supply voltage-0.3 to 28V
VS (DRN1 HS
config)
V
CC
DI, DO, SCK,
CSN, IN
Single pulse t
configuration with R
Single pulse t
Stabilized supply voltage, logic supply-0.3 to 5.5V
Digital input/output voltage-0.3 to VCC + 0.3V
< 400 ms in HS or LS
max
< 400 ms in bridge mode V
max
load min
= 40 Ω
(1)
40V
DRN_CL1-6
V
DRN 1-6Output current capability±1,65A
SRC 1-3Output current capability±1,65A
GNDCurrent capability3,30A
T
j
1. The device requires a minimum load impedance of 40 Ω to sustain a load dump pulse of 40 V according to
the ISO 7637 pulse 5b.
Operating junction temperature-40 to 150°C
All maximum ratings are absolute ratings. Leaving the limitation of any of these values may
cause an irreversible damage of the integrated circuit.
Doc ID 16523 Rev 117/55
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