outputs, intended for driving dc motors in automotive systems. The basic function of the device is
shown in the Table 1.
Table 1. Table function.
StatusENIN1IN2OUT1OUT2DIAGNOTE
1LXXTristateTristateOFFStandby Mode
2HHHSRCSRCOFFRecommended for braking
3HHLSRCSNKOFF
4HLHSNKSRCOFF
5HLLSNKSNKOFF
6HXXTristateTristateONOvervoltage or Overtemperature
3/9
L9997ND
The device is activated with enable input voltage
HIGH. For enable input floating (not connected)
or LOW the device is in Standby Mode. Very low
quiescent current is defined for V
< 0.3V. When
EN
activating or disactivating the device by the enable input a wake-up time of 50µs is recommended.
For braking of the motor the status 2 is recommended. The reason for this recommendation is
that the device features higher threshold for initialisation of parasitic structures than in state 5.
The inputs IN1, IN2 features internal s ink current
generators of 10µA, disabled in standby mode.
With these input current generators the input level
is forced to LOW for inputs open. In this condition
the outputs are in SNK state.
The circuit features an over voltage disable function referred to the supply voltage V
. This func-
VS
tion assures disabling the power outputs, when
the supply voltage exceeds the over voltage
threshold value of 19V typ. Both outputs are
forced to tristate in this condition and the diagnostic output is ON.
The thermal shut-down disables the outputs (tristate) and activates the diagnostic when the junction temperature increases above the thermal
shut-down threshold temperature of min. 150°C.
For the start of a heavy loaded motor, if t he m otor
current reaches the max. value, it is necessary to
respect the dynamical thermal resistance junction
to ambient. The outputs OUT1 and OUT2 are protected against short circuit to GND or V
, for sup-
S
ply voltages up to the overvoltage disable threshold.
The output power DMOS transistors works in linear mode for an output current less than 1.2A. Increasing the output load current ( > 1.2A) the out-
put transistor changes in the current regulation
mode, see Fig.6, with the typical output current
value below 2A. The SRC output power DMOS
transistors requires a voltage drop ~3V to activate
the current regulation. Below this voltage drop is
the device also protected. The output current heat
up the power DMOS transistor, the R
DSON
increases with the junction temperature and decreases the output current. The power dissipation
in this condition can activate the thermal shutdown . In the case of output disable due to thermal overload the output remains disabled untill
the junction temperature decreases under the
thermal enable threshold.
Permanent short circuit condition with power dissipation leading to chip overheating and activation
of the thermal shut- down leads to t he thermal oscillation. The junction temperature difference between the switch ON and OFF points is the thermal hysteresis of the thermal protection. This
hysteresis together with the thermal impedance
and ambient temperature determines the frequency of this thermal oscillation, its typical values are in the range of 10kHz.
The open drain diagnostic output needs an external pull-up resistor to a 5V supply. In systems
with several L9997ND the diagnostic outputs can
be connected together with a common pull-up resistor. The DIAG output current is internally limited.
Fig. 1 shows a typical application diagram for the
DC motor driving. To assure the safety of the circuit in the reverse battery condition a reverse protection diode D
is necessary. The transient pro-
1
tection diode D2 must assure that the maximal
supply voltage V
line will be limited to a value lower than the
V
BAT
during the transients at the
VS
absolute maximum rating for VVS.
Figure 1:
5V
4/9
Application Circuit Diagram.
CONTROL
LOGIC
Ω
47K
IDIAG1
IIN1
IIN2
IEN
DIAG1
IN1
IN2
EN
S
V
L9997ND
GND
I
s
S
C
OUT1
IOUT1
OUT2
IOUT2
1
D
V
BAT
2
D
IM
VM
M
GND
Figure 2. Timing Diagram.
L9997ND
Standby ModeOperating ModeOvertemperature
EN
IN1
IN2
DIAG
OUT1
OUT2
Tristate
Tristate
t
10%
dLH
90%
t
r
t
dHL
t
t
ONHL
t
ONLH
90%
50%
10%
t
rf
t
dHL
t
f
t
dLH
or Overvoltage
t
dLH
Tristate
t
dHL
Tristate
t
t
dHL
dLH
Standby Mode
t
OFFLH
Tristate
t
OFFHL
Tristate
Figure 3. Typical RON - Characteristics of Source and Sink Stage
5/9
L9997ND
Figure 4. Quiescent current in standby mode versus supply voltage.
Figure 5. ON-Resistance versus supply voltage.
6/9
L9997ND
Figure 6. I
versus V
OUT
(pulsed measurement with TON = 500µs, T
OUT
= 500ms).
OFF
Figure 7. Test circuit.
12V
V
EN
V
IN1
100µF
V
IN2
200nF
EN
IN1
IN2
VS
L9997ND
GND
DIAG
OUT1
OUT2
10k
15
15
Ω
Ω
Ω
5V
7/9
L9997ND
8/9
L9997ND
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