ST L9951, L9951XP User Manual
L9951
L9951XP
Rear door actuator driver
Features
Type Ou tputs
(1)
OUT1
L9951
L9951XP
OUT2
OUT3
OUT4
OUT5
1. See block diagram.
2. Typical values.
■ One half bridge for 7.4 A load (R
■ Two half bridges for 5 A load (R
■ Two highside drivers for 1.25 A load
(R
=800 mΩ)
on
■ Programmable softstart function to drive loads
with higher inrush currents (i.e.current > 7.4A,
>5A, >1.25A)
■ Very low current consumption in standby mode
(I
< 3µA, typ. Tj ≤ 85°C)
S
■ All outputs short circuit protected
■ Current monitor output for all highside drivers
■ All outputs over temperature protected
■ Open-load diagnostic for all outputs
■ Overload diagnostic for all outputs
■ Programmable PWM control of all outputs
■ Charge pump output for reverse polarity
protection
Table 1. Device summary
(2)
R
on
150 mΩ
200 mΩ
200 mΩ
800 mΩ
800 mΩ
I
OUT
7.4 A
5A
5A
1.25 A
1.25 A
= 150 mΩ)
on
= 200 mΩ)
on
V
S
28 V
PowerSO-36
PowerSSO-36
Applications
■ Rear door actuator driver with bridges for door
lock and safe lock and two 5W or 10W - light
bulbs.
Description
The L9951 and L9951XP are microcontroller
driven, multifunctional rear door actuator drivers
for automotive applications. Up to two DC motors
and two grounded resistive loads can be driven
with three half bridges and two hide side drivers.
The integrated standard serial peripheral interface
(SPI) controls all operation modes (forward,
reverse, brake and high impedance). All
diagnostic information is available via the SPI.
Order codes
Package
Tube Tape and reel
PowerSO-36 L9951 L9951TR
PowerSSO-36 L9951XP L9951XPTR
May 2010 Doc ID 14173 Rev 8 1/36
www.st.com
1
Contents L9951 / L9951XP
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Temperature warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . 10
2.5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.6 SPI - electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1 Dual power supply: VS and VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.2 Standby - mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3 Inductive loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4 Diagnostic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.5 Over-voltage and under-voltage detection . . . . . . . . . . . . . . . . . . . . . . . . 20
3.6 Temperature warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . 20
3.7 Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.8 Over load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.9 Current monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.10 PWM input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.11 Cross-current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.12 Programmable softstart function to drive loads with higher inrush current 21
4 Functional description of the SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.1 Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.2 Chip Select Not (CSN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.3 Serial Data In (DI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.4 Serial Data Out (DO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.5 Serial clock (CLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.6 Input data register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.7 Status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/36 Doc ID 14173 Rev 8
L9951 / L9951XP Contents
4.8 Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5 Packages thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.2 PowerSO-36™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.3 PowerSSO-36™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.4 PowerSO-36™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
6.5 PowerSSO-36™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Doc ID 14173 Rev 8 3/36
List of tables L9951 / L9951XP
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 4. ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Temperature warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 7. Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Overvoltage and undervoltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Current monitor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Charge pump output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 11. OUT 1 - OUT 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 12. Delay time from standby to active mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 13. Inputs: CSN, CLK, PWM1/2 and DI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 14. DI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 15. DO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 16. DO timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 17. EN, CSN timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 18. Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 19. SPI - Input data and status register 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 20. SPI - Input data and status register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 21. PowerSO-36™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 22. PowerSSO-36™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 23. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
4/36 Doc ID 14173 Rev 8
L9951 / L9951XP List of figures
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3. SPI - transfer timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 4. SPI - input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 5. SPI - DO valid data delay time and valid time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 6. SPI - DO enable and disable time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 7. SPI - driver turn-on/off timing, minimum CSN HI time . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 8. SPI - timing of status bit 0 (fault condition) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 9. Example of programmable softstart function for inductive loads . . . . . . . . . . . . . . . . . . . . 21
Figure 10. Packages thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 11. PowerSO-36™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 12. PowerSSO-36™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 13. PowerSO-36
Figure 14. PowerSO-36
Figure 15. PowerSSO-36
Figure 16. PowerSSO-36
TM
tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
TM
tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
TM
tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
TM
tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Doc ID 14173 Rev 8 5/36
Block diagram and pin description L9951 / L9951XP
1 Block diagram and pin description
Figure 1. Block diagram
V
* Note: Value of capacitor has to be choosen carefully to limit the VS
voltage below absolute maximum ratings in case of an unexpected
freewheeling condition of inductive loads (e.g. TSD, POR)
Reverse
Polarity
Protection
100k
BAT
VREG
VCC
µC
*
100µF
100nF
EMC
Optimization
100 10
100nF
**
1k
**
1k
**
1k
**
1k
**
1k
CM / PWM
**
1k
VS
Charge
DO
Pump
VCC
DI
+
CLK
CSN
EN
10k
CP
OUT1
OUT2
Lock
M
Safe Lock
OUT3
SPI
Interface
OUT4
OUT5
M
Exterior Light
Driver Interface & Diagnostic
Safety Light
MUX
GND
5
** Note: Resistors between µC and L9951 are recommended to limit currents
for negative voltage transients at VBAT (e.g. ISO type 1 pulse)
+ Note: Using a ferrite instead of 10ohm will additionally improve EMC behavior
6/36 Doc ID 14173 Rev 8
L9951 / L9951XP Block diagram and pin description
Table 2. Pin definitions and functions
Pin Symbol Function
Ground .
1, 18, 19,
36
GND
6, 7, 14,
15, 23, 24,
VS
29, 32
3, 4, 34 OUT1
8DI
9CM/PWM
Reference potential.
Note: For the capability of driving the full current at the outputs all pins of
GND must be externally connected.
Power supply voltage (external reverse protection required).
For EMI reason a ceramic capacitor as close as possible to GND is
recommended.
Note: for the capability of driving the full current at the outputs all pins of
VS must be externally connected.
Half-bridge output 1.
The output is built by a high side and a low side switch, which are
internally connected. The output stage of both switches is a power
DMOS transistor. Each driver has an internal reverse diode (bulk-draindiode: high side driver from output to VS, low side driver from GND to
output). This output is over-current and open-load protected.
Note: for the capability of driving the full current at the outputs all pins of
OUT1 must be externally connected.
Serial data input.
The input requires CMOS logic levels and receives serial data from the
microcontroller. The data is a 16bit control word and the least significant
bit (LSB, bit 0) is transferred first.
Current monitor output/PWM input.
Depending on the selected multiplexer bits (bit 9, 10, 11) of Input Data
Register this output sources an image of the instant current through the
corresponding high side driver with a ratio of 1/10.000. This pin is
bidirectional. The microcontroller can overwrite the current monitor signal
to provide a PWM input for all outputs.
Testmode:
If CSN is raised above 7.5V the device will enter the test mode. In test
mode this output can be used to measure some internal signals (see
Ta bl e 1 8 ).
Chip select not input / Testmode .
This input is low active and requires CMOS logic levels. The serial data
10 CSN
transfer between L9951 and micro controller is enabled by pulling the
input CSN to low level. If an input voltage of more than 7.5V is applied to
CSN pin the L9951 will be switched into a test mode.
Serial data output .
11 DO
The diagnosis data is available via the SPI and this tristate-output. The
output will remain in tristate, if the chip is not selected by the input CSN
(CSN = high).
Logic supply voltage .
12
VCC
For this input a ceramic capacitor as close as possible to GND is
recommended.
Serial clock input .
13
CLK
This input controls the internal shift register of the SPI and requires
CMOS logic levels.
Doc ID 14173 Rev 8 7/36
Block diagram and pin description L9951 / L9951XP
Table 2. Pin definitions and functions (continued)
Pin Symbol Function
Half-bridge output 2 (see OUT1 - pin 3, 4).
16, 17
20, 21 OUT3
26
27
33, 35 OUT4, OUT5
OUT2
CP
EN
Note: for the capability of driving the full current at the outputs all pins of
OUT2 must be externally connected.
Half-bridge output 3 (see OUT1 - pin 3, 4).
Note: for the capability of driving the full current at the outputs all pins of
OUT3 must be externally connected.
Charge Pump Output .
This output is provided to drive the gate of an external n-channel power
MOS used for reverse polarity protection (see Figure 1).
Enable input.
If Enable input is forced to GND the device will enter Standby-Mode. The
outputs will be switched off and all registers will be cleared
High side driver output 4, 5 .
The output is built by a high side switch and is intended for resistive
loads, hence the internal reverse diode from GND to the output is
missing. For ESD reason a diode to GND is present but the energy which
can be dissipated is limited. The high side driver is a power DMOS
transistor with an internal reverse diode from the output to VS (bulkdrain-diode). The output is over-current and open-load protected.
Figure 2. Configuration diagram (top view)
1
1
1
1
GND
GND
GND
GND
N.C.
N.C.
N.C.
N.C.
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
N.C.
N.C.
N.C.
N.C.
VS
VS
VS
VS
VS
VS
VS
VS
DI
DI
DI
DI
CM/PWM
CM/PWM
CM/PWM
CM/PWM
CSN
CSN
CSN
CSN
DO
DO
DO
DO
VCC
VCC
VCC
VCC
CLK
CLK
CLK
CLK
VS
VS
VS
VS
VS
VS
VS
VS
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
GND
GND
GND
GND
1
2
2
2
2
2
3
3
3
3
3
4
4
4
4
4
5
5
5
5
5
6
6
6
6
6
7
7
7
7
7
8
8
8
8
8
9
9
9
9
9
10
10
10
10
10
11
11
11
11
11
12
12
12
12
12
13
13
13
13
13
14
14
14
14
14
15
15
15
15
15
16
16
16
16
16
17
17
17
17
17
18
18
18
18
18
Chip
Chip
Chip
Chip
Leadframe
Leadframe
Leadframe
Leadframe
36
36
36
36
36
35
35
35
35
35
34
34
34
34
34
33
33
33
33
33
32
32
32
32
32
31
31
31
31
31
30
30
30
30
30
29
29
29
29
29
28
28
28
28
28
27
27
27
27
27
26
26
26
26
26
25
25
25
25
24
24
24
24
23
23
23
23
22
22
22
22
21
21
21
21
20
20
20
20
19
19
19
19
GND
GND
GND
GND
OUT5
OUT5
OUT5
OUT5
OUT1
OUT1
OUT1
OUT1
OUT4
OUT4
OUT4
OUT4
VS
VS
VS
VS
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
VS
VS
VS
VS
N.C.
N.C.
N.C.
N.C.
EN
EN
EN
EN
CP
CP
CP
CP
N.C.
N.C.
N.C.
N.C.
VS
VS
VS
VS
VS
VS
VS
VS
N.C.
N.C.
N.C.
N.C.
OUT3
OUT3
OUT3
OUT3
OUT3
OUT3
OUT3
OUT3
GND
GND
GND
GND
.
.
.
.
8/36 Doc ID 14173 Rev 8
L9951 / L9951XP Electrical specifications
2 Electrical specifications
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics sure
program and other relevant quality document
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
S
V
CC
V
DI,VDO,VCLK,VCSN,VEN
V
CM
V
CP
I
OUT1,2,3
I
OUT4,5
2.2 ESD protection
Table 4. ESD protection
Output pins: OUT1 - OUT5 ± 8
1. HBM according to CDF-AEC-Q100-002.
2. HBM with all unzapped pins grounded.
DC supply voltage -0.3 to 28 V
Single pulse t
< 400ms 40 V
max
Stabilized supply voltage, logic supply -0.3 to 5.5 V
Digital input / output voltage -0.3 to V
+ 0.3 V
CC
Current monitor output -0.3 to VCC + 0.3 V
Charge pump output -25 to VS + 11 V
Output current ±10 A
Output current ±5 A
Parameter Value Unit
All pins ± 4
(1)
(2)
kV
kV
2.3 Thermal data
Table 5. Thermal data
Symbol Parameter Value Unit
T
j
Operating junction temperature -40 to 150 °C
Doc ID 14173 Rev 8 9/36
Electrical specifications L9951 / L9951XP
2.4 Temperature warning and thermal shutdown
Table 6. Temperature warning and thermal shutdown
Symbol Parameter Min. Typ. Max. Unit
T
jTW ON
T
jTW OFF
T
jTW HYS
T
jSD ON
T
jSD OFF
T
jSD HYS
Temperature warning threshold junction
temperature
Temperature warning threshold junction
temperature
Temperature warning hysteresis 5 °K
Thermal shutdown threshold junction
temperature
Thermal shutdown threshold junction
temperature
Thermal shutdown hysteresis 5 °K
2.5 Electrical characteristics
VS = 8 to 16 V, VCC = 4.5 to 5.3 V, Tj = - 40 to 150 °C, unless otherwise specified.
The voltages are referred to GND and currents are assumed positive, when the current
flows into the pin.
Table 7. S u pply
Symbol Parameter Test condition Min. Typ. Max. Unit
V
Operating supply voltage
S
range
VS DC supply current
I
S
quiescent supply current
V
S
Tj
increasing
Tj
decreasing
130 °C
Tj
increasing
Tj
decreasing
150 °C
728V
V
= 13V, VCC = 5.0V
S
active mode
720mA
OUT1 - OUT5 floating
= 13V, VCC = 0V
V
S
standby mode
OUT1 - OUT5 floating
=-40°C, 25°C
T
test
T
= 130°C 6 20 µA
test
310µA
150 °C
170 °C
10/36 Doc ID 14173 Rev 8
L9951 / L9951XP Electrical specifications
Table 7. Supply (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
V
= 13V, VCC = 5.0V
S
V
DC supply current
CC
CSN = V
CC
active mode
I
CC
VCC quiescent supply
current
= 13V, VCC = 5.0V
V
S
CSN = V
CC
standby mode
OUT1 - OUT5 floating
VS = 13V, VCC = 5.0V
IS + I
Sum quiescent supply
CC
current
CSN = V
CC
standby mode
OUT1 - OUT5 floating
Table 8. Overvoltage and undervoltage detection
Symbol Parameter Test condition Min. Typ. Max. Unit
13mA
13µA
723µA
V
SUV ON
V
SUV OFF
V
SUV hyst
V
SOV OFF
V
SOV ON
V
SOV hyst
V
POR OFF
V
POR ON
V
POR hyst
Table 9. Current monitor output
VS UV-threshold voltage VS increasing 6.0 7.2 V
VS UV-threshold voltage VS decreasing 5.4 6.5 V
VS UV-hysteresis V
SUV ON
- V
SUV OFF
0.55 V
VS OV-threshold voltage VS increasing 18 24.5 V
VS OV-threshold voltage VS decreasing 17.5 V
VS OV-hysteresis V
SOV OFF
- V
SOV ON
0.5 V
Power-on-reset threshold VCC increasing 4.4 V
Power-on-reset threshold VCC decreasing 3.1 V
Power-on-reset hysteresis V
POR OFF
- V
POR ON
0.3 V
Symbol Parameter Test condition Min. Typ. Max. Unit
V
Functional voltage range VCC = 5V 0 4 V
CM
Current monitor output
I
CM,r
ratio:
I
CM/IOUT1,2,3,4,5
0V ≤ V
≤ 4V, VCC=5V
CM
1:10000
-
0V ≤ VCM≤ 4V,
=5V,
V
CC
I
OUT1-5,low
I
CM acc
Current monitor accuracy
I
OUT1,high
I
OUT2,3,high
I
OUT4,5,high
=500mA
=6A
=4.9A
=1.2A
4% +
1%FS
8% +
2%FS
-
(FS=full scale=600 μA)
Doc ID 14173 Rev 8 11/36