ST L9950, L9950XP User Manual

L9950

L9950XP

Door actuator driver

Features

■One full bridge for 6A load (Ron=150 mΩ )

■Two half bridges for 3A load (Ron=300 mΩ )

■Two half bridges for 1.5A load (Ron=800 mΩ )

■One highside driver for 6A load (Ron=100 mΩ )

■Four highside drivers for 1.5 A load (Ron=800 mΩ )

■Programmable softstart function to drive loads with higher inrush currents (i.e. current

>6 A,>3 A,>1.5 A)

■Very low current consumption in standby mode (IS < 6 μA typ; ICC <25 μA typ; Tj ≤ 85 °C)

■All outputs short circuit protected

■Current monitor output for 300 mΩ, 150 mΩ and 100 m highside drivers

■All outputs over temperature protected

■Open load diagnostic for all outputs

■Overload diagnostic for all outputs

■Seperated half bridges for door lock motor

■PWM control of all outputs

■Charge pump output for reverse polarity protection

PowerSO-36 PowerSSO-36

Applications

■Door actuator driver with bridges for door lock and safe lock, mirror axis control, mirror fold and highside driver for mirror defroster and four 10W-light bulbs.

Description

The L9950 and L9950XP are microcontroller driven multifunctional door actuator driver for automotive applications.Up to five DC motors and five grounded resistive loads can be driven with six half bridges and five highside drivers. The integrated standard serial peripheral interface (SPI) controls all operation modes (forward, reverse, brake and high impedance). All diagnostic informations are available via SPI.

Table 1.	Device summary
	Package		Order codes
		Part number (tube)		Part number (tape and reel)
	PowerSO-36	L9950		L9950TR
	PowerSSO-36	L9950XP		L9950XPTR

June 2009

Doc ID 10311 Rev 10

1/39

www.st.com

Contents	L9950 - L9950XP

Contents

1	Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 6
2	Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 9
	2.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	2.2	ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	2.3	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	2.4	Temperature warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . .	10
	2.5	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	10
	2.6	SPI - electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	14
3	Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		20
	3.1	Dual power supply: VS and VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
	3.2	Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
	3.3	Inductive loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
	3.4	Diagnostic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
	3.5	Overvoltage and under voltage detection . . . . . . . . . . . . . . . . . . . . . . . . .	21
	3.6	Temperature warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . .	21
	3.7	Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
	3.8	Over load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
	3.9	Current monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22
	3.10	PWM inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22
	3.11	Cross current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22

3.12Programmable soft start function to drive loads with higher inrush current .

			22
4	Functional description of the SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		24
	4.1	Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	4.2	Chip Select Not (CSN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	4.3	Serial Data In (DI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	4.4	Serial Data Out (DO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25
	4.5	Serial clock (CLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25
	4.6	Input data register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25

2/39	Doc ID 10311 Rev 10

L9950 - L9950XP	Contents

4.7 Status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.8 Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5	Packages thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		31
6	Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		32
	6.1	ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	32
	6.2	PowerSO-36 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	32
	6.3	PowerSSO-36 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	34
	6.4	PowerSO-36 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	35
	6.5	PowerSSO-36 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	37
7	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		38

Doc ID 10311 Rev 10

3/39

List of tables	L9950 - L9950XP

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4. ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 6. Temperature warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 7. Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 8. Overvoltage and under voltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 9. Current monitor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 10. Charge pump output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 11. OUT1 - OUT11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Table 12. Delay time from standby to active mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 13. Inputs: CSN, CLK, PWM1/2 and DI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 14. DI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 15. DO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 16. DO timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 17. CSN timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 18. Test mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 19. SPI - input data and status registers 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 20. SPI - input data and status registers 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 21. PowerSO-36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 22. PowerSSO-36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 23. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

4/39	Doc ID 10311 Rev 10

L9950 - L9950XP	List of figures

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 3. SPI - transfer timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 4. SPI - input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 5. SPI - DO valid data delay time and valid time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 6. SPI - DO enable and disable time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 7. SPI - driver turn-on/off timing, minimum csn hi time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 8. SPI - timing of status bit 0 (fault condition) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 9. Example of programmable soft start function for inductive loads . . . . . . . . . . . . . . . . . . . . 23 Figure 10. Packages thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 11. PowerSO-36 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 12. PowerSSO-36 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 13. PowerSO-36 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 14. PowerSO-36 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 15. PowerSSO-36 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 16. PowerSSO-36 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Doc ID 10311 Rev 10

5/39

Block diagram and pin description	L9950 - L9950XP

1 Block diagram and pin description

Figure 1.	Block diagram
					Reverse		VBAT
* Note: Value of capacitor has to be choosen carefully to limit the VS					Polarity
voltage below absolute maximum ratings in case of an unexpected					Protection		100k
freewheeling condition of inductive loads (e.g. TSD, POR)
		*				10k
					VS	CP
VREG		100µF						xy-Mirror
		100nF					OUT1	Motors
		EMC		Charge			OUT2	M
		Optimization			Pump
	VCC		+10				OUT3
		100		VCC				M
		100nF				Diagnostic	OUT4	Safe Lock
							OUT6
								M
							OUT5	Lock
		** 1k	DI		SPI Interface	Interface&		M
		** 1k	DO					Folder
		** 1k	CLK				OUT7	M
			CSN
		** 1k						Exterior Light
		**1k				Driver	OUT8	Footstep Light
			PWM1				OUT9
	µC							Safety Light
							OUT10
								Turn Indicator
							OUT11	Defroster
		**1kCM / PWM2			MUX		5
						GND ** Note: Resistors between µC and L9950 are recommended to limit currents
							for negative voltage transients at VBAT (e.g. ISO type 1 pulse)
							+ Note: Using a ferrite instead of 10ohm will additionally improve EMC behavior

	Table 2.	Pin definitions and functions
	Pin		Symbol	Function
				Ground.
	1, 18, 19, 36		GND	Reference potential.
				Important: for the capability of driving the full current at the outputs all
				pins of GND must be externally connected.
				Highside driver output 11.
				The output is built by a highside switch and is intended for resistive
				loads, hence the internal reverse diode from GND to the output is
				missing. For ESD reason a diode to GND is present but the energy
	2, 35		OUT11	which can be dissipated is limited. The highside driver is a power
				DMOS transistor with an internal parasitic reverse diode from the
				output to VS (bulk-drain-diode). The output is over-current and open
				load protected.
				Important: for the capability of driving the full current at the outputs both
				pins of OUT11 must be externally connected.

6/39	Doc ID 10311 Rev 10

L9950 - L9950XP				Block diagram and pin description
	Table 2.	Pin definitions and functions (continued)
	Pin		Symbol	Function
				Hal bridge output 1,2,3.
	3		OUT1	The output is built by a highside and a lowside switch, which are
				internally connected. The output stage of both switches is a power
	4		OUT2
				DMOS transistor. Each driver has an internal parasitic reverse diode
	5		OUT3
				(bulk-drain-diode: highside driver from output to VS, lowside driver from
				GND to output). This output is over-current and open load protected.
				Power supply voltage (external reverse protection required.
	6, 7, 14, 15,			For this input a ceramic capacitor as close as possible to GND is
	23, 24, 25, 28,		VS	recommended.
	29, 32			Important: for the capability of driving the full current at the outputs all
				pins of VS must be externally connected.
				Serial data input.
	8		DI	The input requires CMOS logic levels and receives serial data from the
				microcontroller. The data is an 24bit control word and the least
				significant bit (LSB, bit 0) is transferred first.
				Current monitor output/PWM2 input.
				Depending on the selected multiplexer bits of Input Data Register this
	9		CM/PWM2	output sources an image of the instant current through the
				corresponding highside driver with a ratio of 1/10.000. This pin is
				bidirectional. The microcontroller can overdrive the current monitor
				signal to provide a second PWM input for the outputs OUT9 and
				OUT10.
				Chip select not input/test mode.
	10		CSN	This input is low active and requires CMOS logic levels. The serial data
				transfer between L9950 and micro controller is enabled by pulling the
				input CSN to low level. If an input voltage of more than 7.5V is applied
				to CSN pin the L9950 will be switched into a test mode.
				Serial data output.
	11		DO	The diagnosis data is available via the SPI and this tristate output. The
				output will remain in tristate, if the chip is not selected by the input CSN
				(CSN = high).
				Logic supply voltage.
	12		VCC	For this input a ceramic capacitor as close as possible to GND is
				recommended.
				Serial clock input.
	13		CLK	This input controls the internal shift register of the SPI and requires
				CMOS logic levels.
	16,17, 20,21,		OUT4	Half bridge output 4,5,6: see OUT1 (pin 3).
			OUT5	Important: for the capability of driving the full current at the outputs both
	22
			OUT6	pins of OUT4 (OUT5, respectively) must be externally connected.
				Charge pump output.
	26		CP	This output is provided to drive the gate of an external n-channel power
				MOS used for reverse polarity protection

Doc ID 10311 Rev 10

7/39

Block diagram and pin description				L9950 - L9950XP
	Table 2.	Pin definitions and functions (continued)
	Pin		Symbol	Function
				PWM1 input.
	27		PWM1	This input signal can be used to control the drivers OUT1-OUT8 and
				OUT11 by an external PWM signal.
				Highside driver output 7,8,9,10.
	30		OUT7,	The output is built by a highside switch and is intended for resistive
				loads, hence the internal reverse diode from GND to the output is
	31
			OUT8,	missing. For ESD reason a diode to GND is present but the energy
	33		OUT9,	which can be dissipated is limited. The highside driver is a power
	34		OUT10	DMOS transistor with an internal parasitic reverse diode from the
				output to VS (bulk-drain-diode). The output is over-current and open
				load protected.

Figure 2. Configuration diagram (top view)

	GND	1		36	GND
	OUT11	2	Power SO36	35	OUT11
	OUT1	3		34	OUT10
	OUT2	4		33	OUT9
	OUT3	5		32	VS
	VS	6		31	OUT8
	VS	7		30	OUT7
	DI	8	Chip	29	VS
	CM/PWM2	9		28	VS
	CSN	10		27	PWM1
	DO	11		26	CP
	VCC	12		25	VS
	CLK	13		24	VS
	VS	14		23	VS
	VS	15		22	OUT6
	OUT4	16	Leadframe	21	OUT5
	OUT4	17		20	OUT5
	GND	18		19	GND

8/39	Doc ID 10311 Rev 10

L9950 - L9950XP	Electrical specifications

2 Electrical specifications

2.1Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document.

	Table 3.	Absolute maximum ratings
		Symbol	Parameter	Value	Unit
		VS	DC supply voltage	-0.3 to 28	V
			Single pulse tmax < 400 ms	40	V
		VCC	Stabilized supply voltage, logic supply	-0.3 to 5.5	V
	VDI, VDO, VCLK,		Digital input/output voltage	-0.3 to VCC + 0.3	V
	VCSN, Vpwm1
		VCM	Current monitor output	-0.3 to VCC + 0.3	V
		VCP	Charge pump output	-25 to VS + 11	V
	IOUT1,2,3,6,7,8,9,10		Output current	±5	A
	IOUT4,5,11		Output current	±10	A

2.2ESD protection

Table 4.	ESD protection
	Parameter	Value	Unit
	All pins	±4 (1)	kV
	Output pins: OUT1 - OUT11	±8 (2)	kV

1.HBM according to CDF-AEC-Q100-002.

2.HBM with all unzapped pins grounded.

2.3Thermal data

Table 5.	Thermal data
Symbol	Parameter	Value	Unit
Tj	Operating junction temperature	-40 to 150	°C

Doc ID 10311 Rev 10

9/39

Electrical specifications	L9950 - L9950XP

2.4Temperature warning and thermal shutdown

Table 6.	Temperature warning and thermal shutdown
Symbol	Parameter		Min.	Typ.	Max.	Unit
TjTW ON	Temperature warning threshold junction	Tj	-	-	150	°C
	temperature	increasing
TjTW OFF	Temperature warning threshold junction	Tj	130	-	-	°C
	temperature	decreasing
TjTW HYS	Temperature warning hysteresis		-	5	-	°K
TjSD ON	Thermal shutdown threshold junction	Tj	-	-	170	°C
	temperature	increasing
TjSD OFF	Thermal shutdown threshold junction	Tj	150	-	-	°C
	temperature	decreasing
TjSD HYS	Thermal shutdown hysteresis		-	5	-	°K

2.5Electrical characteristics

VS = 8 to 16 V, VCC = 4.5 to 5.3 V, Tj = - 40 to 150 °C, unless otherwise specified.

The voltages are referred to GND and currents are assumed positive, when the current flows into the pin.

Table 7.	Supply
Symbol	Parameter			Test condition		Min.	Typ.	Max.	Unit
VS	Operating supply voltage					7	-	28	V
	range
		VS = 16 V, VCC = 5.3 V
	VS DC supply current	active mode				-	7	20	mA
		OUT1 - OUT11 floating
IS
		V	S	= 16 V, V	= 0 V
				CC
	VS quiescent supply current	standby mode				-	4	12	µA
		OUT1 - OUT11 floating
		Ttest =-40 °C, 25 °C
	VCC DC supply current	VS = 16 V, VCC			= 5.3 V	-	1	3	mA
		CSN = VCC , active mode
ICC		VS = 16 V, VCC = 5.3 V
	VCC quiescent supply	CSN = VCCstandby mode
						-	25	50	µA
	current	OUT1 - OUT11 floating
		Ttest =-40 °C, 25 °C
		VS = 16 V, VCC = 5.3 V
	Sum quiescent supply	CSN = VCC
IS + ICC		standby mode				-	31	75	µA
	current
		OUT1 - OUT11 floating
		Ttest =-40 °C, 25 °C

10/39

Doc ID 10311 Rev 10

L9950 - L9950XP

Electrical specifications

Table 8.

Overvoltage and under voltage detection

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VSUV ON

VS UV-threshold voltage

VS increasing

5.9

-

7.2

V

VSUV OFF

VS UV-threshold voltage

VS decreasing

5.5

-

6.5

V

VSUV hyst

VS UV-hysteresis

VSUV ON - VSUV OFF

-

0.5

-

V

VSOV OFF

VS OV-threshold voltage

VS increasing

18

-

24.5

V

VSOV ON

VS OV-threshold voltage

VS decreasing

17.5

-

22

V

VSOV hyst

VS OV-hysteresis

VSOV OFF - VSOV ON

-

1

-

V

VPOR OFF

Power-on-reset threshold

VCC increasing

-

-

4.4

V

VPOR ON

Power-on-reset threshold

VCC decreasing

3.1

-

-

V

VPOR hyst

Power-on-reset hysteresis

VPOR OFF - VPOR ON

-

0.3

-

V

Table 9.

Current monitor output

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VCM

Functional voltage range

VCC = 5 V

0

4

V

Current monitor output

0 V ≤ V

≤ 4 V, VCC=5 V

1

I

ratio:

-

-

-

CM

-----------------

CM,r

ICM / IOUT1,4,5,6,11

10.000

0 V ≤ VCM ≤ 3.8 V,

VCC = 5 V, IOut,min=500 mA,

4% +

8% +

ICM acc

Current monitor accuracy

IOut4,5,11,max = 5.9 A

-

-

1%FS

2%FS

IOut1,6,max = 2.9 A

(FS = full scale= 600 µA)

Table 10.

Charge pump output

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Charge pump output

VS = 8 V, ICP = -60 µA

6

-

13

V

VCP

VS = 10 V, ICP = -80 µA

8

-

13

V

voltage

VS ≥ 12 V, ICP = -100 µA

10

-

13

V

ICP

Charge pump output

VCP = VS+10 V, VS =13.5 V

95

150

300

µA

current

Doc ID 10311 Rev 10

11/39

Electrical specifications					L9950 - L9950XP
	Table 11.	OUT1 - OUT11
	Symbol	Parameter	Test condition	Min.	Typ.	Max.	Unit
			VS = 13.5 V, Tj = 25 °C,	-	300	400	mΩ
			IOUT1,6 = ± 1.5A
	rON OUT1,	On-resistance to supply or	VS = 13.5 V, Tj = 125 °C,	-	450	600	mΩ
	rON OUT6	GND	IOUT1,6 = ± 1.5 A
			VS = 8.0 V, Tj = 25 °C,	-	300	400	mΩ
			IOUT1,6 = ± 1.5 A
			VS = 13.5 V, Tj = 25 °C,	-	800	1100	mΩ
			IOUT2,3 = ± 0.8A
	rON OUT2,	On-resistance to supply or	VS = 13.5 V, Tj = 125 °C,	-	1250	1700	mΩ
	rON OUT3	GND	IOUT2,3 = ± 0.8 A
			VS = 8.0 V, Tj = 25 °C,	-	800	1100	mΩ
			IOUT2,3 = ± 0.8 A
			VS = 13.5 V, Tj = 25 °C,	-	150	200	mΩ
			IOUT4,5 = ± 3.0 A
	rON OUT4,	On-resistance to supply or	VS = 13.5 V, Tj = 125 °C,	-	225	300	mΩ
	rON OUT5	GND	IOUT4,5 = ± 3.0 A
			VS = 8.0 V, Tj = 25 °C,	-	150	200	mΩ
			IOUT4,5 = ± 3.0 A
			VS = 13.5 V, Tj = 25 °C,	-	800	1100	mΩ
			IOUT7,8,9,10 = -0.8 A
	rON OUT7,
			VS = 13.5 V, Tj = 125 °C,
	rON OUT8,	On-resistance to supply		-	1250	1700	mΩ
	rON OUT9 ,		IOUT7,8,9,10 = -0.8 A
	rON OUT10
			VS = 8.0 V, Tj = 25 °C,	-	800	1100	mΩ
			IOUT7,8,9,10 = -0.8 A
			VS = 13.5 V, Tj = 25 °C,	-	100	150	mΩ
			IOUT11 = - 3.0 A
	rON OUT11	On-resistance to supply	VS = 13.5 V, Tj = 125 °C,	-	150	200	mΩ
			IOUT11 = - 3.0A
			VS = 8.0 V, Tj = 25 °C,	-	100	150	mΩ
			IOUT11 = - 3.0 A
	|IOUT1|,	Output current limitation to	Sink and source,	3	-	5	A
	|IOUT6|	supply or GND	VS=13.5V
	|IOUT2|,	Output current limitation to	Sink and source,	1.5	-	2.5	A
	|IOUT3|	supply or GND	VS = 13.5V
	|IOUT4|,	Output current limitation to	Sink and source,	6	-	10	A
	|IOUT5|	supply or GND	VS = 13.5V
	|IOUT7|,	Output current limitation to
	|IOUT8|,		Source, VS = 13.5V	1.5	-	2.5	A
	|IOUT9|,	GND
	|IOUT10|

12/39

Doc ID 10311 Rev 10