L9949
DOOR ACTUATOR DRIVER
■ONE FULL BRIDGE FOR 6A LOAD (ron = 150mΩ)
■THREE HALF BRIDGES FOR 1.6A LOAD (ron = 800mΩ)
■ONE HIGHSIDE DRIVER FOR 6A LOAD (ron = 100mΩ)
■VERY LOW CURRENT CONSUMPTION IN STANDBY MODE (IS < 6µA, typ. Tj ≤ 85°C)
■SERIAL PERIPHERAL INTERFACE (SPI) TO MICROCONTROLLER
■ALL OUTPUTS SHORT CIRCUIT PROTECTED
■CURRENT MONITOR OUTPUT FOR FULL BRIDGE AND HIGHSIDE DRIVER
■ALL OUTPUTS OVER TEMPERATURE PROTECTED
■OPEN LOAD DIAGNOSTIC FOR ALL OUTPUTS
■OVERLOAD DIAGNOSTIC FOR ALL OUTPUTS
APPLICATIONS
■ FOR AUTOMOTIVE APPLICATIONS, E.G.
BLOCK DIAGRAM
MULTIPOWER BCD60III TECHNOLOGY
PowerSO20
ORDERING NUMBER: L9949
FULL BRIDGE FOR DOOR LATCH OR MIRROR RETRACT, HALF BRIDGES FOR MIRROR AXIS CONTROL AND HIGH-SIDE DRIVER FOR MIRROR DEFROSTER
DESCRIPTION
The L9949 is a microprocessor controlled power interface for automotive applications. It is realized in multipower BCD60III technology. Up to three DC mo-
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VCC |
VS (battery) |
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CM |
MUX |
OUT1 |
M |
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Full bridge |
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OUT2 |
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DI |
Diagnostic |
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C |
SPI |
Half bridge |
M |
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DO |
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OUT3 |
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CLK |
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OUT4 |
M |
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InterfaceDriver |
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CSN |
Half bridge |
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OUT5 |
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OUT6 |
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Highside driver |
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Ground |
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e.g. for mirror retract or door latch
e.g. for mirror axis control
e.g. for mirror defroster
September 2002 |
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L9949
DESCRIPTION (continued)
tors and one grounded resistive load can be driven with its three half bridges, one full bridge and one highside driver power outputs. The integrated standard serial peripheral interface (SPI) controls all operation modes (forward, reverse, brake and high impedance). All diagnostic informations are available via the SPI.
Dual Power Supply: VS and VCC
The power supply voltage VS supplies the full bridge, the half bridges and the highside driver. An internal charge-pump are used to drive the highside switches. The logic supply voltage VCC (stabilized 5V) is used for the logic part and the SPI of the device. Due to the independent logic supply voltage the control and status information will not be lost, if there are temporary spikes or glitches on the power supply voltage. In case of poweron (VCC increases from undervoltage to VVCC OFF = 4.2V) the circuit is initialized by an internally generated power-on-reset (POR). If the voltage VCC decreases under the minimum threshold (VVCC ON = 3.4V), the outputs are switched to tristate (high impedance) and the status registers are cleared.
Standby-Mode
The standby mode of the L9949 is activated by setting the bits 12 and 13 of the Input Data Register to zero. All latched data will be cleared and the inputs and outputs are switched to high impedance. In the standby mode the current at VS (VCC) is less than typ. 6µA (40µA) for CSN = high (DO in tristate). By switching the VCC voltage a very low quiescent current can be achieved. If one of the bits 12 and 13 are set to high, the device will be switched to active mode.
Inductive Loads
Each half bridge is built by internally connected highside and a lowside power DMOS transistor. Due to the builtin reverse diodes of the output transistors inductive loads can be driven at the outputs OUT1 to OUT5 without external free-wheeling diodes. The highside driver OUT6 is intended to drive resistive loads only hence only a limited energie (E<1mJ ) can be dissipated by the internal ESD-diode in freewheeling condition. For inductive loads (L>100μH) an external free-wheeling diode connected to GND and OUT6 is needed.
Diagnostic Functions
All diagnostic functions (over/open load, power supply over-/undervoltage, temperature warning and thermal shutdown) are internally filtered and the condition has to be valid for at least 10µs (0.5ms, respectively) before the corresponding status bit in the status registers will be set. The filters are used to improve the noise immunity of the device. The open load and temperature warning function are intended for information purpose and will not change the state of the output drivers. In contrast, the overload and thermal shutdown condition will disable the corresponding driver (overload) or all drivers (thermal shutdown), respectively. The microcontroller has to clear the status bits to reactivate the corresponding drivers. This is to avoid an uncontrolled switching behaviour of the device which may result in a heavy noise on the GND and VS lines in case of an fault condition (e.g. short to GND or VS).
Overvoltage and Undervoltage Detection
If the power supply voltage VS rises above the overvoltage threshold VSOV OFF (max. 22V), the outputs OUT1 to OUT6 are switched to high impedance state to protect the load. If the supply voltage recovers to normal operating voltage, the device will return to the programmed state (lockout bit 14 = 0). When the voltage VS drops below the undervoltage threshold VSUV OFF (min. 6V), the output stages are switched to high impedance to avoid the operation of the power devices without sufficient gate driving voltage (increased power dissipation). If the supply voltage VS and the internal charge-pump recovers to normal operating voltage the system returns to the programmed state (lockout bit 14 = 0). If the lockout bit 14 is set, the automatic turn-on of the drivers is deactivated. The microcontroller needs to clear the status bits to reactivate the drivers.
2/20
L9949
Temperature Warning and Thermal Shutdown
When the junction temperature rises above Tj TW a temperature warning flag is set and is available via the SPI. If the junction temperature increases above the second threshold Tj SD, the thermal shutdown bit will be set and the power DMOS transistors of the output stages are switched off to protect the device. In order to reactivate the output stages the junction temperature must decrease below Tj SD - Tj SD HYS and the thermal shutdown bit has to be cleared by the microcontroller.
Open Load Detection
The open load detection monitors the voltage drop of current sense resistors in each highside and lowside driver
of the output stage. The output signal of an open load comparator has to be valid for at least 0.5 ms (tdOL) to set the open load bit (bit 1-11) in the status register 1.
Over Load Detection
In the case of an overcurrent condition an overcurrent flag (bit 1-11) is set in the status register 0 in the same way as open load detection. If the overcurrent signal is valid for at least tISC = 10µs, the overcurrent flag is set and the corresponding driver is switched off to reduce the power dissipation and to protect the integrated circuit. The microcontroller has to clear the status bits to reactivate the corresponding driver.
Current monitor
The current monitor output sources a current image at the current monitor output which has a fixed ratio (1/ 10000) of the instantaneous current of the selected highside driver. The bits 12 and 13 of the Input Data register controls which of the outputs OUT1, OUT2 and OUT6 will be multiplexed to the current monitor output. The current monitor output allows a more precise analyse of the actual state of the load rather than the detection of an openor overload condition. For example this can be used to detect the motor state (free-running, loaded or blocked) or the temperature of the heating element.
Figure 1. Pin Connection (Top view)
GND |
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1 |
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20 |
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GND |
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OUT3 |
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OUT6 |
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OUT4 |
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18 |
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VS |
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OUT5 |
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4 |
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DO |
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VS |
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CLK |
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VCC |
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DI |
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14 |
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CSN |
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VS |
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8 |
13 |
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VS |
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OUT1 |
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9 |
12 |
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OUT2 |
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GND |
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10 |
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GND |
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11 |
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D99AT455Amod
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L9949
PIN FUNCTION
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Pin |
Description |
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1, 10, |
GND |
Ground: |
11, 20 |
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Reference potential |
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Important: For the capability of driving the full current at the outputs all pins of GND must be |
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externally connected ! |
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5, 8, 13, |
VS |
Power supply voltage (battery): |
18 |
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For this input a ceramic capacitor as close as possible to GND is recommended. |
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Important: For the capability of driving the full current at the outputs all pins of VS must be |
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externally connected ! |
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15 |
VCC |
Logic supply voltage: |
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For this input a ceramic capacitors as close as possible to GND are recommended. |
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14 |
CSN |
Chip Select Not input: |
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This input is low active and requires CMOS logic levels. The serial data transfer between L9949 |
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and micro controller is enabled by pulling the input CSN to low level. If an input voltage of more |
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than 9.6V above VCC is applied to CSN pin the L9949 will be switched into a test mode. |
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6 |
CLK |
Serial clock input: |
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This input controls the internal shift register of the SPI and requires CMOS logic levels. |
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7 |
Data In |
Serial data input: |
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The input requires CMOS logic levels and receives serial data from the microcontroller. The data |
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is an 16bit control word and the least significant bit (LSB, bit 0) is transferred first. |
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Data Out |
Serial data output: |
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The diagnosis data is available via the SPI and this tristate-output. The output will remain in |
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tristate, if the chip is not selected by the input CSN (CSN = high) |
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16 |
CM |
Current monitor output: |
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Depending on the multiplexer bits 12 and 13 of the Input Data register this output sources an |
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image of the instant current through the corresponding highside driver with a ratio of 1/10000 |
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OUT1 |
Halfbridge-output 1: |
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The output is built by a highside and a lowside switch, which are internally connected. The |
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output stage of both switches is a power DMOS transistor. Each driver has an internal parasitic |
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reverse diode (bulk-drain-diode, highside driver from OUT1 to VS, lowside driver from GND to |
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OUT1). This output is overcurrent and open load protected. |
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12 |
OUT2 |
Halfbridge-output 2: → see OUT1 (pin 9) |
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2 |
OUT3 |
Halfbridge-output 3: |
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The output is built by a highside and a lowside switch, which are internally connected. The |
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output stage of both switches is a power DMOS transistor. Each driver has an internal parasitic |
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reverse diode (bulk-drain-diode, highside driver from OUT3 to VS, lowside driver from GND to |
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OUT3). This output is overcurrent and open load protected. |
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3 |
OUT4 |
Halfbridge-output 4: → see OUT3 (pin 2) |
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4 |
OUT5 |
Halfbridge-output 5: → see OUT3 (pin 2) |
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OUT6 |
Highside-driver-output 6: |
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The output is built by a highside switch and can be used only for a resistive load, because the |
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internal reverse diode from GND to OUT6 is missing. This highside switch is a power DMOS |
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transistor with an internal parasitic reverse diode from OUT6 to VS (bulk-drain-diode). The output |
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is overcurrent and open load protected. |
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L9949 |
ABSOLUTE MAXIMUM RATINGS |
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Symbol |
Parameter |
Value |
Unit |
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VS |
DC supply voltage |
-0.3...28 |
V |
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single pulse tmax < 400 ms |
40 |
V |
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VCC |
stabilized supply voltage, logic supply |
-0.3 to 6 |
V |
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VDI VDO |
digital input / output voltage |
-0.3 to VCC + 0.3 |
V |
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VCLK , |
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VCSN |
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VCM |
current monitor output |
-0.3 to VCC + 0.3 |
V |
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IOUT1,OUT2, |
output current |
±10 |
A |
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OUT6 |
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IOUT3,OUT5 |
output current |
±5 |
A |
Note: All maximum ratings are absolute ratings. Leaving the limitation of anyone of these values may cause an irreversible damage of the integrated circuit!
ESD PROTECTION
Parameter |
Value |
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All pins |
±2(1) |
kV |
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output pins: OUT1 – OUT6 |
±4(2) |
kV |
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(1)HBM according to MIL 883C, Methode 3015.7 or EIA/JESD22-A114-A
(2)HBM with all unzapped pins grounded
THERMAL DATA
Symbol |
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Parameter |
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Value |
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Unit |
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Operating junction temperature: |
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Tj |
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Operating Junction Temperature |
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-40 to 150 |
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°C |
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Temperature warning and thermal shutdown: |
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Symbol |
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Parameter |
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Min. |
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Typ. |
Max. |
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Unit |
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TjTW ON |
Temperature Warning Threshold |
Tj increasing |
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150 |
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°C |
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Junction Temperature |
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TjTW OFF |
Temperature Warning Threshold |
Tj decreasing |
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120 |
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°C |
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Junction Temperature |
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TjTW HYS |
Temperature Warning Hysteresis |
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10 |
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K |
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TjSD ON |
Thermal Shutdown Threshold |
Tj increasing |
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180 |
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°C |
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Junction Temperature |
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TjSD OFF |
Thermal Shutdown Threshold |
Tj decreasing |
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150 |
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°C |
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Junction Temperature |
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TjSD HYS |
Thermal Shutdown Hysteresis |
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10 |
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K |
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5/20
L9949
Figure 2. Thermal Data of Package
10
1
0.1
Zth (˚C/W) |
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PowerSO20 Z th(j-a) |
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1x1 sq. mm |
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diss. area dimensions |
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2x2 sq. mm |
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3x3 sq. mm |
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silicon |
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diss. area |
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die size 6x6 sq. mm |
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mounted on standard board |
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4x4 sq. mm |
Tamb = 20˚C |
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still air |
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5x5 sq. mm dissipated power 1 W - single pulse |
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diss. area located in a corner |
0.001 |
0.01 |
0.1 |
1 |
10 |
100 |
1000 |
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Time (s) |
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ELECTRICAL CHARACTERISTCS
VS = 8 to 16 V, VCC = 4.5 to 5.5 V, Tj = -40 to 150 °C, unless otherwise specified. The voltages are refered to GND and currents are assumed positive, when the current flows into the pin.
Symbol |
Parameter |
Test Condition |
Min. |
Typ. |
Max. |
Unit |
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Supply |
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VS |
Operating Supply Voltage |
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7 |
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28 |
V |
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Range |
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IS |
DC Supply Current |
active mode, |
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7 |
20 |
mA |
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VS = 16 V, VCC = 5.3 V, |
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OUT1 - OUT6 floating |
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Quiescent Supply Current |
standby mode, |
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6 |
12 |
μA |
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VS = 16 V, VCC = 0 V, |
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Tj < 85 °C (1) |
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OUT1 - OUT6 floating |
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ICC |
DC Supply Current |
active mode, CSN = VCC, |
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2 |
mA |
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VS = 16 V; VCC = 5.3 V |
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Quiescent Supply Current |
standby mode, CSN = VCC, |
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40 |
75 |
µA |
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VS = 16V, VCC = 5.3V, |
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Tj < 85 °C (1) |
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OUT1 - OUT6 floating |
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IS + ICC |
Sum Supply Quiescent Current |
standby mode, CSN = VCC, |
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50 |
90 |
µA |
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VS = 16 V, VCC = 5.3 V, Tj < 85 °C |
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OUT1 - OUT6 floating |
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6/20 |
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