ST L9733 User Manual

Octal self configuring low/high side driver

Features

■ Eight independently self configuring low/high

drivers

■ Supply voltage from 4.5 V to 5.5 V

■ R

ON(max)

R

ON(max)

■ Minimum current limit of each output 1 A

■ Output voltage clamping min. 40 V in low-side

configuration

■

Output voltage clamping max. -14 V in high-side
configuration

■ SPI interface for outputs control and for

diagnosis data communication

■ Additional PWM inputs for 3 outputs

■ Independent thermal shutdown for all outputs

open load, short to GND, short to Vb,
overcurrent diagnostics in latched or unlatched
mode for each channel

■ Internal charge pump without need of external

capacitor

■ Controlled SR for reduced EMC

= 0.7 Ω @ Tj = 25 °C,
= 1.2 Ω @Tj = 125 °C

L9733

PowerSSO-28

Outputs 1-8 are self-configuring as high or low­side drives. Self-configuration allows a user to
connect a high or low-side load to any of these
outputs and the L9733 will drive them correctly as
well as provide proper fault mode operation with
no

other needed inputs. In addition, outputs 6, 7 and

8 can be PWM controlled via a external pins (IN6-8).

This device is capable of switching variable load
currents over the ambient range of -40 °C to
+125 °C. The outputs are MOSFET drivers to
minimize Vdd current requirements. For low-side
configured outputs an internal zener clamp from
the drain to gate with a breakdown of 50 V
minimum will provide fast turn off of inductive
loads. When a high-side configured output is
commanded Off after having been commanded
On, the source voltage will go to (VGND - 15 V).

Description

The L9733 is a highly flexible monolithic, medium
current, output driver that incorporates 8 outputs
that can be used as either internal low or high-side
drives in any combination.

Table 1. Device summary

Order code Package Packing

L9733XP PowerSSO-28 (Exposed pad) Tube

L9733XPTR PowerSSO-28 (Exposed pad) Tape and reel

L9733CN PowerSSO-28 (Exposed pad) Tube

L9733CNTR PowerSSO-28 (Exposed pad) Tape and reel

July 2010 Doc ID 11319 Rev 10 1/34

An 16 bit SPI input is used to command the 8
output drivers either "On" or "Off", reducing the
I/O port requirement of the microcontroller.
Multiple L9733 can be daisy-chained. In addition
the SPI output indicates latched fault conditions
that may have occurred.

www.st.com

1

Contents L9733

Contents

1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1 Operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1.1 Functional operative range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1.2 Jump start conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1.3 Operation at low battery condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1.4 Operation at load dump condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1.5 Loss of protection against short to battery . . . . . . . . . . . . . . . . . . . . . . . . 9

2.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3 Electrical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.1 DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.2 AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.3 SPI characteristics and timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.1 Configurations for outputs 1-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.1.1 Low-side drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.1.2 High-side drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.2 Outputs 1-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.3 Outputs 6-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.4 Drn1-8 susceptibility to negative voltage transients . . . . . . . . . . . . . . . . . 19

4.5 Supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.5.1 Main power input (Vdd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.5.2 Battery supply (Vbat) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.5.3 Discrete inputs voltage supply (VDO) . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.6 Discrete inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.6.1 Output 6-8 enable input (In6, ln7, ln8) . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.6.2 Reset input (RES) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2/34 Doc ID 11319 Rev 10

L9733 Contents

5.1 Serial data output (DO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5.2 Serial data input (DI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5.3 Chip select (CS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5.4 Serial clock (SCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.5 Initial input command register and fault register SPI cycle . . . . . . . . . . . . 22

5.6 Input command register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

6 Other L9733 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

6.1 Charge pump usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

6.2 Waveshaping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

6.3 POR register initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

6.4 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

7 Fault operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

7.1 Low-side configured output fault operation . . . . . . . . . . . . . . . . . . . . . . . . 25

7.1.1 No latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

7.1.2 Latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

7.2 High-side configured output fault operation . . . . . . . . . . . . . . . . . . . . . . . 27

7.2.1 No latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

7.2.2 Latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

8 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

9 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Doc ID 11319 Rev 10 3/34

List of tables L9733

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3. Operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 6. DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 7. AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 8. SPI characteristics and timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 9. Bit command register definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 10. Command register logic definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Table 11. Fault register definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 12. Fault logic definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 13. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

4/34 Doc ID 11319 Rev 10

L9733 List of figures

List of figures

Figure 1. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 2. Output turn on/off delays and slew rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 3. DO loading for disable time measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 4. Output loading for slew rate measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 5. SPI input/output timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 6. SPI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 7. L9733 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 8. L9733 HVAC applicative examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 9. L9733 powertrain applicative examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 10. Optimized circuit layout to achieve proper EMI/ESD capability . . . . . . . . . . . . . . . . . . . . . 31

Figure 11. PowerSSO28 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . 32

Doc ID 11319 Rev 10 5/34

Pin description L9733

1 Pin description

Figure 1. Pin connection (top view)

SCLK

SRC1

DRN1

DRN2

SRC2

SRC3

DRN3 DRN6

DRN4 DRN5

SRC4

Table 2. Pin description

VDD

2

CS

IN6

IN7 IN8

3

4

5

6

7

8

9

10

12

13

D06AT544

28

27

26

25

24

23

22

21

20

19

18

17

16

1514Vbat GND

N° Pin Function

1 VDD 5 Volt supply input

2 SCLK SPI serial clock input

3 CS SPI chip select (active low)

4 SRC1 Source pin of configurable driver #1 (0.7 Ω Rds

5 DRN1 Drain pin of configurable driver #1(0.7 Ω Rds

6 DRN2 Drain pin of configurable driver #2 (0.7 Ω Rds

7 SRC2 Source pin of configurable driver #2 (0.7 Ω Rds

8 SRC3 Source pin of configurable driver #3 (0.7 Ω Rds

9 DRN3 Drain pin of configurable driver #3 (0.7 Ω Rds

10 DRN4 Drain pin of configurable driver #4 (0.7 Ω Rds

11 SRC4 Source pin of configurable driver #4 (0.7 Ω Rds

12 IN6 Discrete input used to PWM output driver #6

13 IN7 Discrete input used to PWM output driver #7

VDO1

D0

D1

SRC8

DRN8

DRN7

SRC7

SRC6

SRC511

RES

@ +25 °C)

on

@ +25 °C)

on

@ +25 °C)

on

@ +25 °C)

on

@ +25 °C)

on

@ +25 °C)

on

@ +25 °C)

on

@ +25 °C)

on

14 Vbat Battery supply voltage

15 GND Analog ground

16 IN8 Discrete input used to PWM output driver #8

17 RES Reset input (active low)

18 SRC5 Source pin of configurable driver #5 (0.7 Ω Rds

6/34 Doc ID 11319 Rev 10

@ +25 °C)

on

L9733 Pin description

Table 2. Pin description (continued)

N° Pin Function

19 DRN5 Drain pin of configurable driver #5 (0.7 Ω Rdson @ +25 °C)

20 DRN6 Drain pin of configurable driver #6 (0.7 Ω Rds

21 SRC6 Source pin of configurable driver #6 (0.7 Ω Rds

22 SRC7 Source pin of configurable driver #7 (0.7 Ω Rds

23 DRN7 Drain pin of low-side driver #7 (0.7 Ω Rds

24 DRN8 Drain pin of low-side driver #8 (0.7 Ω Rds

25 SRC8 Source pin of configurable driver #8 (0.7 Ω Rds

@ +25 °C)

on

on

on

@ +25 °C)

on

@ +25 °C)

on

on

@ +25 °C)

@ +25 °C)

@ +25 °C)

26 DI SPI data in

27 DO SPI data out

28 VDO Microcontroller logic interface voltage

Note: The exposed slug must be soldered on the PCB and connected to GND.

Doc ID 11319 Rev 10 7/34

Operating conditions L9733

2 Operating conditions

2.1 Operating range

This part may not operate if taken outside the operating range. Once the condition is
returned to within the specified maximum rating or the power is recycled, the part will
recover with no damage or degradation.

Table 3. Operating range

Symbol Parameter Value Unit

V

dd

V

(operative

bat

range)

@ JSC 18 to 27

V

bat

V

@ low

bat

battery

V

@ load

bat

dump

T

j

I

Ox

Eso Maximum clamping energy at switch-off 20 mJ

Supply voltage 4.5 to 5.5 V

Battery supply voltage

Thermal junction temperature range -40 to 150 °C

Snubbing voltage of DRN1-8 min 50 VDC

Output current 1-8 max 800 mA

2.1.1 Functional operative range

4.5 V ≤ V

All the electrical capabilities are guaranteed by characterization as reported in Section 3:

Electrical performance characteristics.

2.1.2 Jump start conditions

≤ 18 V (-40 °C ≤ Tj ≤ 150 °C);

bat

4.5V to 18

V

3.5 to 4.5

27 to 40

18 V ≤ V

≤ 27 V (-40 °C ≤ Tj ≤ 150 °C);

bat

Operation at Jump start condition for a maximum duration of 1 minute.

All ouputs are switched according to the commands on the SPI bus or the PWM inputs. The
SPI bus and the inputs are functional during the Jump-Start condition.

The over-temperature shutdown and over current protection of the device is not guaranteed
to stay functional for Vbat between 18 V and 27 V.

The reliability and the functionality of the L9733XP are not compromised when the Jump­Start condition is not repeated for more than five times.

8/34 Doc ID 11319 Rev 10

L9733 Operating conditions

2.1.3 Operation at low battery condition

3.5 V ≤ V

≤ 4.5 V (-40 °C ≤ Tj ≤ 150 °C);

bat

All outputs are able to keep the status in according to the commands on the SPI bus or the
PWM inputs. Switching commands entered via the SPI bus might not be executed by the
L9733 at low-battery condition. The SPI bus and the inputs are functional during the Low­Battery condition.

2.1.4 Operation at load dump condition

27 V ≤ V

There is not an internal circuit that switches OFF the drivers during load dump condition.

The over-temperature shutdown and over current protection of the device is not guaranteed
to stay functional during load dump condition.

≤ 40 V (-40 °C ≤ Tj ≤ 150 °C)

bat

2.1.5 Loss of protection against short to battery

When the battery supply voltage, V

bat (pin 14)

condition at a output in high-side configuration, the protection circuits are no longer
functional, and the L9733 may fail with EOS.

is switched off during a short-to-battery

2.2 Absolute maximum ratings

This part may be irreparably damaged if taken outside the specified absolute maximum
ratings. Operation outside the absolute maximum ratings may also cause a decrease in
reliability.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

V

V

I

I

ESD

1. For the DRNx the MAX ASB value is the Max Clamp Voltage (see Table 6 on page 13 - DRNx Clamp
voltage).

2. Device is only protected vs. GND.

Supply voltage -0.3 to 7 V

DD

Supply voltage -0.3 to 40 V

bat

CS,DI,DO,SCLK,EN,IN6,IN7,IN8,VDO -0.3 to 7.0 V

SRCx pin min. -24 VDC

Max. value of V

DRN1-8

Current limit of output 1-8 (-40 °C) 2.5 A

OL

Over current protection at output 1-8 (-40 °C) 3 A

OP

Maximum clamping energy 20 mj

Human body model - All pins ±2

Human body model - Driver outputs ±4

(1)

= Minimum of {V

SRCx

Doc ID 11319 Rev 10 9/34

+1V ||| V

bat

+0,3 V ||| +40 V}

DRNx

-0.3 to 60 VDC

(2)

(2)

kV

kV

Operating conditions L9733

2.3 Thermal data

Table 5. Thermal data

Symbol Parameter Min Typ Max Unit

T

T

R

R

th-hys

R

Th j-amb

R

Th j-case

1. With 2s2p PCB thermally enhanced.

Operating ambient temperature -40 - 125 °C

amb

Storage temperature -50 - 150 °C

stg

T

Maximum operating junction temperature - - 150 °C

j

Thermal shutdown temperature 151 175 200 °C

th

Thermal shutdown temperature hysteresis 7 10 25 °C

Thermal resistance junction-to-ambient

Thermal resistance junction-to-case - - 3 °C/W

(1)

--24°C/W

10/34 Doc ID 11319 Rev 10

L9733 Electrical performance characteristics

3 Electrical performance characteristics

These are the electrical capabilities this part was designed to meet. It is required that every
part meet these characteristics.

3.1 DC characteristics

T

= -40 to 125 °C, Vdd = 4.5 to 5.5 Vdc, V

amb

unless otherwise specified.

Table 6. DC characteristics

Symbol Parameter Conditions Min Typ Max Units

= 4.5 to 18 Vdc (high-side configuration),

bat

IN6v

IN6v

I

IN6il

I

IN6ih

IN7v

IN7v

I

IN7il

I

IN7ih

IN8v

IN8v

I

IN8il

I

IN8ih

CS

CS

I

CSih

I

CSil

SCLK

SCLK

I

SCLKih

I

SCLKil

DI

DI

I

DIih

I

DIil

DO

DO

ih

IN6 input voltage

il

- - 0.7vdo V

0.3vdo - - V

In6 = 0 VDC - - |10| μA

IN6 input current

In6 = VDO 10 - 100 μA

ih

IN7 input voltage

il

- - 0.7vdo V

0.3vdo - - V

In7 = 0 VDC - - |10| μA

IN7 input current

In7 = VDO 10 - 100 μA

ih

IN8 input voltage

il

- - 0.7vdo V

0.3vdo - - V

In8 = 0 VDC - - |10| μA

IN8 input current

In8 = VDO 10 - 100 μA

ih

CS input voltage

il

- - 0.7vdo V

0.3vdo - - V

CS = VDO - - |10| μA

CS input current

CS = 0 VDC 10 - 100 μA

ih

SCLK input voltage

il

- - 0.7vdo V

0.3vdo - - V

SCLK = VDO - - |10| μA

SCLK input current

SCLK = 0 VDC 10 - 100 μA

ih

il

DI input voltage

- - 0.7vdo V

0.3vdo - - V

DI = VDO - - |10| μA

DI input current

DI = 0 VDC 10 - 100 μA

= 2.5 mA - - 0.4 V

ol

oh

DO output voltages

I

DO

IDO = -2.5 mA vdo-0.6 - - V

Doc ID 11319 Rev 10 11/34