ST L7985 User Manual

L7985

2 A step-down switching regulator

Features

■2 A DC output current

■4.5 V to 38 V input voltage

■Output voltage adjustable from 0.6 V

■250 KHz switching frequency, programmable up to 1 MHz

■Internal soft-start and enable

■Low dropout operation: 100% duty cycle

■Voltage feed-forward

■Zero load current operation

■Overcurrent and thermal protection

■VFQFPN3x3-10L and HSOP8 package

Applications

■Consumer: STB, DVD, DVD recorder, car audio, LCD TV and monitors

■Industrial: PLD, PLA, FPGA, chargers

■Networking: XDSL, modems, DC-DC modules

■Computer: optical storage, hard disk drive, printers, audio/graphic cards

■LED driving

VFQFPN10 3 x 3 mm HSOP8 Exp. pad

Description

The L7985/A is a step-down switching regulator with 2.5 A (minimum) current limited embedded power MOSFET, so it is able to deliver up to 2 A current to the load depending on the application conditions.

The input voltage can range from 4.5 V to 38 V, while the output voltage can be set starting from 0.6 V to VIN.

Requiring a minimum set of external components, the device includes an internal 250 kHz switching frequency oscillator that can be externally adjusted up to 1 MHz.

The QFN and the HSOP packages with exposed

pad allow reducing the RthJA down to 60 °C/W and 40 °C/W respectively.

Figure 1. Application circuit

Vin=4.5V - 38V	VCC					OUT	L1	Vout from 0.6 to Vin
		9-10			1-2
C1	EN		L7985			SYNCH		C2
		4			3		D1
	GND	8		6	5	FB
		7
			FSW	COMP
		R5		R4		C4		R1
					C5		R2

March 2012

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Contents	L7985

Contents

1	Pin settings		. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 3
	1.1	Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		3
	1.2	Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		3
2	Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			4
3	Thermal data		. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	4
4	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			5
5	Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			7
	5.1	Oscillator and synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		8
	5.2	Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		10
	5.3	Error amplifier and compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		11
	5.4	Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		12
	5.5	Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		13
	5.6	Hysteretic thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		13
6	Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			14
	6.1	Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		14
	6.2	Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		15
	6.3	Output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		17
	6.4	Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		18
		6.4.1	Type III compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
		6.4.2	Type II compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
	6.5	Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		27
	6.6	Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		28
	6.7	Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		30
7	Application ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			34
	7.1	Positive buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		34
	7.2	Inverting buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		36

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L7985		Contents
8	Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 38
9	Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 41
10	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 42

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Pin settings	L7985

1 Pin settings

1.1Pin connection

Figure 2. Pin connection (top view)

OUT

VCC

OUT

VCC

OUT

VCC

SYNCH

GND

SYNCH

GND

EN

FSW

EN

FSW

COMP

FB

COMP

FB

VFQFPN10

HSOP8

1.2Pin description

	Table 1.	Pin description
	N.	N.	Type	Description
	(VFQFPN)	(HSOP)
	1-2	1	OUT	Regulator output
				Master/slave synchronization. When it is left floating, a
				signal with a phase shift of half a period, with respect to the
				power turn-on, is present at the pin. When connected to an
				external signal at a frequency higher than the internal one,
	3	2	SYNCH	the device is synchronized by the external signal, with zero
				phase shift.
				Connecting together the SYNCH pin of two devices, the one
				with a higher frequency works as master and the other one
				as slave; so the two power turn-ons have a phase shift of
				half a period.
				A logical signal (active high) enables the device. With EN
	4	3	EN	higher than 1.2 V the device is ON and with EN lower than
				0.3 V the device is OFF.
	5	4	COMP	Error amplifier output to be used for loop frequency
				compensation.
				Feedback input. By connecting the output voltage directly to
	6	5	FB	this pin the output voltage is regulated at 0.6 V. To have
				higher regulated voltages an external resistor divider is
				required from VOUT to the FB pin.
				The switching frequency can be increased connecting an
	7	6	FSW	external resistor from the FSW pin and ground. If this pin is
				left floating, the device works at its free-running frequency of
				250 KHz.
	8	7	GND	Ground
	9-10	8	VCC	Unregulated DC input voltage.

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L7985								Maximum ratings
2	Maximum ratings
	Table 2.	Absolute maximum ratings
	Symbol			Parameter				Value		Unit
		Vcc		Input voltage			45
		OUT		Output DC voltage				-0.3 to VCC
	FSW, COMP, SYNCH			Analog pin				-0.3 to 4		V
		EN		Enable pin				-0.3 to VCC
		FB		Feedback voltage				-0.3 to 1.5
		PTOT		Power dissipation	VFQFPN		1.5.			W
				at TA < 60 °C	HSOP		2
		TJ		Junction temperature range				-40 to 150		°C
		Tstg		Storage temperature range				-55 to 150		°C
3	Thermal data
	Table 3.	Thermal data
	Symbol			Parameter				Value		Unit
	RthJA		Maximum thermal resistance			VFQFPN		60	°C/W
			junction-ambient (1)
						HSOP		40

1. Package mounted on demonstration board.

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Electrical characteristics	L7985

4 Electrical characteristics

TJ = 25 °C, VCC = 12 V, unless otherwise specified.
Table 4.	Electrical characteristics
Symbol	Parameter	Test conditions				Values			Unit
					Min.	Typ.	Max.
VCC	Operating input voltage	(1)			4.5		38
	range
									V
VCCON	Turn on VCC threshold	(1)					4.5
VCCHYS	VCC UVLO hysteseris	(1)			0.1		0.4
RDSON	MOSFET on resistance					200			mΩ
		(1)					400
ILIM	Maximum limiting current				2.5	3.0	3.5		A
Oscillator
FSW	Switching frequency	(1)			210	250	275		KHz
VFSW	FSW pin voltage					1.254			V
D	Duty cycle				0		100	%
FADJ	Adjustable switching	RFSW=33 kΩ				1000			KHz
	frequency
Dynamic characteristics
VFB	Feedback voltage	4.5 V<VCC<38 V			0.593	0.6	0.607		V
		4.5 V<V		<38 V (1)	0.582	0.6	0.618
			CC
DC characteristics
IQ	Quiescent current	Duty cycle=0, VFB=0.8					2.4		mA
		V
IQST-BY	Total standby quiescent					20	30		µA
	current
Enable
VEN	EN threshold voltage	Device OFF level					0.3		V
		Device ON level			1.2
IEN	EN current	EN=VCC				7.5	10		µA
Soft-start
		FSW pin floating			7.4	8.2	9.1
TSS	Soft-start duration								ms
		FSW=1 MHz,				2
		RFSW=33 kΩ

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L7985				Electrical characteristics
	Table 4.	Electrical characteristics
	Symbol	Parameter	Test conditions		Values		Unit
				Min.	Typ.	Max.
	Error amplifier
	VCH	High level output voltage	VFB<0.6 V	3			V
	VCL	Low level output voltage	VFB>0.6 V			0.1
	IO SOURCE	Source COMP pin	VFB=0.5 V, VCOMP=1 V		19		mA
	IO SINK	Sink COMP pin	VFB=0.7 V, VCOMP=1 V		30		mA
	GV	Open-loop voltage gain	(2)		100		dB
	Synchronization function
	VS_IN,HI	High input voltage		2		3.3	V
	VS_IN,LO	Low input voltage				1
			VS_IN,HI=3 V,	100
	tS_IN_PW	Input pulse width	VS_IN,LO=0 V				ns
			VS_IN,HI=2 V,	300
			VS_IN,LO=1 V
	ISYNCH,LO	Slave sink current	VSYNCH=2.9 V		0.7	1	mA
	VS_OUT,HI	Master output amplitude	ISOURCE=4.5 mA	2			V
	tS_OUT_PW	Output pulse width	SYNCH floating		110		ns
	Protection
	TSHDN	Thermal shutdown			150		°C
		Hystereris			30

1.Specifications referred to TJ from -40 to +125 °C. Specifications in the -40 to +125 °C temperature range are assured by design, characterization and statistical correlation.

2.Guaranteed by design.

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Functional description	L7985

5 Functional description

The L7985 is based on a “voltage mode” constant frequency control. The output voltage VOUT is sensed by the feedback pin (FB) compared to an internal reference (0.6 V) providing an error signal that, compared to a fixed frequency sawtooth, controls the onand off-time of the power switch.

The main internal blocks are shown in the block diagram in Figure 3. They are:

●A fully integrated oscillator that provides sawtooth to modulate the duty cycle and the synchronization signal. Its switching frequency can be adjusted by an external resistor. The voltage and frequency feed-forward are implemented.

●The soft-start circuitry to limit inrush current during the startup phase.

●The voltage mode error amplifier.

●The pulse width modulator and the relative logic circuitry necessary to drive the internal power switch.

●The high-side driver for embedded P-channel power MOSFET switch.

●The peak current limit sensing block, to handle overload and short-circuit conditions.

●A voltage regulator and internal reference. To supply the internal circuitry and provide a fixed internal reference.

●A voltage monitor circuitry (UVLO) that checks the input and internal voltages.

●A thermal shutdown block, to prevent thermal runaway.

Figure 3. Block diagram

					VCC
	TRIMMING	REGULATOR		UVLO
			&
EN	EN	BANDGAP		PEAK
		1.254V	3.3V	CURRENT
				LIMIT
	0.6V
	SOFT-	THERMAL
COMP	START	SHUTDOWN			DRIVER
		E/A	PWM	S	Q
				R
					OUT
				SYNCH
				&
		OSCILLATOR		PHASE SHIFT
	FB	FSW	GND	SYNCH

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L7985	Functional description

5.1Oscillator and synchronization

Figure 4 shows the block diagram of the oscillator circuit. The internal oscillator provides a constant frequency clock. Its frequency depends on the resistor externally connect to the FSW pin. If the FSW pin is left floating, the frequency is 250 kHz; it can be increased as shown in Figure 6 by an external resistor connected to ground.

To improve the line transient performance, keeping the PWM gain constant versus the input voltage, the voltage feed-forward is implemented by changing the slope of the sawtooth according to the input voltage change (see Figure 5.a).

The slope of the sawtooth also changes if the oscillator frequency is increased by the external resistor. In this way a frequency feed-forward is implemented (Figure 5.b) in order to keep the PWM gain constant versus the switching frequency (see Section 6.4 for PWM gain expression).

On the SYNCH pin the synchronization signal is generated. This signal has a phase shift of 180° with respect to the clock. This delay is useful when two devices are synchronized connecting the SYNCH pin together. When the SYNCH pins are connected, the device with a higher oscillator frequency works as master, so the slave device switches at the frequency of the master but with a delay of half a period. This minimizes the RMS current flowing through the input capacitor (see the L5988D datasheet).

Figure 4. Oscillator circuit block diagram

	Clock
FSW	Clock	SYNCH
	Synchronization
	Generator
	Ramp
	Generator	Sawtooth

The device can be synchronized to work at higher frequency feeding an external clock signal. The synchronization changes the sawtooth amplitude, changing the PWM gain (Figure 5.c). This change has to be taken into account when the loop stability is studied. To minimize the change of PWM gain, the free-running frequency should be set (with a resistor on the FSW pin) only slightly lower than the external clock frequency. This pre-adjusting of the frequency changes the sawtooth slope in order to render the truncation of sawtooth negligible, due to the external synchronization.

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Functional description		L7985
	Figure 5.	Sawtooth: voltage and frequency feed-forward; external synchronization

Figure 6. Oscillator frequency vs. FSW pin resistor

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L7985	Functional description

5.2Soft-start

The soft-start is essential to assure correct and safe startup of the step-down converter. It avoids inrush current surge and makes the output voltage increase monothonically.

The soft-start is performed by a staircase ramp on the non-inverting input (VREF) of the error amplifier. So the output voltage slew rate is:

Equation 1

SR		= SR				1	R1
	OUT		VREF				+ -------
							R2

where SRVREF is the slew rate of the non-inverting input, while R1and R2 is the resistor divider to regulate the output voltage (see Figure 7). The soft-start staircase consists of 64

steps of 9.5 mV each, from 0 V to 0.6 V. The time base of one step is of 32 clock cycles. So the soft-start time and then the output voltage slew rate depend on the switching frequency.

Figure 7. Soft-start scheme

Soft-start time results:

Equation 2

32 64 SSTIME = -------------------

Fsw

For example, with a switching frequency of 250 kHz, the SSTIME is 8 ms.

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Functional description	L7985

5.3Error amplifier and compensation

The error amplifier (E/A) provides the error signal to be compared with the sawtooth to perform the pulse width modulation. Its non-inverting input is internally connected to a 0.6 V voltage reference, while its inverting input (FB) and output (COMP) are externally available for feedback and frequency compensation. In this device the error amplifier is a voltage mode operational amplifier, therefore, with high DC gain and low output impedance.

The uncompensated error amplifier characteristics are the following:

Table 5. Uncompensated error amplifier characteristics

Low frequency gain	100 dB
GBWP	4.5 MHz
Slew rate	7 V/ s
Output voltage swing	0 to 3.3 V
Maximum source/sink current	17 mA/25 mA

In continuous conduction mode (CCM), the transfer function of the power section has two poles due to the LC filter and one zero due to the ESR of the output capacitor. Different kinds of compensation networks can be used depending on the ESR value of the output capacitor. If the zero introduced by the output capacitor helps to compensate the double pole of the LC filter, a type II compensation network can be used. Otherwise, a type III compensation network must be used (see Chapter 6.4 for details of the compensation network selection).

Anyway, the methodology to compensate the loop is to introduce zeroes to obtain a safe phase margin.

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L7985	Functional description

5.4Overcurrent protection

The L7985 implements overcurrent protection by sensing current flowing through the power MOSFET. Due to the noise created by the switching activity of the power MOSFET, the current sensing is disabled during the initial phase of the conduction time. This avoids an erroneous detection of a fault condition. This interval is generally known as “masking time” or “blanking time”. The masking time is about 200 ns.

If the overcurrent limit is reached, the power MOSFET is turned off, implementing pulse-by- pulse overcurrent protection. In the overcurrent condition, the device can skip turn-on pulses in order to keep the output current constant and equal to the current limit. If, at the end of the “masking time”, the current is higher than the overcurrent threshold, the power MOSFET is turned off and one pulse is skipped. If, at the following switching on, when the “masking time” ends, the current is still higher than the overcurrent threshold, the device skips two pulses. This mechanism is repeated and the device can skip up to seven pulses. While, if at the end of the “masking time”, the current is lower than the overcurrent threshold, the number of skipped cycles is decreased by one unit (see Figure 8).

So, the overcurrent/short-circuit protection acts by switching off the power MOSFET and reducing the switching frequency down to one eighth of the default switching frequency, in order to keep constant the output current around the current limit.

This kind of overcurrent protection is effective if the output current is limited. To prevent the current from diverging, the current ripple in the inductor during the on-time must not be higher than the current ripple during the off-time. That is:

Equation 3

V-----IN-------–-----V----OUT-------------–-----R----DSON------------------------I---OUT------------–-----DCR---------------------I--OUT----------	D =	V-----OUT--------------+----V----F-----+-----R----DSON------------------------I--OUT-------------+-----DCR----------------------I-OUT----------- (1 – D)
L FSW		L FSW

If the output voltage is shorted, VOUT 0, IOUT=ILIM, D/FSW=TON_MIN, (1-D)/FSW 1/FSW. So, from Equation 3, the maximum switching frequency that guarantees to limit the current

results:

Equation 4

F*	=	(VF + DCR ILIM)		1
		(---V----IN-------–-----(---R----DSON------------------+-----DCR---------------)--------I---LIM---------)		------------------------
SW				TON_MIN

With RDSON=300 mΩ, DRC=0.08 Ω, the worst condition is with VIN=38 V, ILIM=2.5A; the maximum frequency to keep the output current limited during the short-circuit results 74

kHz.

The pulse-by-pulse mechanism, which reduces the switching frequency down to one eighth of the maximum FSW, adjusted by the FSW pin, assures that a full effective output current limitation is 74 kHz*8=592 kHz.

If, with VIN=38 V, the switching frequency is set higher than 592 kHz, during short-circuit condition the system finds a different equilibrium with higher current. For example, with FSW=700 kHz and the output shorted to ground, the output current is limited around:

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	Functional description				L7985
	Equation 5
	IOUT =	VIN	FSW* – VF	⁄ TON_MIN	= 3.68A
		T----ON---------_---MIN----------)---+-----(--R-----DSON------------------+-----DCR--------------)---------F----SW*--------
	(DRC ⁄

where FSW* is 700 kHz divided by eight.

Figure 8. Overcurrent protection

5.5Enable function

The enable feature allows to put the device into standby mode. With the EN pin lower than 0.3 V the device is disabled and the power consumption is reduced to less than 30 µA. With the EN pin lower than 1.2 V, the device is enabled. If the EN pin is left floating, an internal pull-down ensures that the voltage at the pin reaches the inhibit threshold and the device is disabled. The pin is also VCC compatible.

5.6Hysteretic thermal shutdown

The thermal shutdown block generates a signal that turns off the power stage if the junction temperature goes above 150 °C. Once the junction temperature returns to about 130 °C, the device restarts in normal operation. The sensing element is very close to the PDMOS area, so ensuring an accurate and fast temperature detection.

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