ST L7980 User Manual

L7980

2 A step-down switching regulator

Features

■2 A DC output current

■4.5 V to 28 V input voltage

■Output voltage adjustable from 0.6 V

■250 kHz switching frequency, programmable up to 1 MHz

■Internal soft-start and enable

■Low dropout operation: 100% duty cycle

■Voltage feed-forward

■Zero load current operation

■Overcurrent and thermal protection

■VFQFPN3x3-8L and HSOP8 package

Applications

■Consumer:

STB, DVD, DVD recorder, car audio, LCD TV and monitors

■Industrial:

PLD, PLA, FPGA, chargers

■Networking: XDSL, modems, DC-DC modules

■Computer:

Optical storage, Hard disk drive, Printers, Audio/graphic cards

■LED driving

VFQFPN8 3x3 HSOP8 exposed pad

Description

The L7980 is a step down switching regulator with 2.5 A (minimum) current limited embedded power MOSFET, so it is able to deliver up to 2 A current to the load depending on the application conditions.

The input voltage can range from 4.5 V to 28 V, while the output voltage can be set starting from 0.6 V to VIN.

Requiring a minimum set of external components, the device includes an internal 250 kHz switching frequency oscillator that can be externally adjusted up to 1 MHz.

The QFN and the HSOP packages with exposed

pad allow reducing the RthJA down to 60 °C/W and 40 °C/W respectively.

Figure 1. Application circuit

December 2010

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Contents	L7980

Contents

1	Pin settings		. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. 4
	1.1	Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		4
	1.2	Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		4
2	Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			5
3	Thermal data		. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	5
4	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			6
5	Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			8
	5.1	Oscillator and synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		9
	5.2	Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		11
	5.3	Error amplifier and compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		11
	5.4	Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		13
	5.5	Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		14
	5.6	Hysteretic thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		14
6	Application informations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			15
	6.1	Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		15
	6.2	Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		16
	6.3	Output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		18
	6.4	Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		19
		6.4.1	Type III compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
		6.4.2	Type II compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	6.5	Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		28
	6.6	Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		29
	6.7	Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		31
7	Application ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .			35
	7.1	Positive buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		35
	7.2	Inverting buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		37

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L7980		Contents
8	Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 39
9	Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 42
10	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 43

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Pin settings	L7980

1 Pin settings

1.1Pin connection

Figure 2. Pin connection (top view)

OUT				VCC
SYNCH				GND
EN				FSW
COMP				FB

1.2Pin description

	Table 1.	Pin description
	N.	Type	Description
	1	OUT	Regulator output
			Master/Slave Synchronization. When it is left floating, a signal with a
			phase shift of half a period respect to the power turn on is present at the
			pin. When connected to an external signal at a frequency higher than the
	2	SYNCH	internal one, then the device is synchronized by the external signal, with
			zero phase shift.
			Connecting together the SYNCH pin of two devices, the one with higher
			frequency works as master and the other one as slave; so the two
			powers turn on have a phase shift of half a period.
	3	EN	A logical signal (active high) enable the device. With EN higher than 1.2
			V the device is ON and with EN is lower than 0.3V the device is OFF.
	4	COMP	Error amplifier output to be used for loop frequency compensation
			Feedback input. Connecting the output voltage directly to this pin the
	5	FB	output voltage is regulated at 0.6V. To have higher regulated voltages an
			external resistor divider is required from Vout to FB pin.
			The switching frequency can be increased connecting an external
	6	FSW	resistor from FSW pin and ground. If this pin is left floating the device
			works at its free-running frequency of 250kHz.
	7	GND	Ground
	8	VCC	Unregulated DC input voltage

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L7980	Maximum ratings

2 Maximum ratings

Table 2.	Absolute maximum ratings
Symbol		Parameter		Value	Unit
	Vcc	Input voltage		30
	OUT	Output DC voltage		-0.3 to VCC
FSW, COMP, SYNCH		Analog pin		-0.3 to 4	V
	EN	Enable pin		-0.3 to VCC
	FB	Feedback voltage		-0.3 to 1.5
	PTOT	Power dissipation	VFQFPN	1.5.	W
		at TA < 60°C	HSOP	2
	TJ	Junction temperature range		-40 to 150	°C
	Tstg	Storage temperature range		-55 to 150	°C

3	Thermal data
	Table 3.	Thermal data
	Symbol		Parameter		Value	Unit
	RthJA		Maximum thermal resistance	VFQFPN	60	°C/W
			junction-ambient (1)
				HSOP	40

1. Package mounted on demonstration board.

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Electrical characteristics	L7980

4 Electrical characteristics

TJ=25 °C, VCC=12 V, unless otherwise specified.

	Table 4.		Electrical characteristics
	Symbol		Parameter	Test condition		Values		Unit
					Min	Typ	Max
	VCC		Operating input voltage	(1)	4.5		28
			range
								V
	VCCON		Turn on VCC threshold	(1)			4.4
	VCCHYS		VCC UVLO Hysteresis	(1)	0.12		0.35
	RDSON		MOSFET on resistance			160	180	mΩ
				(1)		160	250
	ILIM		Maximum limiting current		2.5	3.0	3.5	A
	Oscillator
	FSW		Switching frequency		225	250	275	KHz
				(1)	220		275
	VFSW		FSW pin voltage			1.254		V
	D		Duty Cycle		0		100	%
	FADJ		Adjustable switching	RFSW=33kΩ		1000		KHz
			frequency
	Dynamic characteristics
	V	FB	Feedback voltage	4.5V<V <28V (1)	0.593	0.6	0.607	V
				CC
	DC characteristics
	IQ		Quiescent current	Duty Cycle=0,			2.4	mA
				VFB=0.8V
	IQST-BY		Total stand-by quiescent			20	30	μA
			current
	Enable
			EN threshold voltage	Device OFF level			0.3	V
				Device ON level	1.2
			EN current	EN=VCC		7.5	10	μA
	Soft start
				FSW pin floating	7.4	8.2	9.1
	TSS		Soft start duration					ms
				F =1MHz,
				SW		2
				RFSW=33kΩ
	Error amplifier

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L7980				Electrical characteristics
	Table 4.	Electrical characteristics
	Symbol	Parameter	Test condition		Values		Unit
				Min	Typ	Max
	VCH	High level output voltage	VFB<0.6V	3			V
	VCL	Low level output voltage	VFB>0.6V			0.1
	IO SOURCE	Source COMP pin	VFB=0.5V, VCOMP=1V		17		mA
	IO SINK	Sink COMP pin	VFB=0.7V, VCOMP=1V		25		mA
	GV	Open loop voltage gain	(2)		100		dB
	Synchronization function
		High input voltage		2		3.3	V
		Low input voltage				1
		Slave sink current	VSYNCH=2.9V		0.7	0.9	mA
		Master output amplitude	ISOURCE=4.5mA	2.0			V
		Output pulse width	SYNCH floating		110		ns
		Input pulse width		70
	Protection
	TSHDN	Thermal shutdown			150		°C
		Hysteresis			30

1.Specification referred to TJ from -40 to +125°C. Specification in the -40 to +125°C temperature range are assured by design, characterization and statistical correlation.

2.Guaranteed by design.

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Functional description	L7980

5 Functional description

The L7980 is based on a “voltage mode”, constant frequency control. The output voltage VOUT is sensed by the feedback pin (FB) compared to an internal reference (0.6 V) providing an error signal that, compared to a fixed frequency sawtooth, controls the on and off time of the power switch.

The main internal blocks are shown in the block diagram in Figure 3. They are:

●A fully integrated oscillator that provides sawtooth to modulate the duty cycle and the synchronization signal. Its switching frequency can be adjusted by an external resistor. The voltage and frequency feed forward are implemented.

●The soft start circuitry to limit inrush current during the start up phase.

●The voltage mode error amplifier

●The pulse width modulator and the relative logic circuitry necessary to drive the internal power switch.

●The high-side driver for embedded p-channel power MOSFET switch.

●The peak current limit sensing block, to handle over load and short circuit conditions.

●A voltage regulator and internal reference. It supplies internal circuitry and provides a fixed internal reference.

●A voltage monitor circuitry (UVLO) that checks the input and internal voltages.

●A thermal shutdown block, to prevent thermal run away.

Figure 3. Block diagram

					VCC
	TRIMMING	REGULATOR		UVLO
			&
EN	EN	BANDGAP		PEAK
		1.254V	3.3V	CURRENT
				LIMIT
	0.6V
	SOFT-	THERMAL
COMP	START	SHUTDOWN			DRIVER
		E/A	PWM	S	Q
				R
					OUT
				SYNCH
		OSCILLATOR		&
				PHASE SHIFT
	FB	FSW	GND	SYNCH

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L7980	Functional description

5.1Oscillator and synchronization

Figure 4 shows the block diagram of the oscillator circuit. The internal oscillator provides a constant frequency clock. Its frequency depends on the resistor externally connect to FSW pin. In case the FSW pin is left floating the frequency is 250 kHz; it can be increased as shown in Figure 6 by external resistor connected to ground.

To improve the line transient performance, keeping the PWM gain constant versus the input voltage, the voltage feed forward is implemented by changing the slope of the sawtooth according to the input voltage change (see Figure 5.a).

The slope of the sawtooth also changes if the oscillator frequency is increased by the external resistor. In this way a frequency feed forward is implemented (Figure 5.b) in order to keep the PWM gain constant versus the switching frequency (see Section 6.4 for PWM gain expression).

On the SYNCH pin the synchronization signal is generated. This signal has a phase shift of 180° with respect to the clock. This delay is useful when two devices are synchronized connecting the SYNCH pin together. When SYNCH pins are connected, the device with higher oscillator frequency works as Master, so the Slave device switches at the frequency of the Master but with a delay of half a period. This minimizes the RMS current flowing through the input capacitor [see L5988D data sheet].

Figure 4. Oscillator circuit block diagram

	Clock
FSW	Clock	SYNCH
	Synchronization
	Generator
	Ramp	Sawtooth
	Generator

The device can be synchronized to work at higher frequency feeding an external clock signal. The synchronization changes the sawtooth amplitude, changing the PWM gain (Figure 5.c). This changing has to be taken into account when the loop stability is studied. To minimize the change of the PWM gain, the free running frequency should be set (with a resistor on FSW pin) only slightly lower than the external clock frequency. This pre-adjusting of the frequency will change the sawtooth slope in order to get negligible the truncation of sawtooth, due to the external synchronization.

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Functional description		L7980
	Figure 5.	Sawtooth: voltage and frequency feed forward; external synchronization

Figure 6. Oscillator frequency versus FSW pin resistor

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L7980	Functional description

5.2Soft-start

The soft-start is essential to assure correct and safe start up of the step-down converter. It avoids inrush current surge and makes the output voltage increases monothonically.

The soft -start is performed by a staircase ramp on the non-inverting input (VREF) of the error amplifier. So the output voltage slew rate is:

Equation 1

SROUT = SRVREF		1	R1
			+ -------
			R2

where SRVREF is the slew rate of the non-inverting input, while R1and R2 is the resistor divider to regulate the output voltage (see Figure 7). The soft-start stair case consists of 64

steps of 9.5 mV each one, from 0 V to 0.6 V. The time base of one step is of 32 clock cycles. So the soft start time and then the output voltage slew rate depend on the switching frequency.

Figure 7. Soft start scheme

Soft start time results:

Equation 2

32 64 SSTIME = -----------------

Fsw

For example with a switching frequency of 250 kHz the SSTIME is 8 ms.

5.3Error amplifier and compensation

The error amplifier (E/A) provides the error signal to be compared with the sawtooth to perform the pulse width modulation. Its non-inverting input is internally connected to a 0.6 V voltage reference, while its inverting input (FB) and output (COMP) are externally available for feedback and frequency compensation. In this device the error amplifier is a voltage mode operational amplifier so with high DC gain and low output impedance.

The uncompensated error amplifier characteristics are the following:

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Functional description				L7980
	Table 5.	Uncompensated error amplifier characteristics
		Low frequency gain		100dB
		GBWP		4.5MHz
		Slew rate		7V/μs
		Output voltage swing		0 to 3.3V
		Maximum source/sink current		17mA/25mA

In continuos conduction mode (CCM), the transfer function of the power section has two poles due to the LC filter and one zero due to the ESR of the output capacitor. Different kinds of compensation networks can be used depending on the ESR value of the output capacitor. In case the zero introduced by the output capacitor helps to compensate the double pole of the LC filter a type II compensation network can be used. Otherwise, a type III compensation network has to be used (see Chapter 6.4 for details about the compensation network selection).

Anyway the methodology to compensate the loop is to introduce zeros to obtain a safe phase margin.

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L7980	Functional description

5.4Overcurrent protection

The L7980 implements the overcurrent protection sensing current flowing through the power MOSFET. Due to the noise created by the switching activity of the power MOSFET, the current sensing is disabled during the initial phase of the conduction time. This avoids an erroneous detection of a fault condition. This interval is generally known as “masking time” or “blanking time”. The masking time is about 200 ns.

When the overcurrent is detected, two different behaviors are possible depending on the operating condition.

1.Output voltage in regulation. When the overcurrent is sensed, the power MOSFET is

switched off and the internal reference (VREF), that biases the non-inverting input of the error amplifier, is set to zero and kept in this condition for a soft start time (TSS, 2048 clock cycles). After this time, a new soft start phase takes place and the internal reference begins ramping (see Figure 8.a).

2.Soft start phase. If the overcurrent limit is reached the power MOSFET is turned off implementing the pulse by pulse overcurrent protection. During the soft start phase, under overcurrent condition, the device can skip pulses in order to keep the output current constant and equal to the current limit. If at the end of the “masking time” the current is higher than the overcurrent threshold, the power MOSFET is turned off and it will skip one pulse. If, at the next switching on at the end of the “masking time” the current is still higher than the threshold, the device will skip two pulses. This mechanism is repeated and the device can skip up to seven pulses. While, if at the end of the “masking time” the current is lower than the overcurrent threshold, the number of skipped cycles is decreased of one unit. At the end of soft start phase the output voltage is in regulation and if the overcurrent persists the behavior explained above takes place. (see Figure 8.b)

So the overcurrent protection can be summarized as an “hiccup” intervention when the output is in regulation and a constant current during the soft start phase. If the output is shorted to ground when the output voltage is on regulation, the overcurrent is triggered and the device starts cycling with a period of 2048 clock cycles between “hiccup” (power MOSFET off and no current to the load) and “constant current” with very short on-time and with reduced switching frequency (up to one eighth of normal switching frequency). See Figure 32. for short circuit behavior.

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Functional description	L7980

Figure 8. Overcurrent protection strategy

5.5Enable function

The enable feature allows to put in stand-by mode the device.With EN pin lower than 0.3V the device is disabled and the power consumption is reduced to less than 30 µA. With EN pin lower than 1.2 V, the device is enabled. If the EN pin is left floating, an internal pull down ensures that the voltage at the pin reaches the inhibit threshold and the device is disabled. The pin is also VCC compatible.

5.6Hysteretic thermal shutdown

The thermal shutdown block generates a signal that turns off the power stage if the junction temperature goes above 150°C. Once the junction temperature goes back to about 130°C, the device restarts in normal operation. The sensing element is very close to the PDMOS area, so ensuring an accurate and fast temperature detection.

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