ST L6728D User Manual

L6728D

Single-phase PWM controller with Power Good

Features

Flexible power supply from 5 V to 12 V

Power conversion input as low as 1.5 V

0.8 V internal reference

0.8% output voltage accuracy

High-current integrated drivers

Power Good output

Sensorless and programmable OCP across low-side RDS(on)

OV / UV protection

VSEN disconnection protection

Oscillator internally fixed at 300 kHz

LSLess to manage pre-bias startup

Adjustable output voltage

Disable function

Internal soft-start

DFN10 package

Applications

Memory and termination supply

Subsystem power supply (MCH, IOCH, PCI, etc.)

CPU and DSP power supply

Distributed power supply

General DC-DC converters

Table 1. Device summary

DFN10

Description

L6728D is a single-phase step-down controller with integrated high-current drivers that provides complete control logic and protection to simplify the design of general DC-DC converters by using a compact DFN10 package.

Device flexibility allows the management of conversions with power input (VIN) as low as

1.5 V, and device supply voltage ranging from 5 V to 12 V.

The L6728D provides a simple control loop with voltage mode EA. The integrated 0.8 V reference allows output voltages regulation with ±0.8% accuracy over line and temperature variations. The oscillator is internally fixed to 300 kHz.

The L6728D provides programmable dual level overcurrent protection, as well as overvoltage and undervoltage protection. Current information is

monitored across the low-side MOSFET RDS(on), eliminating the need for expensive and space-

consuming sense resistors.

A PGOOD output easily provides real-time information on output voltage status, through the VSEN dedicated output monitor.

Order codes

Package

Packaging

 

 

 

 

L6728D

DFN10

 

Tube

 

 

 

L6728DTR

 

Tape and reel

 

 

 

 

 

 

February 2010

Doc ID 16498

Rev 1

1/33

 

 

 

 

 

 

 

www.st.com

Contents

L6728D

 

 

Contents

1

Typical application circuit and block diagram . . . . . . . . . . . . . . . . . . .

. 4

 

1.1

Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4

 

1.2

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4

2

Pin description and connection diagram . . . . . . . . . . . . . . . . . . . . . . . .

5

 

2.1

Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5

3

Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6

4

Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

 

4.1

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

 

4.2

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

5

Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

9

6

Driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

10

 

6.1

Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

10

7

Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12

 

7.1

Low-side-less startup (LSLess) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

12

8

Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

13

 

8.1

Overcurrent threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14

9

Output voltage setting and protections . . . . . . . . . . . . . . . . . . . . . . . .

15

10

Application details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

16

 

10.1

Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

16

 

10.2

Layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

18

11

Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

20

 

11.1

Inductor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

20

 

11.2

Output capacitor(s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21

 

11.3

Input capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

21

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Contents

12

20 A demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . 22

 

12.1 Board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . 25

12.1.1 Power input (Vin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 12.1.2 Output (Vout) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 12.1.3 Signal input (Vcc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 12.1.4 Test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 12.1.5 Board characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

13

5 A demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

26

 

13.1 Board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

29

13.1.1 Power input (Vin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13.1.2 Output (Vout) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13.1.3 Signal input (Vcc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13.1.4 Test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13.1.5 Board characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

14

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

31

15

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

32

Doc ID 16498 Rev 1

3/33

ST L6728D User Manual

Typical application circuit and block diagram

L6728D

 

 

1 Typical application circuit and block diagram

1.1Application circuit

Figure 1. Typical application circuit of the L6728D

VCC = 5V to 12V

 

 

 

 

 

 

VIN = 1.5V to 12V

 

 

 

 

 

 

 

 

CDEC

 

 

6

 

 

 

 

 

 

RPG

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

PGOOD

 

10

PGOOD

BOOT

 

 

 

 

 

 

 

CHF

CBULK

 

 

 

 

 

 

3

 

 

7

 

L6728A

 

HS

 

 

 

COMP

UGATE

 

 

 

 

 

 

 

 

 

 

 

/ DIS

 

2

L

Vout

 

CF

 

 

 

 

 

 

PHASE

 

 

CP

 

 

 

 

 

 

 

RF

 

L6728D

4

 

 

 

8

 

 

 

LS

COUT

 

 

FB

 

LGATE

 

 

 

 

/ OC

 

 

LOAD

 

 

 

VSEN

GND

 

 

 

ROS

 

RFB

9

 

5

ROCSET

 

 

 

 

ROS

 

RFB

 

 

 

L6728AD Reference Schematic

 

 

 

 

 

 

1.2Block diagram

Figure 2. Block diagram of the L6728D

 

VCC

 

 

 

 

 

VSEN

VOUT MONITOR

 

OC

 

VOCTH

 

 

CONTROL LOGIC

 

 

 

 

 

 

&

 

 

 

 

 

PGOOD

PROTECTIONS

 

 

 

 

 

 

 

 

 

 

BOOT

 

 

 

 

 

 

 

CLOCK

 

CONDUCTION SSCRO

 

HS

UGATE

 

 

ANTI ADAPTIVE

 

 

 

 

 

 

PHASE

 

 

PWM

VCC

 

 

300 kHz

 

 

 

 

OSCILLATOR

 

 

LGATE

 

 

 

LS

 

 

 

 

/ OC

 

ERROR AMPLIFIER

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

+

0.8V

 

 

 

 

A

-

 

 

 

 

 

 

IOCSET

 

 

L6728D

 

 

 

 

 

COMP / DIS

FB

 

 

 

 

4/33

Doc ID 16498 Rev 1

L6728D

Pin description and connection diagram

 

 

2 Pin description and connection diagram

Figure 3. Pin connection (top view)

L6728D

2.1Pin descriptions

Table 2.

Pins description

Pin n°

 

Name

Function

 

 

 

 

1

 

BOOT

HS driver supply. Connect through a capacitor (100 nF) to the floating node (LS-Drain) pin

 

and provide necessary bootstrap diode from VCC.

 

 

 

 

 

 

 

 

 

 

HS driver return path, current-reading and adaptive-dead-time monitor. Connect to the LS

2

 

PHASE

drain to sense RDS(on) drop to measure the output current. This pin is also used by the

 

 

 

adaptive-dead-time control circuitry to monitor when HS MOSFET is OFF.

 

 

 

 

3

 

UGATE

HS driver output. Connect directly to HS MOSFET gate.

 

 

 

 

 

 

 

LGATE: LS driver output. Connect directly to LS MOSFET gate. OC: Overcurrent threshold

 

 

 

set. During a short period of time following VCC rising over the UVLO threshold, a 10 μA

4

LGATE / OC

current is sourced from this pin. Connect to GND with an ROCSET resistor greater than 5 kΩ to

program the OC threshold. The resulting voltage at this pin is sampled and held internally as

 

 

 

the OC set point. The maximum programmable OC threshold is 0.55 V. A voltage greater than

 

 

 

0.6 V activates an internal clamp and causes the OC threshold to be set at the maximum

 

 

 

value.

 

 

 

 

5

 

GND

All internal references, logic and drivers are connected to this pin. Connect to the PCB ground

 

plane.

 

 

 

 

 

 

 

6

 

VCC

Device and driver power supply. Operating range from 5 V to 12 V. Filter with at least 1 µF

 

MLCC to GND.

 

 

 

 

 

 

 

 

 

 

COMP: Error amplifier output. Connect with an RF - CF // CP to FB to compensate the device

7

COMP / DIS

control loop. DIS: The device can be disabled by pushing this pin lower than 0.75 V (typ). By

 

 

 

setting the pin free, the device is enabled again.

 

 

 

 

8

 

FB

Error amplifier inverting input. Connect with a resistor RFB to the output regulated voltage. An

 

 

 

output resistor divider may be used to regulate voltages higher than the reference.

 

 

 

 

 

 

 

Regulated voltage sense pin for OVP and UVP protection and PGOOD. Connect to the output

9

 

VSEN

regulated voltage, or to the output resistor divider if the regulated voltage is higher than the

 

 

 

reference.

 

 

 

 

 

 

 

Open drain output set free after SS has finished and pulled low when VSEN is outside the

10

 

PGOOD

relative window. Pull up to a voltage equal or lower than VCC. If not used it can be left

 

 

 

floating.

 

 

 

 

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5/33

Thermal data

L6728D

 

 

3

Thermal data

 

 

 

Table 3.

Thermal data

 

 

 

Symbol

Parameter

Value

Unit

 

 

 

 

 

 

Rth(JA)

Thermal resistance junction-to-ambient

45

°C/W

 

(device soldered on 2s2p, 67 mm x 69 mm board)

 

 

 

 

 

 

 

 

 

 

Rth(JC)

Thermal resistance junction-to-case

5

°C/W

 

TMAX

Maximum junction temperature

150

°C

 

TSTG

Storage temperature range

-40 to 150

°C

 

TJ

Junction temperature range

-40 to 125

°C

 

PTOT

Maximum power dissipation at TA = 25 °C

2.25

W

6/33

Doc ID 16498 Rev 1

L6728D

Electrical specifications

 

 

4 Electrical specifications

4.1Absolute maximum ratings

Table 4.

Absolute maximum ratings

 

 

Symbol

 

Parameter

Value

Unit

 

 

 

 

 

VCC

 

to GND

-0.3 to 15

V

 

 

 

 

 

 

 

to PHASE

15

 

VBOOT, VUGATE

to GND

33

V

 

 

to GND; t < 200 ns

45

 

 

 

 

 

 

VPHASE

 

to GND

-5 to 18

V

 

to GND; t < 200 ns

-8 to 30

 

 

 

 

 

 

 

 

VLGATE

 

to GND

-0.3 to VCC+0.3

V

 

 

FB, COMP, VSEN to GND

-0.3 to 3.6

V

 

 

 

 

 

 

 

PGOOD to GND

-0.3 to VCC+0.3

V

 

 

 

 

 

4.2Electrical characteristics

 

VCC = 5 V to 12 V; TJ = 0 to 70 °C unless otherwise specified

 

 

 

 

Table 5.

Electrical characteristics

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

Parameter

 

Test conditions

 

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

 

Supply current and power-ON

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICC

 

VCC supply current

 

UGATE and LGATE = OPEN

 

 

6

 

mA

IBOOT

 

BOOT supply current

 

UGATE = OPEN; PHASE to GND

 

 

0.7

 

mA

UVLO

 

VCC Turn-ON

 

VCC rising

 

 

 

4.1

V

 

 

 

 

 

 

 

 

 

 

Hysteresis

 

 

 

 

0.2

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Oscillator

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FSW

 

Main oscillator accuracy

 

 

 

270

300

330

kHz

VOSC

 

PWM ramp amplitude

 

 

 

 

1.4

 

V

dMAX

 

Maximum duty cycle

 

 

 

80

 

 

%

Reference and error amplifier

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Output voltage accuracy

 

 

 

-0.8

-

0.8

%

 

 

 

 

 

 

 

 

 

 

A0

 

DC gain (1)

 

 

 

 

120

 

dB

GBWP

 

Gain-bandwidth product (1)

 

 

 

 

15

 

MHz

SR

 

Slew-rate (1)

 

 

 

 

8

 

V/μs

DIS

 

Disable threshold

 

COMP falling

 

0.70

 

0.85

V

 

 

 

 

 

 

 

 

 

 

Doc ID 16498 Rev 1

7/33

Electrical specifications

 

 

 

 

L6728D

 

 

 

 

 

 

 

 

 

 

Table 5.

Electrical characteristics

(continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

Parameter

 

Test conditions

Min.

Typ.

Max.

 

Unit

 

 

 

 

 

 

 

 

 

 

Gate drivers

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IUGATE

 

HS source current

 

BOOT - PHASE = 5 V

 

1.5

 

 

A

RUGATE

 

HS sink resistance

 

BOOT - PHASE = 5 V

 

1.1

 

 

Ω

ILGATE

 

LS source current

 

VCC = 5 V

 

1.5

 

 

A

RLGATE

 

LS sink resistance

 

VCC = 5 V

 

0.65

 

 

Ω

Overcurrent protection

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOCSET

 

OCSET current source

 

Sourced from LGATE pin, during OC

9

10

11

 

μA

 

 

setting phase.

 

VOC_SW

 

OC switch-over threshold

 

VLGATE/OC rising

 

600

 

 

mV

Over and undervoltage protections

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OVP

 

OVP threshold

 

VSEN rising

0.970

1.000

1.030

 

V

 

 

 

 

 

 

 

 

 

 

un-latch, VSEN falling

0.35

0.40

0.45

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

UVP

 

UVP threshold

 

VSEN falling

0.570

0.600

0.630

 

V

 

 

 

 

 

 

 

 

 

 

VSEN

 

VSEN bias current

 

Sourced from VSEN

 

100

 

 

nA

 

 

 

 

 

 

 

 

 

 

PGOOD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PGOOD

 

Upper threshold

 

VSEN rising

0.860

0.890

0.920

 

V

 

 

 

 

 

 

 

 

 

 

Lower threshold

 

VSEN falling

0.680

0.710

0.740

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VPGOODL

 

PGOOD voltage low

 

IPGOOD = -4 mA

 

 

0.4

 

V

1. Guaranteed by design, not subject to test.

8/33

Doc ID 16498 Rev 1

L6728D

Device description

 

 

5 Device description

The L6728D is a single-phase PWM controller with embedded high-current drivers which provides complete control logic and protection features for easy implementation of a general DC-DC step-down converter. Designed to drive N-channel MOSFETs in a synchronous buck topology, this 10-pin device provides a high level of integration to allow a reduction in cost and size of power supply solutions, while also providing real-time PGOOD in a compact DFN10 3x3 mm package.

The L6728D is designed to operate from a 5 V or 12 V supply. The output voltage can be precisely regulated to as low as 0.8 V with ±0.8% accuracy over line and temperature variations. The switching frequency is internally set to 300 kHz.

This device provides a simple control loop with a voltage-mode error amplifier. The error amplifier features a 15 MHz gain-bandwidth product and 8 V/µs slew rate, allowing high regulator bandwidth for fast transient response.

To prevent load damage, the L6728D provides protection against overcurrent, overvoltage, undervoltage and feedback disconnection. The overcurrent trip threshold is programmable using a resistor connected from Lgate to GND. Output current is monitored across the low-

side MOSFET RDS(on), eliminating the need for expensive and space-consuming sense resistors. Output voltage is monitored through the dedicated VSEN pin.

The L6728D implements soft-start by increasing the internal reference in closed-loop regulation. The low side-less feature allows the device to perform soft-start over a prebiased output, avoiding high current return through the output inductor and dangerous negative spike at the load side.

The L6728D is available in a compact DFN10 3x3 mm package with exposed pad.

Doc ID 16498 Rev 1

9/33

Driver section

L6728D

 

 

6 Driver section

The integrated high-current drivers permit the use of different types of power MOSFETs

(also multiple MOSFETs to reduce the equivalent RDS(on)), maintaining fast switching transition.

The driver for the high-side MOSFET uses the BOOT pin for supply and the PHASE pin for return. The driver for low-side MOSFET uses the VCC pin for supply and the GND pin for return.

The controller embodies an anti-shoot-through and adaptive dead-time control to minimize low side body diode conduction time, maintaining good efficiency while eliminating the need for a Schottky diode:

to check the high-side MOSFET turn-off, the PHASE pin is sensed. When the voltage at the PHASE pin drops, the low-side MOSFET gate drive is suddenly applied

to check the low-side MOSFET turn-off, the LGATE pin is sensed. When the voltage at LGATE has fallen, the high-side MOSFET gate drive is suddenly applied

If the current flowing in the inductor is negative, voltage on the PHASE pin will never drop. To allow the low-side MOSFET to turn on even in this case, a watchdog controller is enabled. If the source of the high-side MOSFET does not drop, the low side MOSFET is switched on, thereby allowing the negative current of the inductor to recirculate. This mechanism allows the system to regulate even if the current is negative.

Power conversion input is flexible: 5 V, 12 V bus or any bus that allows the conversion (see maximum duty cycle limitations) to be chosen freely.

6.1Power dissipation

The L6728D embeds high current MOSFET drivers for both high side and low side MOSFETs. It is therefore important to consider the power that the device is going to dissipate in driving them, in order to avoid overcoming the maximum junction operating temperature.

Two main factors contribute to device power dissipation: bias power and driver power.

Device bias power (PDC) depends on the static consumption of the device through the supply pins, and is quantifiable as follows (assuming HS and LS drivers with the same VCC of the device):

PDC = VCC (ICC + IBOOT)

Driver power is the power needed by the driver to continuously switch on and off the external MOSFETs. It is a function of the switching frequency and total gate charge of

the selected MOSFETs. It can be quantified considering that the total power PSW dissipated to switch the MOSFETs (easily calculable) is dissipated by three main factors: external gate resistance (when present), intrinsic MOSFET resistance and intrinsic driver resistance. This last factor is the most important one to be determined to calculate the device power dissipation. The total power dissipated to switch the MOSFETs is:

PSW = FSW (QgHS VBOOT + QgLS VCC)

10/33

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