L6728D
Single-phase PWM controller with Power Good
Features
■Flexible power supply from 5 V to 12 V
■Power conversion input as low as 1.5 V
■0.8 V internal reference
■0.8% output voltage accuracy
■High-current integrated drivers
■Power Good output
■Sensorless and programmable OCP across low-side RDS(on)
■OV / UV protection
■VSEN disconnection protection
■Oscillator internally fixed at 300 kHz
■LSLess to manage pre-bias startup
■Adjustable output voltage
■Disable function
■Internal soft-start
■DFN10 package
Applications
■Memory and termination supply
■Subsystem power supply (MCH, IOCH, PCI, etc.)
■CPU and DSP power supply
■Distributed power supply
■General DC-DC converters
DFN10
Description
L6728D is a single-phase step-down controller with integrated high-current drivers that provides complete control logic and protection to simplify the design of general DC-DC converters by using a compact DFN10 package.
Device flexibility allows the management of conversions with power input (VIN) as low as
1.5 V, and device supply voltage ranging from 5 V to 12 V.
The L6728D provides a simple control loop with voltage mode EA. The integrated 0.8 V reference allows output voltages regulation with ±0.8% accuracy over line and temperature variations. The oscillator is internally fixed to 300 kHz.
The L6728D provides programmable dual level overcurrent protection, as well as overvoltage and undervoltage protection. Current information is
monitored across the low-side MOSFET RDS(on), eliminating the need for expensive and space-
consuming sense resistors.
A PGOOD output easily provides real-time information on output voltage status, through the VSEN dedicated output monitor.
Order codes |
Package |
Packaging |
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L6728D |
DFN10 |
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Tube |
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L6728DTR |
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Tape and reel |
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February 2010 |
Doc ID 16498 |
Rev 1 |
1/33 |
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www.st.com |
Contents |
L6728D |
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Contents
1 |
Typical application circuit and block diagram . . . . . . . . . . . . . . . . . . . |
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1.1 |
Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
4 |
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1.2 |
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
4 |
2 |
Pin description and connection diagram . . . . . . . . . . . . . . . . . . . . . . . . |
5 |
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2.1 |
Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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3 |
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4 |
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.1 |
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.2 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5 |
Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6 |
Driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.1 |
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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7 |
Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
12 |
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7.1 |
Low-side-less startup (LSLess) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
12 |
8 |
Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8.1 |
Overcurrent threshold setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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9 |
Output voltage setting and protections . . . . . . . . . . . . . . . . . . . . . . . . |
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Application details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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10.1 |
Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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10.2 |
Layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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11 |
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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11.1 |
Inductor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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11.2 |
Output capacitor(s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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11.3 |
Input capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
21 |
2/33 |
Doc ID 16498 Rev 1 |
L6728D |
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Contents |
12 |
20 A demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . 22 |
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12.1 Board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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12.1.1 Power input (Vin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 12.1.2 Output (Vout) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 12.1.3 Signal input (Vcc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 12.1.4 Test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 12.1.5 Board characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
13 |
5 A demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
26 |
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13.1 Board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
29 |
13.1.1 Power input (Vin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13.1.2 Output (Vout) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13.1.3 Signal input (Vcc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13.1.4 Test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 13.1.5 Board characterization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
14 |
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
31 |
15 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
32 |
Doc ID 16498 Rev 1 |
3/33 |
Typical application circuit and block diagram |
L6728D |
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VCC = 5V to 12V |
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VIN = 1.5V to 12V |
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CDEC |
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6 |
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RPG |
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VCC |
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1 |
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PGOOD |
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10 |
PGOOD |
BOOT |
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CHF |
CBULK |
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3 |
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7 |
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L6728A |
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HS |
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COMP |
UGATE |
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/ DIS |
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L |
Vout |
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CF |
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PHASE |
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CP |
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RF |
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L6728D |
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LS |
COUT |
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FB |
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LGATE |
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/ OC |
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LOAD |
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VSEN |
GND |
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ROS |
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RFB |
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5 |
ROCSET |
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ROS |
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RFB |
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L6728AD Reference Schematic |
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VCC |
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VSEN |
VOUT MONITOR |
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OC |
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VOCTH |
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CONTROL LOGIC |
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PGOOD |
PROTECTIONS |
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BOOT |
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CLOCK |
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CONDUCTION SSCRO |
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HS |
UGATE |
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ANTI ADAPTIVE |
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PHASE |
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PWM |
VCC |
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300 kHz |
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OSCILLATOR |
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LGATE |
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LS |
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/ OC |
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ERROR AMPLIFIER |
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GND |
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+ |
0.8V |
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A |
- |
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IOCSET |
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L6728D |
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COMP / DIS |
FB |
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4/33 |
Doc ID 16498 Rev 1 |
L6728D |
Pin description and connection diagram |
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L6728D
Table 2. |
Pins description |
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Pin n° |
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Name |
Function |
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1 |
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BOOT |
HS driver supply. Connect through a capacitor (100 nF) to the floating node (LS-Drain) pin |
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and provide necessary bootstrap diode from VCC. |
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HS driver return path, current-reading and adaptive-dead-time monitor. Connect to the LS |
2 |
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PHASE |
drain to sense RDS(on) drop to measure the output current. This pin is also used by the |
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adaptive-dead-time control circuitry to monitor when HS MOSFET is OFF. |
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3 |
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UGATE |
HS driver output. Connect directly to HS MOSFET gate. |
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LGATE: LS driver output. Connect directly to LS MOSFET gate. OC: Overcurrent threshold |
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set. During a short period of time following VCC rising over the UVLO threshold, a 10 μA |
4 |
LGATE / OC |
current is sourced from this pin. Connect to GND with an ROCSET resistor greater than 5 kΩ to |
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program the OC threshold. The resulting voltage at this pin is sampled and held internally as |
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the OC set point. The maximum programmable OC threshold is 0.55 V. A voltage greater than |
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0.6 V activates an internal clamp and causes the OC threshold to be set at the maximum |
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value. |
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5 |
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GND |
All internal references, logic and drivers are connected to this pin. Connect to the PCB ground |
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plane. |
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6 |
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VCC |
Device and driver power supply. Operating range from 5 V to 12 V. Filter with at least 1 µF |
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MLCC to GND. |
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COMP: Error amplifier output. Connect with an RF - CF // CP to FB to compensate the device |
7 |
COMP / DIS |
control loop. DIS: The device can be disabled by pushing this pin lower than 0.75 V (typ). By |
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setting the pin free, the device is enabled again. |
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8 |
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FB |
Error amplifier inverting input. Connect with a resistor RFB to the output regulated voltage. An |
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output resistor divider may be used to regulate voltages higher than the reference. |
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Regulated voltage sense pin for OVP and UVP protection and PGOOD. Connect to the output |
9 |
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VSEN |
regulated voltage, or to the output resistor divider if the regulated voltage is higher than the |
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reference. |
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Open drain output set free after SS has finished and pulled low when VSEN is outside the |
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PGOOD |
relative window. Pull up to a voltage equal or lower than VCC. If not used it can be left |
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floating. |
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Doc ID 16498 Rev 1 |
5/33 |
Thermal data |
L6728D |
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3 |
Thermal data |
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Table 3. |
Thermal data |
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Symbol |
Parameter |
Value |
Unit |
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Rth(JA) |
Thermal resistance junction-to-ambient |
45 |
°C/W |
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(device soldered on 2s2p, 67 mm x 69 mm board) |
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Rth(JC) |
Thermal resistance junction-to-case |
5 |
°C/W |
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TMAX |
Maximum junction temperature |
150 |
°C |
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TSTG |
Storage temperature range |
-40 to 150 |
°C |
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TJ |
Junction temperature range |
-40 to 125 |
°C |
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PTOT |
Maximum power dissipation at TA = 25 °C |
2.25 |
W |
6/33 |
Doc ID 16498 Rev 1 |
L6728D |
Electrical specifications |
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4.1Absolute maximum ratings
Table 4. |
Absolute maximum ratings |
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Symbol |
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Parameter |
Value |
Unit |
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VCC |
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to GND |
-0.3 to 15 |
V |
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to PHASE |
15 |
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VBOOT, VUGATE |
to GND |
33 |
V |
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to GND; t < 200 ns |
45 |
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VPHASE |
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to GND |
-5 to 18 |
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to GND; t < 200 ns |
-8 to 30 |
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VLGATE |
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to GND |
-0.3 to VCC+0.3 |
V |
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FB, COMP, VSEN to GND |
-0.3 to 3.6 |
V |
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PGOOD to GND |
-0.3 to VCC+0.3 |
V |
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4.2Electrical characteristics
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VCC = 5 V to 12 V; TJ = 0 to 70 °C unless otherwise specified |
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Table 5. |
Electrical characteristics |
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Symbol |
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Parameter |
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Test conditions |
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Min. |
Typ. |
Max. |
Unit |
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Supply current and power-ON |
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ICC |
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VCC supply current |
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UGATE and LGATE = OPEN |
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mA |
IBOOT |
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BOOT supply current |
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UGATE = OPEN; PHASE to GND |
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0.7 |
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mA |
UVLO |
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VCC Turn-ON |
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VCC rising |
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4.1 |
V |
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Hysteresis |
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0.2 |
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V |
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Oscillator |
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FSW |
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Main oscillator accuracy |
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270 |
300 |
330 |
kHz |
VOSC |
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PWM ramp amplitude |
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1.4 |
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V |
dMAX |
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Maximum duty cycle |
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80 |
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% |
Reference and error amplifier |
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Output voltage accuracy |
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-0.8 |
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0.8 |
% |
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A0 |
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DC gain (1) |
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120 |
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dB |
GBWP |
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Gain-bandwidth product (1) |
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15 |
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MHz |
SR |
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Slew-rate (1) |
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8 |
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V/μs |
DIS |
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Disable threshold |
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COMP falling |
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0.70 |
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0.85 |
V |
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Doc ID 16498 Rev 1 |
7/33 |
Electrical specifications |
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L6728D |
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Table 5. |
Electrical characteristics |
(continued) |
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Symbol |
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Parameter |
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Test conditions |
Min. |
Typ. |
Max. |
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Unit |
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Gate drivers |
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IUGATE |
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HS source current |
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BOOT - PHASE = 5 V |
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1.5 |
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A |
RUGATE |
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HS sink resistance |
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BOOT - PHASE = 5 V |
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1.1 |
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Ω |
ILGATE |
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LS source current |
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VCC = 5 V |
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1.5 |
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A |
RLGATE |
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LS sink resistance |
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VCC = 5 V |
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0.65 |
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Ω |
Overcurrent protection |
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IOCSET |
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OCSET current source |
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Sourced from LGATE pin, during OC |
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10 |
11 |
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μA |
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setting phase. |
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VOC_SW |
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OC switch-over threshold |
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VLGATE/OC rising |
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600 |
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mV |
Over and undervoltage protections |
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OVP |
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OVP threshold |
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VSEN rising |
0.970 |
1.000 |
1.030 |
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V |
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un-latch, VSEN falling |
0.35 |
0.40 |
0.45 |
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V |
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UVP |
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UVP threshold |
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VSEN falling |
0.570 |
0.600 |
0.630 |
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V |
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VSEN |
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VSEN bias current |
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Sourced from VSEN |
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100 |
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nA |
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PGOOD |
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PGOOD |
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Upper threshold |
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VSEN rising |
0.860 |
0.890 |
0.920 |
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V |
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Lower threshold |
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VSEN falling |
0.680 |
0.710 |
0.740 |
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V |
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VPGOODL |
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PGOOD voltage low |
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IPGOOD = -4 mA |
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0.4 |
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V |
1. Guaranteed by design, not subject to test.
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Doc ID 16498 Rev 1 |
L6728D |
Device description |
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The L6728D is a single-phase PWM controller with embedded high-current drivers which provides complete control logic and protection features for easy implementation of a general DC-DC step-down converter. Designed to drive N-channel MOSFETs in a synchronous buck topology, this 10-pin device provides a high level of integration to allow a reduction in cost and size of power supply solutions, while also providing real-time PGOOD in a compact DFN10 3x3 mm package.
The L6728D is designed to operate from a 5 V or 12 V supply. The output voltage can be precisely regulated to as low as 0.8 V with ±0.8% accuracy over line and temperature variations. The switching frequency is internally set to 300 kHz.
This device provides a simple control loop with a voltage-mode error amplifier. The error amplifier features a 15 MHz gain-bandwidth product and 8 V/µs slew rate, allowing high regulator bandwidth for fast transient response.
To prevent load damage, the L6728D provides protection against overcurrent, overvoltage, undervoltage and feedback disconnection. The overcurrent trip threshold is programmable using a resistor connected from Lgate to GND. Output current is monitored across the low-
side MOSFET RDS(on), eliminating the need for expensive and space-consuming sense resistors. Output voltage is monitored through the dedicated VSEN pin.
The L6728D implements soft-start by increasing the internal reference in closed-loop regulation. The low side-less feature allows the device to perform soft-start over a prebiased output, avoiding high current return through the output inductor and dangerous negative spike at the load side.
The L6728D is available in a compact DFN10 3x3 mm package with exposed pad.
Doc ID 16498 Rev 1 |
9/33 |
Driver section |
L6728D |
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The integrated high-current drivers permit the use of different types of power MOSFETs
(also multiple MOSFETs to reduce the equivalent RDS(on)), maintaining fast switching transition.
The driver for the high-side MOSFET uses the BOOT pin for supply and the PHASE pin for return. The driver for low-side MOSFET uses the VCC pin for supply and the GND pin for return.
The controller embodies an anti-shoot-through and adaptive dead-time control to minimize low side body diode conduction time, maintaining good efficiency while eliminating the need for a Schottky diode:
●to check the high-side MOSFET turn-off, the PHASE pin is sensed. When the voltage at the PHASE pin drops, the low-side MOSFET gate drive is suddenly applied
●to check the low-side MOSFET turn-off, the LGATE pin is sensed. When the voltage at LGATE has fallen, the high-side MOSFET gate drive is suddenly applied
If the current flowing in the inductor is negative, voltage on the PHASE pin will never drop. To allow the low-side MOSFET to turn on even in this case, a watchdog controller is enabled. If the source of the high-side MOSFET does not drop, the low side MOSFET is switched on, thereby allowing the negative current of the inductor to recirculate. This mechanism allows the system to regulate even if the current is negative.
Power conversion input is flexible: 5 V, 12 V bus or any bus that allows the conversion (see maximum duty cycle limitations) to be chosen freely.
The L6728D embeds high current MOSFET drivers for both high side and low side MOSFETs. It is therefore important to consider the power that the device is going to dissipate in driving them, in order to avoid overcoming the maximum junction operating temperature.
Two main factors contribute to device power dissipation: bias power and driver power.
●Device bias power (PDC) depends on the static consumption of the device through the supply pins, and is quantifiable as follows (assuming HS and LS drivers with the same VCC of the device):
PDC = VCC (ICC + IBOOT)
●Driver power is the power needed by the driver to continuously switch on and off the external MOSFETs. It is a function of the switching frequency and total gate charge of
the selected MOSFETs. It can be quantified considering that the total power PSW dissipated to switch the MOSFETs (easily calculable) is dissipated by three main factors: external gate resistance (when present), intrinsic MOSFET resistance and intrinsic driver resistance. This last factor is the most important one to be determined to calculate the device power dissipation. The total power dissipated to switch the MOSFETs is:
PSW = FSW (QgHS VBOOT + QgLS VCC)
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Doc ID 16498 Rev 1 |