L6726A is a single-phase step-down controller
with integrated high-current drivers that provides
complete control logic, protections and reference
voltage to realize in an easy and simple way
general DC-DC converters by using a compact
SO-8 package.
Device flexibility allows managing conversions
with power input V
supply voltage ranging from 5 V to 12 V.
as low as 1.5 V and device
IN
L6726A provides simple control loop with trans-
Applications
■ Subsystem power supply (MCH, IOCH, PCI...)
■ Memory and termination supply
■ CPU and DSP power supply
■ Distributed power supply
■ General DC / DC converters
conductance error amplifier. The integrated 0.8 V
reference allows regulating output voltage with
±1% accuracy over line and temperature
variations. Oscillator is internally fixed to 270 kHz.
L6726A provides programmable over current
protection. Current information is monitored
across the low-side MOSFET R
saving the
dsON
use of expensive and space-consuming sense
resistors.
FB disconnection protection prevents excessive
and dangerous output voltages in case of floating
FB pin.
Typical application circuit and block diagramL6726A
1 Typical application circuit and block diagram
1.1 Application circuit
Figure 1.Typical application circuit
VCC = 5V to 12V
R
R
FB
OS
VIN = 1.5V to 19V
C
DEC
6
FB
7
COMP
C
C
P
R
/ DIS
F
F
3
GND
5
VCC
UGATE
PHASE
L6726A
BOOT
LGATE
/ OC
D
R
D
1
C
BOOT
2
R
R
R
OCSET
gHS
gLS
8
4
HS
LS
C
HF
L
R
SN
C
SN
C
C
(1)
BULK
Vout
OUT
LOAD
L6726A Reference Schematic
(1) Up to 12V with Vcc > 5V
1.2 Block diagram
Figure 2.Block diagram
SS
I
OSCILLATOR
L6726A
VCC
CONTROL LOGIC
& PROTECTIONS
CLOCK
TRANSCONDUCTANCE
ERROR AMPLIFIER
DISABLE
Q
S
R
+
-
OCP
PWM
0.8V
V
OCTH
CROSS CONDUCTION
ADAPTIVE ANTI
I
HS
VCC
LS
OCSET
BOOT
UGATE
PHASE
LGATE
/ OC
GND
/ DIS
COMP
4/35Doc ID 12754 Rev 4
FB
L6726APins description and connection diagrams
2 Pins description and connection diagrams
Figure 3.Pins connection (top view)
LGATE / OC
2.1 Pin descriptions
Table 2.Pins descriptions
Pin nNameFunction
1BOOT
2UGATEHS driver output. Connect to HS MOSFET gate.
3GND
4LGATE / OC
BOOT
UGATE
GND
HS driver supply.
Connect through a capacitor (100 nF) to the floating node (LS-drain) pin
and provide necessary bootstrap diode from VCC.
All internal references, logic and drivers are connected to this pin.
Connect to the PCB ground plane.
LGATE. LS driver output. Connect to LS MOSFET gate.
OC. Over current threshold set. During a short period of time following VCC
rising over UVLO threshold, a 10μA current is sourced from this pin.
Connect to GND with an R
Threshold. The resulting voltage at this pin is sampled and held internally
as the OC set point. Maximum programmable OC threshold is 0.55 V. A
voltage greater than 0.75V (max) activates an internal clamp and causes
OC threshold to be set at 400 mV. R
default threshold.
1
2
L6726A
3
4
8
PHASE
7
COMP / DIS
6
FB
5
VCC
resistor greater than 5kΩ to program OC
OCSET
not connected sets the 400 mV
OCSET
5VCC
6FB
7COMP / DIS
8PHASE
Device and LS driver power supply.
Operative range from 4.1 V to 13.2 V. Filter with at least 1μF MLCC to GND.
Error amplifier inverting input.
Connect with a resistor R
resistor R
reference.
COMP. Error amplifier output. Connect with an R
compensate the device control loop in conjunction to the FB pin.
During the soft-start phase, a 10 μA current is sourced from this pin so the
compensation capacitors also act to program the SS time.
DIS. The device can be disabled by pulling this pin lower than 0.4 V (min).
Setting free the pin, the device enables again.
HS driver return path, current-reading and adaptive-dead-time monitor.
Connect to the LS drain to sense R
This pin is also used by the adaptive-dead-time control circuitry to monitor
when HS MOSFET is OFF.
to the output regulated voltage. Additional
to GND may be used to regulate voltages higher than the
OS
Doc ID 12754 Rev 45/35
FB
- CF // CP to GND to
F
drop to measure the output current.
dsON
Pins description and connection diagramsL6726A
2.2 Thermal data
Table 3.Thermal data
SymbolParameterValue Unit
R
thJA
T
MAX
T
STG
T
J
1. Measured with the component mounted on a 2S2P board in free air (6.7 cm x 6.7 cm, 35 μm (P) and
17.5 μm (S) copper thickness).
Thermal resistance junction to ambient
Maximum junction temperature150°C
Storage temperature range-40 to 150°C
Junction temperature range-20 to 150°C
(1)
85°C/W
6/35Doc ID 12754 Rev 4
L6726AElectrical specifications
3 Electrical specifications
3.1 Absolute maximum ratings
Table 4.Absolute maximum ratings
SymbolParameter ValueUnit
V
V
BOOT
V
UGATE
V
PHASE
V
LGATE
CC
to GND-0.3 to 15V
to PHASE
to GND
to PHASE
to PHASE; t < 50ns
to GND
-0.3 to (V
BOOT
V
BOOT
15
45
- V
-1
+ 0.3
PHASE)
+ 0.3
to GND-8 to 30V
to GND
to GND; t < 50ns
-0.3 to V
-2.5
CC
+ 0.3
FB, COMP to GND-0.3 to 3.6V
3.2 Electrical characteristics
VCC = 12 V; TA = -20 °C to +85 °C unless otherwise specified.
CC
IN
Device supply voltage
Conversion input voltage
See Figure 1
< 7.0 V
V
CC
4.113.2V
13.2V
19.0V
Table 5.Electrical characteristics
SymbolParameterTest conditionsMin.Typ.Max.Unit
Recommended operating conditions
V
V
V
V
V
Supply current and power-ON
I
CC
I
BOOT
VCC supply currentUGATE and LGATE = OPEN6mA
BOOT supply currentUGATE = OPEN; PHASE to GND0.5mA
UVLOVCC Turn-ONVCC rising4.1V
Hysteresis0.2V
Oscillator
T
F
SW
Main oscillator accuracy
= 0 °C to +70 °C243270297
A
225270315
ΔV
d
OSC
MAX
PWM ramp amplitude1.1V
Maximum duty cycle80%
Doc ID 12754 Rev 47/35
kHz
Electrical specificationsL6726A
Table 5.Electrical characteristics (continued)
SymbolParameterTest conditionsMin.Typ.Max.Unit
Reference
V
= 0.8 V, TA = 0 °C to 70 °C-1-1
Output voltage accuracy
Transconductance error amplifier
gmTransconductance
I
FB
A
F
I
COMP
0
0
Input bias currentSourced from FB100nA
Open loop gain
Unity gain
(1)
Current capability
(1)
(1)
Soft-Start and disable
OUT
= 0.8 V-1.5-1.5
V
OUT
%
5mS
70dB
4MHz
Source current360μA
Sink current-360μA
I
SS
Soft-start currentFrom COMP pin10μA
DISDisable thresholdCOMP falling0.40.5V
Gate drivers
I
UGATE
R
UGATE
I
LGATE
R
LGATE
HS source currentBOOT - PHASE = 5 V to 12 V1.5A
HS sink resistanceBOOT - PHASE = 5 V to 12 V1.1Ω
LS source currentVCC = 5 V to 12 V1.5A
LS sink resistanceVCC = 5 V to 12 V0.65Ω
Over-current protection
I
OCSET
V
OC_SW
V
OCTH_FIXED
1. Guaranteed by design, not subject to test.
OCSET current source
OC switch-over thresholdV
Fixed OC thresholdV
Sourced from LGATE pin.
See Section 7.1.1
LGATE/OC
PHASE
rising780mV
to GND-400mV
10μA
8/35Doc ID 12754 Rev 4
L6726ADevice description
4 Device description
L6726A is a single-phase PWM controller with embedded high-current drivers that provides
complete control logic and protections to realize in an easy and simple way a general DCDC step-down converter. Designed to drive N-channel MOSFETs in a synchronous buck
topology, with its high level of integration this 8-pin device allows reducing cost and size of
the power supply solution.
L6726A is designed to operate from a 5 V or 12 V supply bus. Thanks to the high precision
0.8V internal reference, the output voltage can be precisely regulated to as low as 0.8 V with
±1% accuracy over line and temperature variations (between 0 °C and +70 °C). The
switching frequency is internally set to 270 kHz.
This device provides a simple control loop with externally compensated transconductance
error-amplifier and programmable soft start. Low-side-less feature allows the device to
perform soft-start over pre-charged output avoiding negative spikes at the load side.
In order to avoid load damages, L6726A provides programmable threshold over current
protection. Output current is monitored across low-side MOSFET R
expensive and space-consuming sense resistor. L6726A also features FB disconnection
protection, preventing dangerous uncontrolled output voltages in case of floating FB pin.
, saving the use of
dsON
Doc ID 12754 Rev 49/35
Driver sectionL6726A
5 Driver section
The integrated high-current drivers allow using different types of power MOSFET (also
multiple MOSFETs to reduce the equivalent R
The driver for high-side MOSFET uses BOOT pin for supply and PHASE pin for return. The
driver for low-side MOSFET uses the VCC pin for supply and GND pin for return.
The controller embodies an anti-shoot-through and adaptive dead-time control to minimize
low side body diode conduction time, maintaining good efficiency while saving the use of
Schottky diode:
●to check for high-side MOSFET turn off, PHASE pin is sensed. When the voltage at
PHASE pin drops down, the low-side MOSFET gate drive is suddenly applied;
●to check for low-side MOSFET turn off, LGATE pin is sensed. When the voltage at
LGATE has fallen, the high-side MOSFET gate drive is suddenly applied.
If the current flowing in the inductor is negative, voltage on PHASE pin will never drop. To
allow the low-side MOSFET to turn-on even in this case, a watchdog controller is enabled: if
the source of the high-side MOSFET doesn't drop, the low side MOSFET is switched on so
allowing the negative current of the inductor to recirculate. This mechanism allows the
system to regulate even if the current is negative.
), maintaining fast switching transition.
dsON
Power conversion input is flexible: 5 V, 12 V bus or any bus that allows the conversion (See
maximum duty cycle limitation and recommended operating conditions) can be chosen
freely.
10/35Doc ID 12754 Rev 4
L6726ADriver section
5.1 Power dissipation
L6726A embeds high current MOSFET drivers for both high side and low side MOSFETs: it
is then important to consider the power that the device is going to dissipate in driving them
in order to avoid overcoming the maximum junction operative temperature.
Two main terms contribute in the device power dissipation: bias power and drivers power.
●Device bias power (P
supply pins and it is simply quantifiable as follow (assuming to supply HS and LS
drivers with the same VCC of the device):
) depends on the static consumption of the device through the
DC
P
DC
●Drivers power is the power needed by the driver to continuously switch on and off the
external MOSFETs; it is a function of the switching frequency, the voltage supply of the
driver and total gate charge of the selected MOSFETs. It can be quantified considering
that the total power P
dissipated by three main factors: external gate resistance (when present), intrinsic
MOSFET resistance and intrinsic driver resistance. This last term is the important one
to be determined to calculate the device power dissipation. The total power dissipated
to switch the MOSFETs results:
P
SW
where V
External gate resistors helps the device to dissipate the switching power since the same
power P
resulting in a general cooling of the device.
Figure 4.Soft start (left) and disable (right)
will be shared between the internal driver impedance and the external resistor
SW
BOOT
- V
PHASE
dissipated to switch the MOSFETs (easy calculable) is
SW
F
Q
SW
is the voltage across the bootstrap capacitor.
gHS
V
CCICCIBOOT
V
BOOTVPHASE
+()⋅=
–()Q
⋅+⋅[]⋅=
gLSVCC
Doc ID 12754 Rev 411/35
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