ST L6671 User Manual

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HIGH SENSITIVITY 2.5 rad/sec

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7 BIT A/D CONVERTER (+1 SIGN BIT)

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800 Hz BANDWIDTH

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200 rad/sec2 FULL SCALE VALUE

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DIGITAL DOWNSAMPLING

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DIGITAL FI LTE R I N G

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3.3V 3WIRES SERIAL INTERFACE
(5V TOLLERANCE)

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EMBEDDED PLL

L6671

ANGULAR ACCELEROMETER

PRODUCT PREVIEW

2

SO24

ORDERING NUMBER: L6671

DESCRIPTION

The L6671 is a complete rotational accelerometer
system based on a

Σ∆

architecture, followed by a
digital downsampling block and a digital filter, featur­ing high sensitivity, 800 Hz signal bandwidth and a
complete serial port interface for a direct connection

BLOCK DIAGRAM

SENSOR

A/D

CONVERTER

Clk-IN

to microprocessor environment. An embedded PLL
allows internal clock generation from an external syn­chronization signal.

SPE

DIGITAL

FILTER

PLL

SER.

IFC

D00IN1117-Mod

SPD

SPC

July 2001

This is preliminary information on a new product now in development. Details are subject to change without notice.

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L6671

PIN FUNCTION

N°. Pin Name Function Typ. Condition

1 to 6 NC Not Connected

7 Vdd_Analog Analog Voltage Supply 5V Typ.
8 Ref_Cap Reference Voltage Bypass

9 HV_Eprom EPROM Programming Voltage (test mode only) Tied to GND
10 Vdd_Digital Digital Voltage Supply 5V Typ.
11 SPC Serial Port Clock Signal
12 SPD Serial Port Data Signal

19 to 24 NC Not Connected

13 SPE Serial Port Enable Signal
14 CLK_In External Clock / PLL Reference Input
15 Gnd_Digital Digital Ground Pin
16 Funct_Test Self Test
17 Test_ST Test Pin Tied to GND
18 Gnd_Analog Analog Ground Pin

PIN CONNECTIONS

(Top view)

N.C.
N.C.
N.C.
N.C.
N.C.
N.C.

_ANALOG

V

DD

REF_CAP

HV_EPROM FUNCT_TEST

V

_DIGITAL GND_DIGITAL

DD

SPC CLK_IN11 14

2
3
4
5
6
7
8
9
10

D00IN1116Mod

24
23
22
21
20
19
18
17
16
15

1312SPD SPE

N.C.1
N.C.
N.C.
N.C.
N.C.
N.C.
GND_ANALOG
TEST_ST

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ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

L6671

Vdd
Vdd

Analog Max

Digital Max

V

in

Maximum analog supply voltage 7 V
Maximum digital supply voltage 7 V
Voltage Range on SPC, SPE, SPD, CLK_In, Funct_Test -0.3 to Vdd

Dig

+ 0.3

ELECTRICAL CHARACTERISTCS

Symbol Parameter Test Condition Min. Typ. Max. Unit

DC

Vdd
Vdd

Idd

Idd

Analog Max

Digital Max

Analog

Digital

V

ref

V

oh

V

ol

V

ih

Analog Supply Voltage 4.5 5.0 5.5 V
Digital Supply Voltage 4.5 5.0 5.5 V
Analog Circuitry Supply Current 15 mA
Digital Circuitry Supply Current 11 mA
Voltage on Ref_Cap pin 2.25 V

(on SPD and Funct_Test) @

= TBD

I

oh

TBD V

TBD V
TBD V

V

il

TBD V

ADC

ADC SNR (30-800Hz, 4.48MHz

TBD 38 TBD dB

Ext.Clk)
ADC SNR (30-10000Hz,

15 20 TBD dB

4.48MHz Ext.Clk)
Phase error 30-800Hz (relative to a ref.

-30 deg

Accelerometer)

ADC Full Scale 200 rad/

ADC Bandwidth 30-800 Hz
ADC Dynamic Range 38 dB
ADC Differential Linearity TBD
ADC Integral Linearity TBD Full

Mclk Clock Frequency on CLK_In pin TBD MHz

sec

Scale

2

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L6671

SERIAL PORT TIMINGS

Symbol Parameter Test Condition Min. Typ. Max. Unit

Pin SPC

Fpc

TcH

SPC frequency 25pF maximum load Mclk 30 TBD MHz
High clock timeout during packet

4 µs

transmission

Pin SPE

Tec SPE to SPC TBD MHz
Tce SPC to SPE TBD
Twe SPE low TBD

Pin SPD (input)

Tds SPD to SPC TBD ns
Tdh SPC to SPD TBD V

Pin SPD (output)

Tpd SPC to SPD TBD V

Figure 1. Application Diagram

V

CC

GND

C1

22µF

6V

C2

0.22µF

C3

220pF

C4

0.22µF

C5

0.22µF

18

7
8
10

9

17
16
15

14
13
12
11

EXTERNAL CLK / PLL REF.
SPE
SPD
SPC

SERIAL I/O

D00IN1118/MOD

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