ST L6585D User Manual

Combo IC for PFC and ballast control

Features

■ Pre-heating and ignition phases independently

programmable

■ Ignition voltage control

■ Transition mode PFC with over-current

protection

■ Programmable and precise End-of-life

protection compliant with all ballast configurations

■ Auto-adjusting half-bridge over-current control

■ Automatic re-lamp

■ 3% oscillator precision

■ 1.2µs dead time

■ PFC over-voltage protection and feedback

disconnection

■ Under voltage lock-out

L6585D

SO-20

Applications

■ Electronic ballast

Figure 1. Block diagram

COMP MULT PFCS Vcc

2.5V

2.5V E/A

INV

ZCD

PFG

CTR

EOLR

1.2V

0.7V

3.4V

0.75V

4.63V

+

+ _

_

Vcc

E/A

STARTER

DIS

RELAMP

MULTIP LIER

OPTIMIZER

OL

PFSTOP

OL

OVP

2V

and THD

S

EOLP

R

Q

COMPARATOR

2V

+

_

PWM

PWM COMP.

COMP.

WINDOW

& REF.

LEB

+

EOL

VCO

OSC EOIRF

1.7V

_

CHOKE

CHOKE SAT.

SAT.

PFSTOP

OVP

DIS

17V

LATCH

1.9V

UV

DETECTION

CONTROL

LOGIC

BOOTSTRAP DIODE

DEAD

TIME

SYNCHRONOUS

DRIVING

LOGIC

HB STOP

TIMING

MANAGEMENT

HVG

DRIVER

LEVEL

SHIFTER

LVG DRIVER

4.6

1.5

1.6V

Vcc

0.9V

Tch

Vcc

BOOT

HSD

OUT

LSD

GND

HBCS

May 2007 Rev 5 1/25

www.st.com

25

Contents L6585D

Contents

1 Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.2 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5.1 Start-up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5.1.1 Pre-heating (time interval A Figure 5) . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5.1.2 Ignition (time interval B Figure 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.1.3 Run mode (time interval C Figure 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

6 End of life – window comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7 Half-bridge current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

8 CTR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

9 Re–lamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

11 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2/25

L6585D Device description

1 Device description

Designed in High-voltage BCD Off-line technology, the L6585D embeds a PFC controller, a half-bridge controller, the relevant drivers and the logic necessary to build an electronic ballast.

The advanced and precise logic circuitry, combined with the programmability of the End-ofLife windows comparator threshold, makes the L6585D compliant with either "lamp-toground" or "block capacitor-to ground" configurations.

Another outstanding feature is the possibility of controlling and limiting the lamp voltage during the ignition phase.

The pre-heating and ignition durations are independently settable as well as the half-bridge switching frequencies for each operating phases (pre-heating, ignition and normal mode).

Other features (half-bridge over-current with frequency increase, PFC over-voltage) allow building a reliable and flexible solution with a reduced part count.

The PFC section achieves current mode control operating in Transition Mode; the highly linear multiplier includes a special circuit, able to reduce AC input current distortion, that allows wide-range-mains operation with an extremely low THD, even over a large load range.

The PFC output voltage is controlled by means of a voltage-mode error amplifier and a precise internal voltage reference.

The driver of the PFC is able to provide 300mA (source) and 600mA (sink) and the drivers of the half-bridge provide 290mA source and 480mA sink.

Figure 2. Typical system block diagram

L

PFC

C

BULK

R

12 3 45

OSC RF EOI

C

OSC

AC MAINS

R

4

PFG

PFCS

MULT

R

SNSPF

13

12

8

GND

4

ZCD

R

2

C

IN

R

3

6

INV

R

RUN

R

5

C

COMP

L6585D

R

PRE

C

IGN

COMP

HV BUS

R

7

91011

Tch

R

D

R

1

R

8

CTR

Vcc

7

17 20

7

17 20

6

EOLP

C

R

D

P

EOL-R

BOOT

19

18

16

1415

Charge

C

HSD

OUT

LSD

HBCS

pump

BOOT

R

SNSHB

L

B

C

RES

C

BLOCK

RES

LAMP

3/25

Pin settings L6585D

2 Pin settings

2.1 Connection

Figure 3. Pin sonnection (Top view)

BOOT

OSC

RF

EOI

TCH

EOLP

EOL-R

CTR

MULT

COMP

INV ZCD

BOOT

HSD

OUT

VCC

LSD

GND

HBCS

PFG

PFCS

4/25

L6585D Pin settings

2.2 Functions

Table 1. Pin functions

Pin num. Name Function

1OSC

2RF

3EOI

4Tch

5EOLP

6EOL-R

7CTR

8MULT

An external capacitor to GND fixes the half-bridge switching frequency with a ±3% precision.

Voltage reference able to source up to 240µA; the current sunk from this pin fixes the switching frequency of the half-bridge for each operating state.

A resistor (R

) connected to ground sets the half-bridge operating frequency

RUN

combined with the capacitor connected to the pin OSC. A resistor connected to EOI (R

) – in parallel with R

PRE

– sets the maximum

RUN

half-bridge switching frequency during pre-heating.

Connected to ground by a capacitor that, combined with R

, determines the

PRE

ignition duration

Pre-heating: low impedance to set high switching frequency Ignition and run mode: high impedance with controlled current sink in case of

HBCS threshold triggering.

Pin for setting the pre-heating time and the protection intervention. Connect a RC parallel network (R Pre-heating: the C

is charged by an internal current generator. When the pin

D

and CD) to ground

D

voltage reaches 4.63V the generator is disabled and the capacitor discharges because of RD; once the voltage drops below 1.52V, the preheating finishes, the ignition phase starts and the R

is discharged to ground.

DCD

Run mode: according to the kind of fault (either over-current or EOL) the internal generator charges the RC parallel network and appropriate actions are taken to stop the application. During proper behavior of the IC, this pin is low impedance.

Pin to program the EOL comparator. It is possible to select both the EOL sensing method and the window comparator

amplitude by connecting a resistor (R

EOLP

) to ground.

Input for the window comparator and re-lamp function. It can be used to detect the lamp ageing for either “lamp to ground” and “block

capacitor to ground” configurations. According to the EOLP pin setting, it is possible to program: – the window amplitude (V

– the center of the window (V

bus.

)

W

) either fixed or in tracking with the PFC output

SET

This function is blanked during the ignition phase. In case of either lamp disconnection or removal, a second threshold (V

SL-UP)

crossing latches the IC and drives the chip in “ready-mode” so that when the voltage at EOL-R pin is brought below V

SL-DOWN

(re-lamp) a new pre-

heating/ignition sequence is repeated.

Input pin for: – PFC over-voltage detection: the PFC driver is stopped until the voltage returns

in the proper operating range – Feedback disconnection detection – reference for End-of-life in case tracking reference; – shut-down: forcing the pin to a voltage lower than 0.75V, the IC shuts down in

unlatched condition.

Main input to the multiplier. This pin is connected to the rectified mains voltage via a resistor divider and provides the sinusoidal reference to the PFC current loop.

5/25

Pin settings L6585D

Table 1. Pin functions (continued)

Pin num. Name Function

Output of the error amplifier. A compensation network is placed between this pin

9COMP

10 INV

11 ZCD

12 PFCS

13 PFG

14 HBCS

15 GND Ground. Current return for both the signal part of the IC and the gate driver.

16 LSD

17 VCC

18 OUT

19 HSD

20 BOOT

and INV to achieve stability of the PFC voltage control loop and ensure high power factor and low THD.

Inverting input of the error amplifier. The information on the output voltage of the PFC pre-regulator is fed into the pin through a resistor divider. Input for the feedback disconnection comparator

Boost inductor’s demagnetization sensing input for PFC transition-mode operation. A negative-going edge triggers PFC MOSFET turn-on.

During start-up or when the voltage is not high enough to arm the internal comparator (e.g. AC Mains peak), the PFC driver is triggered by means of an internal starter.

Input to the PFC PWM comparator. The current flowing in the PFC mosfet is sensed by a resistor; the resulting voltage is applied to this pin and compared with an internal sinusoidal-shaped reference, generated by the multiplier, to determine the PFC MOSFET’ s turn-off.

A second comparison level detects abnormal currents (e.g. due to boost inductor saturation) and, on this occurrence, shuts down and latches the IC reducing its consumption to the start-up.

An internal LEB prevents undesired function triggering.

PFC gate driver output. The totem pole output stage is able to drive power MOSFET’S with a peak current of 300mA source and 600mA sink.

2-levels half-bridge current monitor for current control. The current flowing in the HB mosfet is sensed by a resistor; the resulting

voltage is applied to this pin. Low threshold (active during run mode): in case of thresholds crossing, the IC

reacts with self-adjusting frequency increase in order to limit the half-bridge (lamp) current.

High threshold:

– ignition: in case of thresholds crossing during the frequency shift, the IC reacts

with self-adjusting frequency increase in order to limit the lamp voltage and

preventing operation below resonance. – run mode: in case of thresholds crossing because of current spikes (due e. g.

to capacitive mode / cross-conduction), the L6585D latches to avoid

MOSFETs damaging,

Low side driver output: the output stage can deliver 290mA source and 480mA sink (typ. values).

Supply Voltage of both the signal part of the IC and the gate driver. Clamped with a Zener inside.

High Side Driver Floating Reference. This pin must be connected close to the source of the high side power MOS.

High side driver output: the output stage can deliver 290mA source and 480mA (typ. values).

Bootstrapped Supply Voltage. Between this pin and V must be connected.

A patented integrated circuitry replaces the external bootstrap diode, by means of a high voltage DMOS, synchronously driven with the low side power MOSFET.

, the bootstrap capacitor

CC

6/25

L6585D Electrical data

3 Electrical data

3.1 Maximum ratings

Table 2. Absolute maximum ratings

Symbol Pin Parameter Value Unit

V

BOOT

V

OUT

/dt 18 Floating ground max. slew rate 50 V/ns

dV

OUT

V

CC

20 Floating supply voltage -1 to 618 V

18 Floating ground voltage -3 to V

17 IC Supply voltage (ICC = 20mA)

(1)

Self-limited V

BOOT –

18 V

1, 3, 4,

8, 10, 12Analog input and outputs -0.3 to 5 V

2, 5 -0.3 to 2.7 V

6Vcc

7 -0.3 to 7 V

14 -5 to 5

9, 11 ZCD clamp (I

I

RF

I

EOLP

F

OSC(MAX)

P

TOT

1. The device has an internal Clamping Zener between GND and the VCC pin, it must not be supplied by a Low Impedance Voltage Source.

2 Current capability 240 µA

5 Current capability 100 µA

Maximum operating frequency 250 KHz

Power dissipation @TA = 70°C 0.83 W

< 4mA) Self-limited

ZCD

Note: ESD immunity for pins 18, 19 and 20 is guaranteed up to 900V (Human Body Model)

3.2 Thermal data

Table 3. Thermal data

Symbol Description Value Unit

R

thJA

T

STG

Max. thermal resistance junction to ambient 120 °C/W

Junction operating temperature range -40 to 150 °C

J

Storage temperature -55 to 150 °C

7/25

Electrical characteristics L6585D

4 Electrical characteristics

VCC = 15V, TA = 25°C, CL = 1nF, C

Table 4. Electrical characteristics

= 470pF, R

OSC

= 47K, unless otherwise specified

RUN

Symbol Pin Parameter Test condition Min Typ Max Unit

Supply voltage

Vcc V

V

CC(on)

V

CC(OFF)

VZ V

V

Operating range After turn-on 11 16 V

CC

Turn-on threshold

CC

Turn-off threshold

CC

Zener Voltage Icc = 20mA 16.2 17.2 17.7 V

CC

(1)

13.6 14.3 15 V

9.6 10.3 11 V

Supply current

I

ST-UP

ICC V

Iq V

V

Start-up current Before turn-on @ 13V 250 370 µA

CC

Operating supply current 7 mA

CC

Residual current IC latched 370 µA

CC

PFC section – multiplier input

IMULT MULT Input bias current V

V

∆V

MULT

∆V

MULT

K

CS

M

MULT Linear operation range V

MULT Output max. slope

MULT Gain V

= 0 -1 µA

MULT

= 3V 0 to 3 V

COMP

V

= 0 to 1V,

MULT

V

COMP

MULT

= 1V, V

= Upper clamp

= 3V 0.52 1/V

COMP

0.75 V/V

PFC section – error amplifier

VINV INV

INV Line regulation V

Voltage feedback input threshold

2.45 2.5 2.55 V

= 10.3V to 16V 50 mV

CC

IINV INV Input bias current -1 µA

Gv INV Voltage gain Open loop

GB INV Gain-bandwidth product

ICOMP COMP Source current V

Sink current V

V

COMP

COMP Upper clamp voltage I

Lower clamp voltage I

VDIS INV

Open loop detection threshold

(2)

COMP

SOURCE

SINK

CTR > 3.4 1.2 V

(2)

60 80 dB

1MHz

= 4V, V

= 2.4 V -2.6 mA

INV

= 2.6 V 4 mA

INV

= 0.5 mA 4.2 V

= 0.5 mA 2.25 V

COMP Static OVP threshold 2.1 2.25 2.4 V

8/25