ST L6562A User Manual
Features
■ Proprietary multiplier design for minimum THD
■ Very accurate adjustable output overvoltage
protection
■ Ultra-low (30µA) Start-up current
■ Low (2.5mA) quiescent current
■ Digital leading-edge blanking on current sense
■ Disable function on E/A input
■ 1% (@ T
■ -600/+800mA totem pole gate driver with active
pull-down during UVLO and voltage clamp
■ DIP-8/SO-8 packages
Figure 1. Block diagram
= 25 °C) internal reference voltage
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L6562A
Transition-mode PFC controller
SO-8DIP-8
Applications
PFC pre-regulators for:
■ IEC61000-3-2 compliant SMPS (Flat TV,
monitors, desktop PC, games)
■ HI-END AC-DC adapter/charger up to 400W
■ Electronic ballast
■ Entry level server & web server
Table 1. Device summary
Order codes Package Packaging
L6562AN DIP-8 Tube
L6562AD SO-8 Tube
L6562ADTR SO-8 Tape & Reel
August 2007 Rev 3 1/26
www.st.com
26
Contents L6562A
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
6 Typical electrical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.1 Overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.2 Disable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.3 THD optimizer circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.4 Operating with no auxiliary winding on the boost inductor . . . . . . . . . . . . 16
7.5 Comparison between the L6562A and the L6562 . . . . . . . . . . . . . . . . . . 17
8 Application examples and ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26
L6562A Description
1 Description
The L6562A is a current-mode PFC controller operating in Transition Mode (TM). Coming
with the same pin-out as its predecessors L6561 and L6562, it offers improved performance.
The highly linear multiplier includes a special circuit, able to reduce AC input current
distortion, that allows wide-range-mains operation with an extremely low THD, even over a
large load range.
The output voltage is controlled by means of a voltage-mode error amplifier and an accurate
(1% @T
The device features extremely low consumption (60µA max. before start-up and <5 mA
operating) and includes a disable function suitable for IC remote ON/OFF, which makes it
easier to comply with energy saving requirements (Blue Angel, EnergyStar, Energy2000,
etc.).
An effective two-step OVP enables to safely handle overvoltages either occurring at start-up
or resulting from load disconnection.
The totem-pole output stage, capable of 600 mA source and 800 mA sink current, is suitable
to drive high current MOSFETs or IGBTs. This, combined with the other features and the
possibility to operate with the proprietary Fixed-Off-Time control, makes the device an
excellent low-cost solution for EN61000-3-2 compliant SMPS in excess of 350W.
= 25°C) internal voltage reference.
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3/26
Pin settings L6562A
2 Pin settings
2.1 Pin connection
Figure 2. Pin connection (top view)
2.2 Pin description
Table 2. Pin description
Pin N° Name Description
Inverting input of the error amplifier. The information on the output voltage of
1INV
2COMP
3MULT
the PFC pre-regulator is fed into this pin through a resistor divider. The pin
doubles as an ON/OFF control input.
Output of the error amplifier. A compensation network is placed between this
pin and INV to achieve stability of the voltage control loop and ensure high
power factor and low THD.
Main input to the multiplier. This pin is connected to the rectified mains
voltage via a resistor divider and provides the sinusoidal reference to the
current loop.
INV
COMP
MULT
CS
1
2
3
4
Vcc
8
GD
7
GND
6
ZCD
5
Input to the PWM comparator. The current flowing in the MOSFET is sensed
through a resistor, the resulting voltage is applied to this pin and compared
4CS
5ZCD
6 GND Ground. Current return for both the signal part of the IC and the gate driver.
7GD
8Vcc
4/26
with an internal sinusoidal-shaped reference, generated by the multiplier, to
determine MOSFET’s turn-off. The pin is equipped with 200 ns leading-edge
blanking for improved noise immunity.
Boost inductor’s demagnetization sensing input for transition-mode
operation. A negative-going edge triggers MOSFET’s turn-on.
Gate driver output. The totem pole output stage is able to drive power
MOSFET’s and IGBT’s with a peak current of 600 mA source and 800 mA
sink. The high-level voltage of this pin is clamped at about 12V to avoid
excessive gate voltages in case the pin is supplied with a high Vcc.
Supply Voltage of both the signal part of the IC and the gate driver. The
supply voltage upper limit is extended to 22V min. to provide more headroom
for supply voltage changes.
L6562A Maximum ratings
3 Maximum ratings
Table 3. Absolute maximum ratings
Symbol Pin Parameter Value Unit
V
CC
I
GD
--- 1 to 4 Analog inputs & outputs -0.3 to 8 V
I
ZCD
8 IC supply voltage (ICC ≤ 20mA) Self-limited V
7 Output totem pole peak current Self-limited A
5 Zero current detector max. current ±10 mA
4 Thermal data
Table 4. Thermal data
Symbol Parameter
SO8 DIP8
Val ue
Unit
R
P
T
thJA
TOT
T
J
STG
Max. Thermal Resistance, Junction-toambient
Power Dissipation @TA = 50°C 0.65 1 W
Junction Temperature Operating range -40 to 150 °C
Storage Temperature -55 to 150 °C
150 100 °C/W
5/26
Electrical characteristics L6562A
5 Electrical characteristics
Table 5. Electrical characteristics
( -25°C < T
Symbol Parameter Test condition Min Typ Max Unit
Supply voltage
< +125°C, VCC = 12V, Co = 1nF; unless otherwise specified)
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V
Vcc
Vcc
CC
Operating range After turn-on 10.5 22.5 V
Turn-on threshold
On
Turn-off threshold
Off
(1)
(1)
11.7 12.5 13.3 V
9.5 10 10.5 V
Hys Hysteresis 2.2 2.8 V
V
Z
Zener Voltage
= 20mA
I
CC
22.5 25 28 V
Supply current
I
start-up
I
q
I
CC
I
q
Start-up current
Quiescent current After turn-on 2.5 3.75 mA
Operating supply current @ 70kHz 3.5 5 mA
Quiescent current
Before turn-on, V
CC
= 11V
During OVP (either static or dynamic)
or V
≤150mV
INV
30 60 µA
1.7 2.2 mA
Multiplier input
I
MULT
V
MULT
Vcs∆
---------------------
V
∆
MULT
K
Input bias current
Linear operation range 0 to 3 V
Output max. slope
(2)
Gain
V
MULT
V
MULT
V
COMP
V
MULT
= 1V, V
= 0 to 4V
= 0 to 1V,
= Upper clamp
= 4V,
COMP
-1 µA
11.1 V/V
0.32 0.38 0.44 V
Error amplifier
= 25 °C
V
I
INV
INV
Voltage feedback input
threshold
Line regulation
Input bias current
T
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10.5V < V
V
CC
V
INV
CC
= 10.5V to 22.5V
= 0 to 3V
< 22.5V
(1)
2.475 2.5 2.525
2.455 2.545
25mV
-1 µA
Gv Voltage gain Open loop 60 80 dB
GB Gain-bandwidth product 1 MHz
I
COMP
Source current
Sink current
V
COMP
V
COMP
= 4V, V
= 4V, V
INV
INV
= 2.4V
= 2.6V
-2 -3.5 -5 mA
2.5 4.5 mA
6/26
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L6562A Electrical characteristics
Table 5. Electrical characteristics (continued)
( -25°C < T
Symbol Parameter Test condition Min Typ Max Unit
< +125°C, VCC = 12V, Co = 1nF; unless otherwise specified)
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V
COMP
V
INVdis
V
INVen
Lower clamp voltage
Disable threshold 150 200 250 mV
Restart threshold 380 450 520 mV
Output overvoltage
Upper clamp voltage
I
OVP
Dynamic OVP triggering
current
Hys Hysteresis
Static OVP threshold
Current sense comparator
td
Vcs
I
t
V
LEB
CS
(H-L)
CS
Input bias current
Leading edge blanking 100 200 300 ns
Delay to output 175 ns
Current sense clamp
Current sense offset
offset
I
SOURCE
I
SINK
(3)
(1)
V
V
V
V
= 0.5mA
= 0.5mA
= 0
CS
COMP
MULT
MULT
= 0
= 2.5V
(1)
= Upper clamp, Vmult = 1.5V
5.3 5.7 6 V
2.12.252.4 V
23.5 27 30.5 µA
20 µA
2.12.252.4 V
-1 µA
1.0 1.08 1.16 V
25
mV
5
Zero current detector
V
ZCDH
V
ZCDL
V
ZCDA
V
ZCDT
I
ZCDb
I
ZCDsrc
I
ZCDsnk
Upper clamp voltage
Lower clamp voltage
Arming voltage
(positive-going edge)
Triggering voltage
(negative-going edge)
Input bias current
Source current capability -2.5 mA
Sink current capability 2.5 mA
Starter
t
START
Start timer period 75 190 300 µs
I
ZCD
I
ZCD
(3)
(3)
V
ZCD
= 2.5mA
= - 2.5mA
= 1 to 4.5V
5.0 5.7 6.5 V
-0.3 0 0.3 V
1.4 V
0.7 V
2µA
7/26
Electrical characteristics L6562A
(
−
⋅
Table 5. Electrical characteristics (continued)
( -25°C < T
Symbol Parameter Test condition Min Typ Max Unit
Gate driver
< +125°C, VCC = 12V, Co = 1nF; unless otherwise specified)
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V
OL
V
OH
I
srcpk
I
snkpk
t
t
V
Oclamp
1. All the parameters are in tracking
2. The multiplier output is given by:
3. Parameters guaranteed by design, functionality tested in production.
Output low voltage I
Output high voltage I
= 100mA 0.6 1.2 V
sink
= 5mA 9.8 10.3 V
source
Peak source current -0.6 A
Peak sink current 0.8 A
Voltage fall time 30 70 ns
f
Voltage rise time 60 110 ns
r
Output clamp voltage I
UVLO saturation Vcc = 0 to V
= ⋅
= 5mA; Vcc = 20 V 10 12 15 V
source
, I
CCon
sink
COMPMULTcs
= 2 mA 1.1 V
)
5.2VVK V
8/26
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