The L6560/A is a monolithic integrated circuit in
Minidip and SO8 packages, designed as a controller and driver of a discrete powerMOS transistor for the implementation of active power factor
correction, for sinusoidal line current consumption.
Realized in mixed BCD technology, the chip integrates:
- An undervoltagelockout with micropowerstartup andhyster es i s .
- An internal temperature compensated precise
bandgap reference.
- A stableerroramplifier.
L6560A
POWER FACTOR CORRECTOR
MULTIPOWER BCD TECHNOLOGY
MinidipSO8
ORDERING NUMBERS:
L6560L6560D
L6560AL6560AD
- One quadrant multiplier.
- Current sense comparator.
- An output overvoltage protectioncircuit.
- A totem-pole output stage able to drive a
POWER MOS or IGBT devices with source
and sink current of 400mA. The chip works in
transition mode and is particularly intended
for lamp ballast applications and for low
powerSMPS.
BLOCK DIAGRAM
June 2000
1/11
L6560 - L6560A
ABSOLUTE MAXIMUM RATINGS
SymbolPinParameterValueUnit
cc
I
V
I
GD
INV, COMP
8ICC+I
Z
7Output Totem Pole Peak Current (2µs)
1, 2, 3Analog Inputs & Outputs-0.3 to 7V
MULT
CS4Current Sense Input-0.3 to 7V
ZCD5Zero Current Detector5 (source)
P
tot
Power Dissipation @T
=50°C(Minidip)
amb
(SO8)
T
j
T
stg
Junction Temperature Operating Range-25 to 150°C
Storage Temperature-55 to 150°C
PIN CONNECTION
30mA
700mA
±
10 (sink)
1
0.65
mA
mA
W
THERMAL DATA
SymbolParameterSO 8MINIDIPUnit
R
th j-amb
Thermal Resistance Junction-ambient150100
PIN FUNCTIONS
N.NameFunction
1INVInverting input of the error amplifier. A resistive divider is connected betweenoutput regulated
2COMPOutput of error amplifier. A feedback compensation network is placed between this pin and the
3MULTInput of themultipler stage. A resistive divider connects to this pin the rectified mains. A
4CSInput to the comparator of the control loop. The current is sensed by a resistor and the
5ZCDZero current detection input.
6GNDGround of the control section.
7GDGate driver output. A push pull output stage is able to drive the Power MOS with peak current
8V
CC
2/11
voltage and this point, to provide the voltage feedback.
INV pin.
voltage signal, proportional to the rectified mains, appears on this pin.
resulting voltage is applied to this pin.
of 400mA (source and sink).
Supply voltage of driver and control circuits.
7Output Voltage Rise TimeCL = 1nF50120ns
7Output Voltage Fall TimeCL = 1nF40100ns
OUTPUT OVERVOLTAGE SECTION
SymbolPinParameterTest ConditionMin.Typ.Max.Unit
I
OVP
2OVP Triggering Current364044
RESTART TIMER
A
µ
SymbolPinParameterTest ConditionMin.Typ.Max.Unit
t
START
OVER VOLTAGEPROTECTION OVP
The output voltage is expected to be kept by the
operation of the PFC circuits close to its reference
value that is set by the ratio of the twoexternal resistors R
1 and R2 (see fig. 2), taking into consid-
eration that the non inverting input of the error
amplifier is biased inside the L6560 at 2.5V.
In steady state conditions, the current through R1
and R2 is:
and, if the external compensation network is
made only with a capacitorC, the current through
C is equalzero.
When the output voltage increases abruptly the
current throughR1 becomes:
Start Timer4560µs
+∆V
V
outsc
=
I
R1
R1
OUT
− 2.5
=
+∆
I
sc
Since the current through R2 doesn’t change, the
∆I current must flow through the capacitorC and
enter in the error amplifier.
This current is mirrored inside the L6560, and
compared with a precise internal reference of
40µA. Whenever such 40µA limit is exceed, the
OVP protection is triggered (Dynamic OVP), and
outsc
SC
R1
=
− 2.5
2.5
R2
∆V
=
I
SC
or I
the external power transistor is switched off, until
the overvoltage situation disappears. However if
the overvoltage persists, before that the transient
condition of dynamic circuit exhausts, an internal
comparator (Static OVP) latches the OVP condition keeping the external power switch turned off
(see fig. 1).
The OVP value is threfore set by the equation
1 ⋅
OVP= ∆Vout = R
Typical values for R
40µA.
1,R2and C are reported in
the application circuit. The overvoltage can be set
independently from the average output voltage.
The precision in setting the overvoltage threshold
R1
out
=
R1
I
−2.5
V
is 7% of the overvoltage value (for instance ∆V=
60V ± 4.2V).
I.
4/11
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