L6480
Fully integrated microstepping motor driver with motion engine and SPI
Features
■Operating voltage: 7.5 V - 85 V
■Dual full bridge gate driver for N-channel MOSFETs
■Fully programmable gate driving
■Embedded Miller clamp function
■Programmable speed profile
■Up to 1/128 microstepping
■Sensorless stall detection
■Integrated voltage regulators
■SPI interface
■Low quiescent standby currents
■Programmable non-dissipative overcurrent protection
■Overtemperature protection
Application
■ Bipolar stepper motor
Description
The L6480, realized in analog mixed signal technology, is an advanced fully integrated solution suitable for driving two-phase bipolar stepper motors with microstepping.
It integrates a dual full bridge gate driver for N- channel MOSFET power stages with embedded non-dissipative overcurrent protection. Thanks to
Datasheet − preliminary data
HTSSOP38
a unique voltage mode driving mode which compensates for BEMF, bus voltage and motor winding variations, the microstepping of a true 1/128-step resolution is achieved. The digital control core can generate user defined motion profiles with acceleration, deceleration, speed or target position easily programmed through a dedicated register set. All application commands and data registers, including those used to set analog values (i.e. current protection trip point, deadtime, PWM frequency, etc.) are sent through a standard 5-Mbit/s SPI. A very rich set of protections (thermal, low bus voltage, overcurrent and motor stall) make the L6480 “bullet proof”, as required by the most demanding motor control applications.
Table 1. |
Device summary |
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Packaging |
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L6480H |
HTSSOP38 |
Tube |
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June 2012 |
Doc ID 023278 Rev 1 |
1/74 |
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to |
www.st.com |
change without notice. |
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Contents |
L6480 |
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Contents
1 |
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 8 |
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2 |
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 9 |
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2.1 |
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
9 |
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2.2 |
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10 |
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2.3 |
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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3 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
11 |
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4 |
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
17 |
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4.1 |
Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
17 |
5 |
Typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6 |
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
20 |
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6.1 |
Device power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
20 |
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6.2 |
Logic I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
20 |
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6.3 |
Charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
20 |
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6.4 |
Microstepping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
21 |
6.4.1 Automatic Full-step and Boost modes . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.5 Absolute position counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.6 Programmable speed profiles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.7 Motor control commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.7.1 Constant speed commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6.7.2 Positioning commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6.7.3 Motion commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.7.4 Stop commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.7.5 Step-clock mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.7.6 GoUntil and ReleaseSW commands . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6.8 Internal oscillator and oscillator driver . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.8.1 Internal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6.8.2 External clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.9 Overcurrent detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2/74 |
Doc ID 023278 Rev 1 |
L6480 |
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Contents |
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6.10 |
Undervoltage lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.11 |
VS undervoltage lockout (UVLO_ADC) . . . . . . . . . . . . . . . . . . . . . |
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6.12 |
Thermal warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . |
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6.13 |
Reset and standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.14 |
External switch (SW pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.15 |
Programmable gate drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.16 |
Deadtime and blanking time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.17 |
Integrated analog to digital converter . . . . . . . . . . . . . . . . . . . . . . . . |
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6.18 |
Supply management and internal voltage regulators . . . . . . . . . . . . |
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6.19 |
BUSY/SYNC pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.20 |
FLAG pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Phase current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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7.1 PWM sinewave generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 7.2 Sensorless stall detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 7.3 Low speed optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 7.4 BEMF compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 7.5 Motor supply voltage compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 7.6 Winding resistance thermal drift compensation . . . . . . . . . . . . . . . . . . . . 40
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Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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9 |
Programming manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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9.1 Registers and flags description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
43 |
9.1.1 ABS_POS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 9.1.2 EL_POS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 9.1.3 MARK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 9.1.4 SPEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 9.1.5 ACC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 9.1.6 DEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 9.1.7 MAX_SPEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 9.1.8 MIN_SPEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 9.1.9 FS_SPD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 9.1.10 KVAL_HOLD, KVAL_RUN, KVAL_ACC and KVAL_DEC . . . . . . . . . . . . 47 9.1.11 INT_SPEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Doc ID 023278 Rev 1 |
3/74 |
Contents |
L6480 |
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9.1.12 ST_SLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 9.1.13 FN_SLP_ACC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 9.1.14 FN_SLP_DEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9.1.15 K_THERM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9.1.16 ADC_OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9.1.17 OCD_TH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 9.1.18 STALL_TH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 9.1.19 STEP_MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 9.1.20 ALARM_EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 9.1.21 GATECFG1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 9.1.22 GATECFG2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 9.1.23 CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 9.1.24 STATUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
9.2 Application commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
9.2.1 Command management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 9.2.2 Nop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 9.2.3 SetParam (PARAM, VALUE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 9.2.4 GetParam (PARAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 9.2.5 Run (DIR, SPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 9.2.6 StepClock (DIR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 9.2.7 Move (DIR, N_STEP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 9.2.8 GoTo (ABS_POS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 9.2.9 GoTo_DIR (DIR, ABS_POS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 9.2.10 GoUntil (ACT, DIR, SPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 9.2.11 ReleaseSW (ACT, DIR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 9.2.12 GoHome . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 9.2.13 GoMark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 9.2.14 ResetPos . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 9.2.15 ResetDevice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 9.2.16 SoftStop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 9.2.17 HardStop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 9.2.18 SoftHiZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 9.2.19 HardHiZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 9.2.20 GetStatus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
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Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
73 |
4/74 |
Doc ID 023278 Rev 1 |
L6480 |
List of tables |
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List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 3. Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 6. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 7. Typical application values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Table 8. CL values according to external oscillator frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 9. UVLO thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 10. Thermal protection summarizing table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 11. Registers map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 12. EL_POS register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 13. MIN_SPEED register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 14. FS_SPD register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 15. Voltage amplitude regulation registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 16. Winding resistance thermal drift compensation coefficient . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 17. ADC_OUT value and motor supply voltage compensation feature . . . . . . . . . . . . . . . . . . 49 Table 18. Overcurrent detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 19. Stall detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 20. STEP_MODE register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 21. Step mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 22. SYNC signal source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 23. ALARM_EN register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 24. GATECFG1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 25. IGATE parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 26. TCC parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 27. TBOOST parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 28. GATECFG2 register (voltage mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 29. TDT parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 30. TBLANK parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 31. CONFIG register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 32. Oscillator management. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 33. External switch hard stop interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 34. Overcurrent event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 35. Programmable VCC regulator output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 36. Programmable UVLO thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 37. Motor supply voltage compensation enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 38. PWM frequency: integer division factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Table 39. PWM frequency: multiplication factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Table 40. Available PWM frequencies [kHz]: 8-MHz oscillator frequency . . . . . . . . . . . . . . . . . . . . . 57 Table 41. Available PWM frequencies [kHz]: 16-MHz oscillator frequency . . . . . . . . . . . . . . . . . . . . 58 Table 42. Available PWM frequencies [kHz]: 24-MHz oscillator frequency . . . . . . . . . . . . . . . . . . . . 58 Table 43. Available PWM frequencies [kHz]: 32-MHz oscillator frequency . . . . . . . . . . . . . . . . . . . . 58 Table 44. STATUS register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 45. STATUS register TH_STATUS bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 46. STATUS register DIR bit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 47. STATUS register MOT_STATE bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 48. Application commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Doc ID 023278 Rev 1 |
5/74 |
List of tables |
L6480 |
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Table 49. Nop command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Table 50. SetParam command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Table 51. GetParam command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Table 52. Run command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Table 53. StepClock command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Table 54. Move command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Table 55. GoTo command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Table 56. GoTo_DIR command structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Table 57. GoUntil command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Table 58. ReleaseSW command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Table 59. GoHome command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Table 60. GoMark command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Table 61. ResetPos command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Table 62. ResetDevice command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Table 63. SoftStop command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Table 64. HardStop command structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Table 65. SoftHiZ command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Table 66. HardHiZ command structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Table 67. GetStatus command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Table 68. HTSSOP38 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Table 69. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
6/74 |
Doc ID 023278 Rev 1 |
L6480 |
List of figures |
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List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 2. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 3. Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 4. Charge pump circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 5. Normal mode and microstepping (128 microsteps) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 6. Automatic full-step switching in Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 7. Automatic full-step switching in Boost mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 8. Constant speed command examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 9. Positioning command examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 10. Motion commands examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 11. OSCIN and OSCOUT pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 12. Overcurrent detection-principle scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 13. External switch connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 14. Gate driving currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 15. Device supply pin management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Figure 16. Current distortion and compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 17. BEMF compensation curve. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 18. Motor supply voltage compensation circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 19. SPI timings diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 20. Daisy chain configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 21. Command with 3-byte argument . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 22. Command with 3-byte response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 23. Command response aborted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 24. HTSSOP38 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Figure 25. HTSSOP38 footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
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8/74 |
Doc ID 023278 Rev 1 |
L6480 |
Electrical data |
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2.1Absolute maximum ratings
Table 2. |
Absolute maximum ratings |
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Symbol |
Parameter |
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Test condition |
Value |
Unit |
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VDD |
Logic interface supply voltage |
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5.5 |
V |
VREG |
Logic supply voltage |
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3.6 |
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VS |
Motor supply voltage |
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95 |
V |
VCC |
Low-side gate driver supply |
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18 |
V |
voltage |
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VBOOT |
Boot voltage |
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100 |
V |
∆VBOOT |
High-side gate driver supply |
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0 to 20 |
V |
voltage |
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VSREG |
Internal VCC regulator supply |
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95 |
V |
voltage |
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VCCREG |
Internal VREG regulator |
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18 |
V |
supply voltage |
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VOUT1A |
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DC |
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-5 to |
V |
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VBOOT |
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VOUT2A |
Full bridge output voltage |
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VOUT1B |
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AC |
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VOUT2B |
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VBOOT |
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SRout |
Full bridge outputs slew rate |
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10 |
V/ns |
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VHVG1A |
High-side output driver |
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VOUT to |
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VHVG2A |
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voltage |
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VHVG2B |
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High-side output driver to |
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∆VHVG2A |
respective bridge output |
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15 |
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∆VHVG1B |
voltage(VHVG - VOUT) |
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VCC + 0.3 |
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IGATE- |
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100 |
mA |
CLAMP |
current capability |
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VADCIN |
Integrated ADC input voltage |
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range (ADCIN pin) |
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Doc ID 023278 Rev 1 |
9/74 |
Electrical data |
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Table 2. |
Absolute maximum ratings (continued) |
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Test condition |
Value |
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Unit |
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Vin |
Logic inputs voltage range |
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-0.3 to 5.5 |
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V |
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TOP |
Operating junction |
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150 |
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°C |
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temperature |
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Storage temperature |
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-55 to 150 |
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°C |
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Ptot |
Total power dissipation (Tamb |
Board characteristics: TBD |
TBD |
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W |
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= 25 ºC) |
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2.2Recommended operating conditions
Table 3. |
Recommended operating conditions |
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Symbol |
Parameter |
Test condition |
Min. |
Typ. |
Max. |
Unit |
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VDD |
Logic interface supply voltage |
3.3 V logic outputs |
|
3.3 |
|
V |
|
|
|
|
|||
5 V logic outputs |
|
5 |
|
|||
|
|
|
|
|
||
|
|
|
|
|
|
|
VREG |
Logic supply voltage |
|
|
3.3 |
|
V |
VS |
Motor supply voltage |
|
VSREG |
|
85 |
V |
VSREG |
Internal VCC voltage regulator |
VCC voltage internally |
VCC +3 |
|
Vs |
V |
generated |
|
|||||
|
|
VCC voltage imposed by |
|
|
|
|
VCC |
Gate driver supply voltage |
external source (VSREG |
7.5 |
|
15 |
V |
|
|
= VCC) |
|
|
|
|
VCCREG |
Internal VREG voltage regulator |
VREG voltage internally |
6.3 |
|
VCC |
V |
supply voltage |
generated |
|
||||
VADC |
Integrated ADC input voltage |
|
0 |
|
VREG |
V |
(ADCIN pin) |
|
|
||||
Tj |
Operating junction temperature |
|
- 25 |
|
125 |
°C |
2.3Thermal data
Table 4. |
Thermal data |
|
|
|
Symbol |
Parameter |
Package |
Typ. |
Unit |
|
|
|
|
|
Rthj-a |
Thermal resistance junction-to-ambient |
HTSSOP38 |
TBD |
°C/W |
10/74 |
Doc ID 023278 Rev 1 |
L6480 |
Electrical characteristics |
|
|
VS = 48 V; VCC= 7.5 V; Tj = 25 °C, unless otherwise specified.
Table 5. |
Electrical characteristics |
|
|
|
|
|
|
Symbol |
Parameter |
Test condition |
|
Min. |
Typ. |
Max. |
Unit |
|
|
|
|
|
|
|
|
General |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VCCthOn |
VCC UVLO turn-on threshold |
UVLO_VAL set high(1) |
|
|
10.8 |
|
V |
UVLO_VAL set low(1) |
|
|
7 |
|
|
||
|
|
|
|
|
|
||
VCCthOff |
VCC UVLO turn-off threshold |
UVLO_VAL set high(1) |
|
|
10.3 |
|
V |
UVLO_VAL set low(1) |
|
|
6.5 |
|
|
||
|
|
|
|
|
|
||
∆VBOOTthOn |
VBOOT - VS UVLO turn-on threshold |
UVLO_VAL set high(1) |
|
|
9.3 |
|
V |
UVLO_VAL set low(1) |
|
|
6 |
|
V |
||
|
|
|
|
|
|||
∆VBOOTthOff |
VBOOT - VS UVLO turn-off threshold |
UVLO_VAL set high(1) |
|
|
8.8 |
|
|
UVLO_VAL set low(1) |
|
|
5.5 |
|
|
||
|
|
|
|
|
|
||
VREGthOn |
VREG turn-on threshold |
(1) |
|
|
2.8 |
|
V |
|
|
|
|
||||
VREGthOff |
VREG turn-off threshold |
(1) |
|
|
2.6 |
|
V |
|
|
|
|
||||
IVSREGqu |
Undervoltage VSREG quiescent supply |
VCCREG shorted to VCC |
(1) |
|
TBD |
|
µA |
current |
|
|
|
||||
|
|
VCCREG shorted to VCC, |
|
|
|
|
|
IVSREGq |
Quiescent VSREG supply current |
internal oscillator |
|
|
TBD |
|
mA |
|
|
selected(1) |
|
|
|
|
|
Thermal protection |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Tj(WRN)Set |
Thermal warning temperature |
|
|
|
135 |
|
°C |
Tj(WRN)Rec |
Thermal warning recovery temperature |
|
|
|
125 |
|
°C |
Tj(OFF)Set |
Thermal bridge shutdown temperature |
|
|
|
155 |
|
°C |
Tj(OFF)Rec |
Thermal bridge shutdown recovery |
|
|
|
145 |
|
°C |
temperature |
|
|
|
|
|||
Tj(SD)Set |
Thermal device shutdown temperature |
|
|
|
170 |
|
°C |
Tj(SD)Rec |
Thermal device shutdown recovery |
|
|
|
130 |
|
°C |
temperature |
|
|
|
|
|||
Charge pump |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Vpump |
Voltage swing for charge pump oscillator |
|
|
|
VCC |
|
V |
fpump,min |
Minimum charge pump oscillator frequency(2) |
|
|
|
660 |
|
kHz |
fpump,max |
Maximum charge pump oscillator |
|
|
|
800 |
|
kHz |
frequency(2) |
|
|
|
|
|||
RpumpHS |
Charge pump high-side RDS(ON) resistance |
|
|
|
TBD |
|
Ω |
RpumpLS |
Charge pump low-side RDS(ON) resistance |
|
|
|
TBD |
|
Ω |
Doc ID 023278 Rev 1 |
11/74 |
Electrical characteristics |
|
|
|
|
L6480 |
||
|
|
|
|
|
|
|
|
Table 5. |
Electrical characteristics (continued) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Symbol |
Parameter |
Test condition |
Min. |
Typ. |
Max. |
|
Unit |
|
|
|
|
|
|
|
|
Iboot |
Average boot current |
TBD |
|
TBD |
|
|
µA |
Gate Driver Outputs |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
4 |
|
|
mΑ |
|
|
|
|
|
|
|
|
|
|
|
|
8 |
|
|
|
|
|
|
|
|
|
|
|
|
|
VS = 38 V |
|
16 |
|
|
|
|
Programmable high-side and low-side gate |
|
|
|
|
|
|
IGATE,Sink |
VHVGX - VOUTX > 3 V |
|
24 |
|
|
|
|
sink current |
|
|
|
|
|||
|
|
VLVGX > 3 V |
|
32 |
|
|
|
|
|
|
|
64 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
96 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
4 |
|
|
mA |
|
|
|
|
|
|
|
|
|
|
|
|
8 |
|
|
|
|
|
|
|
|
|
|
|
|
Programmable high-side and low-side gate |
VS = 38 V |
|
16 |
|
|
|
|
|
|
|
|
|
||
IGATE,Source |
source current |
VBOOTX - VHVGX > 3.5 V |
|
24 |
|
|
|
|
|
VCC-VLVGX > 3.5 V |
|
|
|
|
|
|
|
|
32 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
64 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
96 |
|
|
|
|
|
|
|
|
|
|
|
IOB |
High-side and low-side turn-off overboost |
|
|
103 |
|
|
mA |
gate current |
|
|
|
|
|||
RCLAMP(LS) |
Low-side gate driver Miller clamp resistance |
|
|
7 |
|
|
Ω |
RCLAMP(HS) |
High-side gate driver Miller clamp resistance |
|
|
3.5 |
|
|
Ω |
VGATE- |
High-side gate voltage clamp |
IGATE-CLAMP=100 mA |
|
18.7 |
|
|
v |
IGATE-CLAMP=100 A |
|
15.3 |
|
|
|||
CLAMP |
|
|
|
|
|
||
t |
Programmable constant gate current time(2) |
TCC=’00000’ |
|
125 |
|
|
ns |
|
|
|
|
|
|||
|
|
|
|
|
|||
cc |
|
TCC= 11111 |
|
3750 |
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
Programmable. Turn-off overboost; gate |
TBOOST=’001’, internal |
|
62.5 |
|
|
ns |
tOB |
oscillator |
|
|
|
|||
|
|
|
|
|
|||
current time(2) |
|
|
|
|
|
|
|
TBOOST=’111’ |
|
1000 |
|
|
|
||
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
IDSS |
Leakage current |
OUT = VS |
|
|
TBD |
|
mA |
OUT = GND |
TBD |
|
|
|
|
||
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
IGATE = 4 mA |
|
|
|
|
|
|
|
VCC = 15 V |
|
TBD |
|
|
|
|
|
CGATE = 10 nC |
|
|
|
|
|
tr |
Rise time |
IGATE = 32 mA |
|
|
|
|
ns |
|
|
VCC = 15 V |
|
TBD |
|
|
|
|
|
|
|
|
|
||
|
|
CGATE = 10 nC |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
12/74 |
Doc ID 023278 Rev 1 |
L6480 |
|
|
Electrical characteristics |
||||
|
|
|
|
|
|
|
|
Table 5. |
Electrical characteristics |
(continued) |
|
|
|
|
|
|
|
|
|
|
|
|
|
Symbol |
Parameter |
|
Test condition |
Min. |
Typ. |
Max. |
Unit |
|
|
|
|
|
|
|
|
|
|
|
IGATE = 96 mA |
|
|
|
|
tr |
Rise time |
|
VCC = 15 V |
|
TBD |
|
ns |
|
|
|
CGATE = 10 nC |
|
|
|
|
|
|
|
IGATE = 4 mA |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VCC = 15 V |
|
TBD |
|
|
|
|
|
CGATE = 10 nC |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
tf |
Fall time |
|
IGATE = 32 mA |
|
|
|
ns |
|
|
|
|
||||
|
VCC = 15 V |
|
TBD |
|
|||
|
|
|
CGATE = 10 nC |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
IGATE = 96 mA |
|
|
|
|
|
|
|
VCC = 15 V |
|
TBD |
|
|
|
|
|
CGATE = 10 nC |
|
|
|
|
Deadtime and blanking |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
t |
Programmable deadtime2 |
|
TDT= '00000' |
|
125 |
|
ns |
|
|
|
|
|
|||
|
|
|
|
|
|||
DT |
|
|
TDT=’11111’ |
|
4000 |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
t |
Programmable blanking time2 |
|
TBLANK= '000' |
|
125 |
|
ns |
|
|
|
|
|
|||
|
|
|
|
|
|||
blank |
|
|
TBLANK=’111’ |
|
1000 |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
Logic |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VIL |
Low level logic input voltage |
|
|
|
|
0.8 |
V |
VIH |
High level logic input voltage |
|
|
2 |
|
|
V |
IIH |
High level logic input current |
|
VIN = 5 V |
|
|
1 |
µA |
IIL |
Low level logic input current |
|
VIN = 0 V |
-1 |
|
|
µA |
V |
Low level logic output voltage(3) |
VDD = 3.3 V, IOL = 4 mA |
|
|
0.3 |
V |
|
|
|
|
|
||||
OL |
|
|
VDD = 5 V, IOL = 4 mA |
|
|
0.3 |
|
|
|
|
|
|
|
||
VOH |
High level logic output voltage |
|
VDD = 3.3 V, IOH = 4 mA |
2.4 |
|
|
V |
|
VDD = 5 V, IOH = 4 mA |
4.7 |
|
|
|||
|
|
|
|
|
|
||
RPUCS |
CS pull-up resistor |
|
|
|
430 |
|
|
RPDRST |
STBY/RESET pull-down resistor |
|
|
430 |
|
kΩ |
|
RPUSW |
CS pull-up resistor |
|
|
|
65.2 |
|
|
|
|
|
3.3 V VREG externally |
|
5 |
|
|
|
|
|
supplied, internal oscillator |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
3.3 V VREG externally |
|
|
|
|
Ilogic |
Internal logic supply current |
|
supplied, external 8-MHz |
|
TBD |
|
mA |
|
oscillator |
|
|
|
|||
|
|
|
3.3 V VREG externally |
|
|
|
|
|
|
|
supplied, external 32-MHz |
|
TBD |
|
|
|
|
|
oscillator |
|
|
|
|
|
|
|
|
|
|
|
|
Doc ID 023278 Rev 1 |
13/74 |
Electrical characteristics |
|
|
|
|
|
|
|
|
|
L6480 |
||||
|
|
|
|
|
|
|
|
|
|
|
|
|||
Table 5. |
Electrical characteristics (continued) |
|
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|||||
Symbol |
|
Parameter |
|
Test condition |
Min. |
Typ. |
Max. |
|
Unit |
|||||
|
|
|
|
|
|
|
|
|
|
|
|
|||
Ilogic,STBY |
|
Standby mode internal logic supply current |
3.3 V VREG externally |
|
5 |
|
|
µA |
||||||
|
supplied |
|
|
|
|
|
||||||||
thigh,STCK |
|
Step-clock input high time |
|
|
|
|
|
|
|
300 |
|
|
ns |
|
tlow,STCK |
|
Step-clock input low time |
|
|
|
|
|
|
|
300 |
|
|
ns |
|
f |
SYNC |
|
BUSY/SYNC output frequency (2) |
R |
=TBD, C |
BUSY |
=TBD |
|
|
2 |
|
MHz |
||
|
|
|
|
|
|
BUSY |
|
|
|
|
|
|
||
Internal oscillator and external oscillator driver |
|
|
|
|
|
|
|
|
|
|||||
|
|
|
|
|
|
|
|
|
|
|
||||
fosc,int |
|
Internal oscillator frequency |
Tj = 25 °C, |
|
|
-5% |
16 |
+5% |
|
MHz |
||||
fosc,ext |
|
Programmable external oscillator frequency |
|
|
|
|
8 |
|
32 |
|
MHz |
|||
VOSCOUTH |
|
OSCOUT clock source high level voltage |
Internal oscillator |
|
2.4 |
|
|
|
V |
|||||
VOSCOUTL |
|
OSCOUT clock source low level voltage |
Internal oscillator |
|
|
|
0.3 |
|
V |
|||||
trOSCOUT |
|
OSCOUT clock source rise and fall time |
Internal oscillator |
|
|
|
10 |
|
ns |
|||||
tfOSCOUT |
|
|
|
|
|
|||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
thigh |
|
OSCOUT clock source high time |
Internal oscillator |
|
|
62.5 |
|
|
ns |
||||
|
|
|
|
|
|
|
|
|
||||||
textosc |
|
Internal to external oscillator switching delay |
|
|
|
|
|
3 |
|
|
ms |
|||
tintosc |
|
External to internal oscillator switching delay |
|
|
|
|
|
100 |
|
|
µs |
|||
SPI |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
fCK,MAX |
|
Maximum SPI clock frequency(4) |
|
|
|
|
5 |
|
|
|
MHz |
|||
|
trCK |
|
SPI clock rise and fall time |
(5) |
|
|
|
|
|
|
1 |
|
µs |
|
|
tfCK |
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
thCK |
|
SPI clock high and low time |
(5) |
|
|
|
|
90 |
|
|
|
ns |
|
|
tlCK |
|
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
tsetCS |
|
Chip select setup time(5) |
|
|
|
|
|
|
30 |
|
|
|
ns |
|
tholCS |
|
Chip select hold time 5) |
|
|
|
|
|
|
30 |
|
|
|
ns |
|
tdisCS |
|
Deselect time(5) |
|
|
|
|
|
|
625 |
|
|
|
ns |
|
tsetSDI |
|
Data input setup time(5) |
|
|
|
|
|
|
20 |
|
|
|
ns |
|
tholSDI |
|
Data input hold time(5) |
|
|
|
|
|
|
30 |
|
|
|
ns |
|
tenSDO |
|
Data output enable time(5) |
|
|
|
|
|
|
|
|
95 |
|
ns |
|
tdisSDO |
|
Data output disable time 5) |
|
|
|
|
|
|
|
95 |
|
ns |
||
tvSDO |
|
Data output valid time 5) |
|
|
|
|
|
|
|
|
35 |
|
ns |
|
tholSDO |
|
Data output hold time(5) |
|
|
|
|
|
|
0 |
|
|
|
ns |
PWM modulators
14/74 |
Doc ID 023278 Rev 1 |
L6480 |
|
Electrical characteristics |
||||
|
|
|
|
|
|
|
Table 5. |
Electrical characteristics (continued) |
|
|
|
|
|
|
|
|
|
|
|
|
Symbol |
Parameter |
Test condition |
Min. |
Typ. |
Max. |
Unit |
|
|
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fosc = 32 MHz |
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F_PWM_INT=’11X’ |
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5.6 |
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kHz |
fPWM |
Programmable PWM frequency(2) |
F_PWM_DEC=’000’ |
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fosc = 32 MHz |
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F_PWM_INT=’000’ |
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125 |
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F_PWM_DEC=’111’ |
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NPWM |
PWM resolution |
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8 |
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bit |
Overcurrent protection |
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VOCD |
Programmable overcurrent detection voltage |
OCD_TH = ‘11111’ |
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1000 |
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mV |
VDS threshold |
OCD_TH = ‘00000’ |
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31 |
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mV |
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VOCD,offset |
Overcurrent detection VDS voltage threshold |
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TBD |
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TBD |
mV |
offset |
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tOCD,Comp |
OCD comparator delay |
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100 |
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ns |
tOCD,Flag |
OCD to flag signal delay time |
CFLAG=TBDpF |
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TBD |
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ns |
tOCD,SD |
OCD to shutdown delay time(3) |
TBD |
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TBD |
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s |
Stall detection |
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VSTALL |
Programmable stall detection VDS voltage |
STALL_TH = '11111' |
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1000 |
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mV |
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threshold |
STALL_TH = '00000' |
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31 |
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VSTALL,offset |
Stall detection VDS voltage threshold offset |
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TBD |
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TBD |
mV |
tSTALL,Comp |
Stall detection comparator delay |
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100 |
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ns |
tSTALL,Flag |
Stall detection to flag signal delay time |
CFLAG=TBDpF |
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TBD |
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ns |
Standby |
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VCC = VREG voltages |
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internally generated |
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TBD |
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µA |
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(VCCREG shorted to VCC) |
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VSREG=TBDV |
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ISTBY |
Standby mode supply current |
VCC = VREG voltages |
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internally generated |
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(VCCREG shorted to VCC) |
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TBD |
36 |
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VSREG=TBDV |
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tSTBY,min |
Minimum standby time |
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0.5 |
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ms |
tlogicwu |
Logic power-on and wake-up time |
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500 |
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µs |
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Power bridges disabled, |
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tcpwu |
Charge pump power-on and wake-up time |
Cp = 10 nF, Cboot = 220 nF, |
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1 |
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ms |
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VCC=15 V |
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Internal voltage regulators |
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Doc ID 023278 Rev 1 |
15/74 |
Electrical characteristics |
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L6480 |
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Table 5. |
Electrical characteristics (continued) |
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Symbol |
Parameter |
Test condition |
Min. |
Typ. |
Max. |
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Unit |
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VCCOUT |
Internal VCC voltage regulator output voltage |
Low (default), ICC=10 mA |
7.3 |
7.5 |
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V |
High, ICC=10 mA |
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15 |
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VCCREG, |
VSREG to VCC dropout voltage |
ICC=TBD |
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3 |
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V |
drop |
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ICCOUT |
Internal VCC voltage regulator output current |
Short-circuit |
180 |
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360 |
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mA |
PCC |
Internal VCC voltage regulator power |
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2.5 |
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W |
dissipation |
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VREGOUT |
Internal VREG voltage regulator output |
IREG=TBDmA |
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3.3 |
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V |
voltage |
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VCCREG, |
VCCREG to VREG dropout voltage |
IREG=TBD |
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3 |
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V |
drop |
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IREGOUT |
Internal VREG voltage regulator output |
Short-circuit |
TBD |
50 |
TBD |
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mA |
current |
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IREGOUT,STB |
Internal VREG voltage regulator output |
Short-circuit |
TBD |
10 |
TBD |
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mA |
Y |
standby current |
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PREG |
Internal VREG voltage regulator power |
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0.5 |
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W |
dissipation |
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Integrated analog to digital converter |
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NADC |
Analog to digital converter resolution |
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5 |
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bit |
VADC,ref |
Analog to digital converter reference voltage |
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3.3 |
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V |
fS |
Analog to digital converter sampling |
(2) |
|
fPWM |
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kHz |
frequency |
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VADC,UVLO |
ADCIN UVLO threshold |
|
1.05 |
1.16 |
1.35 |
|
V |
1.Guaranteed in the temperature range -25 to 125 °C.
2.The value accuracy is dependent on oscillator frequency accuracy (Section 6.8).
3.FLAG and BUSY open drain outputs included.
4.See Figure 19.
16/74 |
Doc ID 023278 Rev 1 |
L6480 |
Pin connection |
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,6'! |
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,6'! |
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/54! |
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/54! |
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(6'! |
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(6'! |
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%0!$ |
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0'.$ |
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.# |
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!$#). |
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34"9 |
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2%3%4 |
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37 |
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63 |
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6"//4 |
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34#+ |
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0'.$ |
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&,!' |
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#0 |
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"539 |
39.# |
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6## |
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$'.$ |
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6##2%' |
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3$/ |
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632%' |
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6$$)/ |
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62%' |
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3$) |
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#+ |
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/3#). |
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/3#/54 |
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#3 |
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!'.$ |
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0'.$ |
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(6'" |
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(6'" |
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/54" |
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/54" |
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,6'" |
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,6'" |
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!-V
Table 6. |
Pin description |
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No. |
Name |
Type |
Function |
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11 |
VCCREG |
Power supply |
Internal VREG voltage regulator supply voltage |
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13 |
VREG |
Power supply |
Logic supply voltage |
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27 |
VDD |
Power supply |
Logic interface supply voltage |
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12 |
VSREG |
Power supply |
Internal VCC voltage regulator supply voltage |
|
10 |
VCC |
Power supply |
Gate driver supply voltage |
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14 |
OSCIN |
Analog input |
Oscillator pin1. To connect an external oscillator or |
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clock source |
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Oscillator pin2. To connect an external oscillator. |
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15 |
OSCOUT |
Analog output |
When the internal oscillator is used, this pin can |
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supply a 2/4/8/16 MHz clock |
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9 |
CP |
Output |
Charge pump oscillator output |
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7 |
VBOOT |
Power supply |
Bootstrap voltage needed for driving the high-side |
|
power DMOS of both bridges (A and B) |
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5 |
ADCIN |
Analog input |
Internal analog to digital converter input |
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6 |
VS |
Power supply |
Motor voltage |
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3 |
HVGA1 |
Power output |
High-side half bridge A1 gate driver output |
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|
Doc ID 023278 Rev 1 |
17/74 |
Pin connection |
|
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L6480 |
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Table 6. |
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Pin description (continued) |
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No. |
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Name |
Type |
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Function |
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36 |
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HVGA2 |
Power output |
High-side half bridge A2 gate driver output |
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17 |
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HVGB1 |
Power output |
High-side half bridge B1 gate driver output |
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22 |
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HVGB2 |
Power output |
High-side half bridge B2 gate driver output |
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1 |
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LVGA1 |
Power output |
Low-side half bridge A1 gate driver output |
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38 |
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LVGA2 |
Power output |
Low-side half bridge A2 gate driver output |
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19 |
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LVGB1 |
Power output |
Low-side half bridge B1 gate driver output |
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20 |
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LVGB2 |
Power output |
Low-side half bridge B2 gate driver output |
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8,23,55 |
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PGND |
Ground |
Power ground pins. They must be connected to other |
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ground pins |
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2 |
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OUTA1 |
Power input |
Full bridge A output 1 |
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37 |
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OUTA2 |
Power input |
Full bridge A output 2 |
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18 |
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OUTB1 |
Power input |
Full bridge B output 1 |
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21 |
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OUTB2 |
Power input |
Full bridge B output 2 |
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16 |
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AGND |
Ground |
Analog ground. It must be connected to other ground |
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pins |
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33 |
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SW |
Logical input |
External switch input pin |
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29 |
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DGND |
Ground |
Digital ground. It must be connected to other ground |
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pins |
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28 |
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SDO |
Logical output |
Data output pin for serial interface |
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26 |
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SDI |
Logical input |
Data input pin for serial interface |
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25 |
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CK |
Logical input |
Serial interface clock |
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24 |
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Logical input |
Chip select input pin for serial interface |
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CS |
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By default, the |
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/SYNC pin is forced low when |
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BUSY |
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the device is performing a command. |
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30 |
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Open drain output |
The pin can be programmed in order to generate a |
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BUSY/SYNC |
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synchronization signal |
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Status flag pin. An internal open drain transistor can |
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pull the pin to GND when a programmed alarm |
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31 |
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FLAG |
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Open drain output |
condition occurs (step loss, OCD, thermal pre- |
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warning or shutdown, UVLO, wrong command, non- |
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performable command) |
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Standby and reset pin. LOW logic level puts the |
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STBY |
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34 |
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Logical input |
device in Standby mode and reset logic. |
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RESET |
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If not used, should be connected to VREG |
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32 |
|
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STCK |
Logical input |
Step-clock input |
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EPAD |
Exposed pad |
Ground |
Exposed pad. It must be connected to other ground |
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|||||||||||
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pins |
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|
18/74 |
Doc ID 023278 Rev 1 |
L6480 |
Typical applications |
|
|
Table 7. |
Typical application values |
|
|
|
Name |
|
Value |
|
|
|
|
|
CVSPOL |
|
220 µF |
|
CVS |
|
220 nF |
|
CBOOT |
|
470 nF |
|
CFLY |
|
47 nF |
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CVSREG |
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100 nF |
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CVCC |
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470 nF |
CVCCREG |
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100 nF |
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CVREG |
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100 nF |
CVREGPOL |
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22 µF |
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CVDD |
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100 nF |
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D1 |
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Charge pump diodes |
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Q1,Q2,Q3,Q4,Q5,Q6,Q7 |
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STD25NF10 |
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,Q8 |
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RPU |
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39 kΩ |
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RA |
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1.8 kΩ (VS = 85 V) |
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RB |
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91 kΩ (VS = 85 V) |
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VS (10.5V - 85V) |
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CBOOT |
C |
C |
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VS |
VSPOL |
CVREGPOL |
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D1 |
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RB |
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CVREG |
C |
C |
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C |
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CVSREG |
CFLY |
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VDD |
VCCREG |
VCC |
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RA |
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RPU |
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VREG |
VDD |
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VCCREG |
VCC VSREG |
VS |
CP |
VBOOT |
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RPU |
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ADCIN |
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FLAG |
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Q1 |
Q2 |
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HVGA1 |
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BUSY/SYNC |
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OUTA1 |
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STBY/RESET |
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LVGA1 |
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STCK |
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LVGA2 |
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HOST |
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OUTA2 |
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HVGA2 |
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CS |
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L6480 |
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Q3 |
Q4 |
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CK |
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SDO |
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Q5 |
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SDI |
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HVGB1 |
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OUTB1 |
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SW |
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LVGB1 |
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OSCIN |
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LVGB2 |
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OUTB2 |
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OSCOUT |
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HVGB2 |
Q7 |
Q8 |
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DGND |
AGND |
PGND |
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AM12826v1 |
Doc ID 023278 Rev 1 |
19/74 |
Functional description |
L6480 |
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6.1Device power-up
During power-up, the device is under reset (all logic IOs disabled and power bridges in high impedance state) until the following conditions are satisfied:
●VCC is greater than VCCthOn
●VBOOT - VS is greater than ∆VBOOTthOn
●VREG is greater than VREGthOn
●Internal oscillator is operative
●STBY/RESET input is forced high.
After power-up, the device state is the following:
●Parameters are set to default
●Internal logic is driven by internal oscillator and a 2-MHz clock is provided by the OSCOUT pin
●Bridges are disabled (high impedance).
After power-up, a period of tlogicwu must pass before applying a command to allow proper oscillator and logic startup.
Any movement command makes the device exit from High Z state (HardStop and SoftStop included).
Pins CS, CK, SDI, STCK, SW and STBY/RESET are TTL/CMOS 3.3 V-5 V compatible logic inputs.
Pin SDO is a TTL/CMOS compatible logic output. VDD pin voltage imposes logical output voltage range.
Pins FLAG and BUSY/SYNC are open drain outputs.
SW and CS inputs are internally pulled up to VDD and STBY/RESET input is internally pulled down to ground.
To ensure the correct driving of the high-side integrated MOSFETs, a voltage higher than the motor power supply voltage needs to be applied to the VBOOT pin. The high-side gate driver supply voltage VBOOT is obtained through an oscillator and a few external components realizing a charge pump (see Figure 4).
20/74 |
Doc ID 023278 Rev 1 |
L6480 |
Functional description |
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Figure 4. |
Charge pump circuitry |
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6 |
6 |
6$ |
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3 |
#0 |
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#"//4 |
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63 |
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$ |
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$ |
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63 6#0 7$ |
7$ |
#&,9 |
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6"//4 |
#0 |
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6#0 |
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TOOHIGH SIDE |
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GATEEDRIVERS |
6$$ |
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F05-0 |
!- V
The driver is able to divide the single step into up to 128 microsteps. Stepping mode can be programmed by the STEP_SEL parameter in the STEP_MODE register (Table 20.).
Step mode can be only changed when bridges are disabled. Every time the step mode is changed, the electrical position (i.e. the point of microstepping sinewave that is generated) is reset to the first microstep and the absolute position counter value (Section 6.5) becomes meaningless.
2ESET |
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.ORMAL DRIVING |
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2ESET |
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-ICROSTEPPING |
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POSITION |
0(!3%!!3CURRENT |
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POSITION |
0(!3%!!3CURRENT |
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0(!3%!"3CURRENT |
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0(!3%!"3CURRENT |
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MICROSTEPS |
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STEP |
STEP |
STEP |
STEP |
STEP |
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STEP |
STEP |
STEP |
STEP |
STEP |
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STEPS |
STEPS |
STEPS |
STEPS |
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". W |
Doc ID 023278 Rev 1 |
21/74 |
Functional description |
L6480 |
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6.4.1Automatic Full-step and Boost modes
When motor speed is greater than a programmable full-step speed threshold, the L6480 switches automatically to Full-step mode; the driving mode returns to microstepping when motor speed decreases below the full-step speed threshold.
The switching between the microstepping and Full-step mode and vice-versa is always performed at an electrical position multiple of π/4 (Figure 6 andFigure 7).
Full-step speed threshold is set through the related parameter in the FS_SPD register (Section 9.1.9).
When the BOOST_MODE bit of the FS_SPD register is low (default), the amplitude of the voltage squarewave in Full-step mode is equal to the peak of the voltage sinewave multiplied by sine(π/4) (Figure 6). This avoids the current drop between the two driving modes.
When the BOOST_MODE bit of the FS_SPD register is high, the amplitude of the voltage squarewave in Full-step mode is equal to the peak of the voltage sinewave (Figure 7). That improves the output current increasing the maximum motor torque.
Vpeak
sin(π /4)x V
peak
Phase A
Phase B
Microstepping |
Full-Step |
Microstepping |
(2N+1) xπ /4 |
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(2N+1) xπ /4 |
AM12829v1
22/74 |
Doc ID 023278 Rev 1 |
L6480 |
Functional description |
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Vpeak |
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Phase A |
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Vpeak |
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Phase B |
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Microstepping |
Full-Step |
Microstepping |
(2N+1) xπ /4 |
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(2N+1) xπ/4 |
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AM12850v1 |
An internal 22-bit register (ABS_POS) records all the motor motions according to the selected step mode; the stored value unit is equal to the selected step mode (full, half, quarter, etc.). The position range is from -221 to +221-1 steps (see Section 9.1.1).
The user can easily program a customized speed profile defining independently acceleration, deceleration, maximum and minimum speed values by ACC, DEC, MAX_SPEED and MIN_SPEED registers respectively (see Section 9.1.5, 9.1.6, 9.1.7 and
9.1.8).
When a command is sent to the device, the integrated logic generates the microstep frequency profile that performs a motor motion compliant to speed profile boundaries.
All acceleration parameters are expressed in step/tick2 and all speed parameters are expressed in step/tick; the unit of measurement does not depend on the selected step mode. Acceleration and deceleration parameters range from 2-40 to (212-2)•2-40 step/tick2 (equivalent to 14.55 to 59590 step/s2).
Minimum speed parameter ranges from 0 to step/s).
Maximum speed parameter ranges from 2-18 15610 step/s).
(212-1)•2-24 step/tick (equivalent to 0 to 976.3
to (210-1)• 2-18 step/tick (equivalent to 15.25 to
Doc ID 023278 Rev 1 |
23/74 |