L6480
Fully integrated microstepping motor driver with motion engine and
SPI
Datasheet − preliminary data
Features
■ Operating voltage: 7.5 V - 85 V
■ Dual full bridge gate driver for N-channel
MOSFETs
■ Fully programmable gate driving
■ Embedded Miller clamp function
■ Programmable speed profile
■ Up to 1/128 microstepping
■ Sensorless stall detection
■ Integrated voltage regulators
■ SPI interface
■ Low quiescent standby currents
■ Programmable non-dissipative overcurrent
protection
■ Overtemperature protection
Application
■ Bipolar stepper motor
Description
a unique voltage mode driving mode which
compensates for BEMF, bus voltage and motor
winding variations, the microstepping of a true
1/128-step resolution is achieved. The digital
control core can generate user defined motion
profiles with acceleration, deceleration, speed or
target position easily programmed through a
dedicated register set. All application commands
and data registers, including those used to set
analog values (i.e. current protection trip point,
deadtime, PWM frequency, etc.) are sent through
a standard 5-Mbit/s SPI. A very rich set of
protections (thermal, low bus voltage, overcurrent
and motor stall) make the L6480 “bullet proof ”, as
required by the most demanding motor control
applications.
HTSSOP38
The L6480, realized in analog mixed signal
technology, is an advanced fully integrated
solution suitable for driving two-phase bipolar
stepper motors with microstepping.
It integrates a dual full bridge gate driver for Nchannel MOSFET power stages with embedded
non-dissipative overcurrent protection. Thanks to
Table 1. Device summary
Order codes Package Packaging
L6480H HTSSOP38 Tube
June 2012 Doc ID 023278 Rev 1 1/74
This is preliminar y information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
www.st.com
74
Contents L6480
Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 Pin list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5 Typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.1 Device power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.2 Logic I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.3 Charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.4 Microstepping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.4.1 Automatic Full-step and Boost modes . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.5 Absolute position counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.6 Programmable speed profiles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.7 Motor control commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.7.1 Constant speed commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.7.2 Positioning commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.7.3 Motion commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.7.4 Stop commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.7.5 Step-clock mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6.7.6 GoUntil and ReleaseSW commands . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6.8 Internal oscillator and oscillator driver . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.8.1 Internal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.8.2 External clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.9 Overcurrent detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2/74 Doc ID 023278 Rev 1
L6480 Contents
6.10 Undervoltage lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.11 VS undervoltage lockout (UVLO_ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.12 Thermal warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.13 Reset and standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.14 External switch (SW pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.15 Programmable gate drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
6.16 Deadtime and blanking time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.17 Integrated analog to digital converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.18 Supply management and internal voltage regulators . . . . . . . . . . . . . . . . 34
6.19 BUSY/SYNC pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.20 FLAG pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7 Phase current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
7.1 PWM sinewave generators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
7.2 Sensorless stall detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
7.3 Low speed optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
7.4 BEMF compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
7.5 Motor supply voltage compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
7.6 Winding resistance thermal drift compensation . . . . . . . . . . . . . . . . . . . . 40
8 Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
9 Programming manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
9.1 Registers and flags description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
9.1.1 ABS_POS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
9.1.2 EL_POS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
9.1.3 MARK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
9.1.4 SPEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
9.1.5 ACC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
9.1.6 DEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.1.7 MAX_SPEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.1.8 MIN_SPEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.1.9 FS_SPD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
9.1.10 KVAL_HOLD, KVAL_RUN, KVAL_ACC and KVAL_DEC . . . . . . . . . . . . 47
9.1.11 INT_SPEED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
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Contents L6480
9.1.12 ST_SLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
9.1.13 FN_SLP_ACC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
9.1.14 FN_SLP_DEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
9.1.15 K_THERM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
9.1.16 ADC_OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
9.1.17 OCD_TH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
9.1.18 STALL_TH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
9.1.19 STEP_MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
9.1.20 ALARM_EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
9.1.21 GATECFG1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
9.1.22 GATECFG2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
9.1.23 CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
9.1.24 STATUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
9.2 Application commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
9.2.1 Command management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
9.2.2 Nop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
9.2.3 SetParam (PARAM, VALUE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
9.2.4 GetParam (PARAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
9.2.5 Run (DIR, SPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
9.2.6 StepClock (DIR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
9.2.7 Move (DIR, N_STEP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
9.2.8 GoTo (ABS_POS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
9.2.9 GoTo_DIR (DIR, ABS_POS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
9.2.10 GoUntil (ACT, DIR, SPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
9.2.11 ReleaseSW (ACT, DIR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
9.2.12 GoHome . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
9.2.13 GoMark . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
9.2.14 ResetPos . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
9.2.15 ResetDevice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
9.2.16 SoftStop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
9.2.17 HardStop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
9.2.18 SoftHiZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
9.2.19 HardHiZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
9.2.20 GetStatus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4/74 Doc ID 023278 Rev 1
L6480 List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 3. Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 6. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 7. Typical application values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 8. CL values according to external oscillator frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 9. UVLO thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 10. Thermal protection summarizing table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 11. Registers map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 12. EL_POS register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 13. MIN_SPEED register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 14. FS_SPD register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 15. Voltage amplitude regulation registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 16. Winding resistance thermal drift compensation coefficient . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 17. ADC_OUT value and motor supply voltage compensation feature . . . . . . . . . . . . . . . . . . 49
Table 18. Overcurrent detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 19. Stall detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 20. STEP_MODE register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 21. Step mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 22. SYNC signal source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 23. ALARM_EN register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 24. GATECFG1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 25. IGATE parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 26. TCC parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 27. TBOOST parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 28. GATECFG2 register (voltage mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 29. TDT parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 30. TBLANK parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 31. CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 32. Oscillator management. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 33. External switch hard stop interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 34. Overcurrent event . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 35. Programmable V
Table 36. Programmable UVLO thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 37. Motor supply voltage compensation enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 38. PWM frequency: integer division factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 39. PWM frequency: multiplication factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 40. Available PWM frequencies [kHz]: 8-MHz oscillator frequency . . . . . . . . . . . . . . . . . . . . . 57
Table 41. Available PWM frequencies [kHz]: 16-MHz oscillator frequency . . . . . . . . . . . . . . . . . . . . 58
Table 42. Available PWM frequencies [kHz]: 24-MHz oscillator frequency . . . . . . . . . . . . . . . . . . . . 58
Table 43. Available PWM frequencies [kHz]: 32-MHz oscillator frequency . . . . . . . . . . . . . . . . . . . . 58
Table 44. STATUS register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 45. STATUS register TH_STATUS bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 46. STATUS register DIR bit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 47. STATUS register MOT_STATE bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 48. Application commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
CC regulator output voltage
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Doc ID 023278 Rev 1 5/74
List of tables L6480
Table 49. Nop command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 50. SetParam command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 51. GetParam command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 52. Run command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 53. StepClock command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 54. Move command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 55. GoTo command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 56. GoTo_DIR command structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 57. GoUntil command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 58. ReleaseSW command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 59. GoHome command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 60. GoMark command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 61. ResetPos command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 62. ResetDevice command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 63. SoftStop command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 64. HardStop command structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 65. SoftHiZ command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 66. HardHiZ command structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 67. GetStatus command structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 68. HTSSOP38 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 69. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
6/74 Doc ID 023278 Rev 1
L6480 List of figures
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 2. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 3. Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 4. Charge pump circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 5. Normal mode and microstepping (128 microsteps) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 6. Automatic full-step switching in Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 7. Automatic full-step switching in Boost mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 8. Constant speed command examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 9. Positioning command examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 10. Motion commands examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 11. OSCIN and OSCOUT pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 12. Overcurrent detection-principle scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 13. External switch connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 14. Gate driving currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 15. Device supply pin management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 16. Current distortion and compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 17. BEMF compensation curve. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 18. Motor supply voltage compensation circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 19. SPI timings diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 20. Daisy chain configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 21. Command with 3-byte argument . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 22. Command with 3-byte response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 23. Command response aborted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 24. HTSSOP38 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 25. HTSSOP38 footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Doc ID 023278 Rev 1 7/74
Block diagram L6480
1 Block diagram
Figure 1. Block diagram
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6$$
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34"92%3%4
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34#+
37
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6OLTAGE2EG
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632%'
6##
SENSING
6##2%'
6OLTAGE2EG
6## #0 6"//4
4EMPERATURE
62%'
62%'
#HARGE
PUMP
6##
6##
#/2%
,/')#
/VERCURRENT
DETECTION
-(Z
/SCILLATOR
%XT/SCDRIVER
#LOCKGEN
6##
6##
63
6"//4
6"//4
6"//4
6"//4
(6'!
/5
4!
,6'!
(6'!
/54!
,6'!
(6'"
/54"
,6'"
(6'"
/54"
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/3#). /3#/54
8/74 Doc ID 023278 Rev 1
0'.$
!-V
L6480 Electrical data
2 Electrical data
2.1 Absolute maximum ratings
Table 2. Absolute maximum ratings
Symbol Parameter Test condition Value Unit
V
V
V
V
BOOT
∆V
V
SREG
V
CCREG
V
OUT1A
V
OUT2A
V
OUT1B
V
OUT2B
SR
V
HVG1A
V
HVG2A
V
HVG1B
V
HVG2B
∆V
HVG1A
∆V
HVG2A
∆V
HVG1B
∆V
HVG2B
V
LVG 1 A
V
LVG 2 A
V
LVG 1 B
V
LVG 2 B
I
GATE-
CLAMP
V
ADCIN
DD
REG
V
S
CC
BOOT
out
Logic interface supply voltage 5.5 V
Logic supply voltage 3.6
Motor supply voltage 95 V
Low-side gate driver supply
voltage
18 V
Boot voltage 100 V
High-side gate driver supply
voltage
Internal VCC regulator supply
voltage
Internal V
regulator
REG
supply voltage
Full bridge output voltage
Full bridge outputs slew rate
(10% - 90%)
DC
AC
0 to 20 V
95 V
18 V
-5 to
V
BOOT
-15 to
V
BOOT
10 V/ns
High-side output driver
voltage
High-side output driver to
respective bridge output
voltage(V
HVG
- V
OUT
)
V
to
OUT
V
BOOT
15 V
Low-side output driver voltage VCC + 0.3 V
High-side gate voltage clamp
current capability
Integrated ADC input voltage
range (ADCIN pin)
100 mA
-0.3 to 3.6 V
V
V
V
out_diff
Differential voltage between
VBOOT, VS, OUT1A, OUT2A,
PGND and VBOOT, VS,
OUT1B, OUT2B, PGND pins
Doc ID 023278 Rev 1 9/74
100 V
Electrical data L6480
Table 2. Absolute maximum ratings (continued)
Symbol Parameter Test condition Value Unit
V
T
OP
T
P
Logic inputs voltage range -0.3 to 5.5 V
in
Operating junction
temperature
Storage temperature -55 to 150 °C
s
Total power dissipation (T
tot
= 25 ºC)
amb
Board characteristics: TBD TBD W
2.2 Recommended operating conditions
Table 3. Recommended operating conditions
Symbol Parameter Test condition Min. Typ. Max. Unit
V
V
REG
V
V
SREG
V
V
CCREG
Logic interface supply voltage
DD
Logic supply voltage 3.3 V
Motor supply voltage V
S
Internal V
Gate driver supply voltage
CC
Internal V
voltage regulator
CC
voltage regulator
REG
supply voltage
3.3 V logic outputs 3.3
5 V logic outputs 5
voltage internally
V
CC
generated
voltage imposed by
V
CC
external source (V
)
= V
CC
V
voltage internally
REG
generated
SREG
150 °C
SREG
+3 V
V
CC
7.5 15 V
6.3 V
85 V
s
CC
V
V
V
V
Integrated ADC input voltage
ADC
(ADCIN pin)
T
Operating junction temperature - 25 125 °C
j
2.3 Thermal data
Table 4. Thermal data
Symbol Parameter Package Typ. Unit
R
thj-a
10/74 Doc ID 023278 Rev 1
Thermal resistance junction-to-ambient HTSSOP38 TBD °C/W
0V
REG
V
L6480 Electrical characteristics
3 Electrical characteristics
VS = 48 V; VCC= 7.5 V; Tj = 25 °C, unless otherwise specified.
Table 5. Electrical characteristics
Symbol Parameter Test condition Min. Typ. Max. Unit
General
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
10.8 V
7
10.3 V
6.5
9.3 V
6V
8.8
5.5
2.8 V
2.6 V
(1)
TBD µA
CC
CC,
TBD mA
V
CCthOn
V
CCthOff
∆V
BOOTthOnVBOOT
∆V
BOOTthOffVBOOT
V
REGthOnVREG
V
REGthOffVREG
I
VSREGqu
I
VSREGq
VCC UVLO turn-on threshold
VCC UVLO turn-off threshold
- VS UVLO turn-on threshold
- VS UVLO turn-off threshold
turn-on threshold
turn-off threshold
Undervoltage V
quiescent supply
SREG
current
Quiescent V
supply current
SREG
UVLO_VAL set high
UVLO_VAL set low
UVLO_VAL set high
UVLO_VAL set low
UVLO_VAL set high
UVLO_VAL set low
UVLO_VAL set high
UVLO_VAL set low
(1)
(1)
CCREG
CCREG
shorted to V
shorted to V
(1)
V
V
internal oscillator
selected
Thermal protection
T
j(WRN)Set
T
j(WRN)Rec
T
j(OFF)Set
T
j(OFF)Rec
T
j(SD)Set
T
j(SD)Rec
Thermal warning temperature 135 °C
Thermal warning recovery temperature 125 °C
Thermal bridge shutdown temperature 155 °C
Thermal bridge shutdown recovery
temperature
Thermal device shutdown temperature 170 °C
Thermal device shutdown recovery
temperature
Charge pump
V
pump
f
pump,min
f
pump,max
R
pumpHS
R
pumpLS
Voltage swing for charge pump oscillator V
Minimum charge pump oscillator frequency
Maximum charge pump oscillator
frequency
Charge pump high-side R
Charge pump low-side R
(2)
145
130
CC
(2)
resistance TBD Ω
DS(ON)
resistance TBD Ω
DS(ON)
660 kHz
800 kHz
°C
°C
V
Doc ID 023278 Rev 1 11/74
Electrical characteristics L6480
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
I
boot
Average boot current TBD TBD µA
Gate Driver Outputs
I
GATE,Sink
Programmable high-side and low-side gate
sink current
Programmable high-side and low-side gate
I
GATE,Source
I
OB
R
CLAMP(LS)
R
CLAMP(HS)
V
GATE-
CLAMP
t
cc
t
OB
I
DSS
source current
High-side and low-side turn-off overboost
gate current
Low-side gate driver Miller clamp resistance 7 Ω
High-side gate driver Miller clamp resistance 3.5 Ω
High-side gate voltage clamp
Programmable constant gate current time
Programmable. Turn-off overboost; gate
current time
Leakage current
(2)
4mΑ
8
VS = 38 V
V
- V
HVGX
V
> 3 V
LVG X
OUTX
> 3 V
16
24
32
64
96
4mA
8
= 38 V
V
S
V
BOOTX
V
CC-VLVG X
- V
> 3.5 V
HVGX
> 3.5 V
16
24
32
64
96
103 mA
I
GATE-CLAMP=100 mA
I
GATE-CLAMP=100 µA
TCC=’00000’ 125
(2)
18.7
v
15.3
ns
TCC= 11111 3750
TBOOST=’001’, internal
oscillator
62.5 ns
TBOOST=’111’ 1000
OUT = V
S
TBD mA
OUT = GND TBD
I
GATE
V
= 15 V
CC
C
GATE
t
r
Rise time
I
GATE
V
CC
C
GATE
= 15 V
12/74 Doc ID 023278 Rev 1
= 4 mA
= 10 nC
= 32 mA
= 10 nC
TBD
ns
TBD
L6480 Electrical characteristics
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
= 96 mA
I
GATE
V
tr Rise time
t
f
Fall time
Deadtime and blanking
CC
C
GATE
I
GATE
V
CC
C
GATE
I
GATE
V
CC
C
GATE
I
GATE
V
CC
C
GATE
= 15 V
= 10 nC
= 4 mA
= 15 V
= 10 nC
= 32 mA
= 15 V
= 10 nC
= 96 mA
= 15 V
= 10 nC
TBD ns
TBD
TBD
ns
TBD
t
t
blank
Logic
V
V
V
V
R
PUCS
PDRST
R
PUSW
I
I
DT
IL
IH
IH
IL
OL
OH
Programmable deadtime
2
TDT= '00000' 125
ns
TDT=’11111’ 4000
TBLANK= '000' 125
Programmable blanking time2
ns
TBLANK=’111’ 1000
Low level logic input voltage 0.8 V
High level logic input voltage 2 V
High level logic input current VIN = 5 V 1 µA
Low level logic input current VIN = 0 V -1 µA
Low level logic output voltage
High level logic output voltage
(3)
VDD = 3.3 V, IOL = 4 mA 0.3
= 5 V, IOL = 4 mA 0.3
V
DD
V
= 3.3 V, IOH = 4 mA 2.4
DD
= 5 V, IOH = 4 mA 4.7
V
DD
V
V
CS pull-up resistor 430
STBY/RESET pull-down resistor 430
kΩR
CS pull-up resistor 65.2
3.3 V V
supplied, internal oscillator
externally
REG
5
I
logic
Internal logic supply current
3.3 V V
supplied, external 8-MHz
oscillator
3.3 V V
supplied, external 32-MHz
externally
REG
externally
REG
TBD
TBD
mA
oscillator
Doc ID 023278 Rev 1 13/74
Electrical characteristics L6480
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
I
logic,STBY
t
high,STCK
t
low,STCK
f
SYNC
Standby mode internal logic supply current
Step-clock input high time 300 ns
Step-clock input low time 300 ns
BUSY/SYNC output frequency
(2)
Internal oscillator and external oscillator driver
f
osc,int
f
osc,ext
V
OSCOUTH
V
OSCOUTL
t
rOSCOUT
t
fOSCOUT
t
high
t
extosc
t
intosc
Internal oscillator frequency Tj = 25 °C, -5% 16 +5% MHz
Programmable external oscillator frequency 8 32 MHz
OSCOUT clock source high level voltage Internal oscillator 2.4 V
OSCOUT clock source low level voltage Internal oscillator 0.3 V
OSCOUT clock source rise and fall time Internal oscillator 10 ns
OSCOUT clock source high time
Internal to external oscillator switching delay 3 ms
External to internal oscillator switching delay 100 µs
SPI
f
CK,MAX
t
rCK
t
fCK
t
hCK
t
lCK
t
setCS
t
holCS
t
disCS
t
setSDI
t
holSDI
t
enSDO
t
disSDO
t
vSDO
t
holSDO
Maximum SPI clock frequency
SPI clock rise and fall time
SPI clock high and low time
Chip select setup time
Chip select hold time
Deselect time
(5)
Data input setup time
Data input hold time
(5)
5)
(5)
(5)
Data output enable time
Data output disable time
Data output valid time
Data output hold time
5)
(5)
(4)
(5)
(5)
(5)
5)
PWM modulators
3.3 V V
externally
REG
supplied
R
=TBD, C
BUSY
Internal oscillator
5µA
=TBD 2 MHz
BUSY
62.5 ns
5MHz
90 ns
30 ns
30 ns
625 ns
20 ns
30 ns
0ns
1µs
95 ns
95 ns
35 ns
14/74 Doc ID 023278 Rev 1
L6480 Electrical characteristics
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
f
= 32 MHz
osc
f
PWM
Programmable PWM frequency
(2)
F_PWM_INT=’11X’
F_PWM_DEC=’000’
f
= 32 MHz
osc
F_PWM_INT=’000’
F_PWM_DEC=’111’
5.6 kHz
125
N
PWM
PWM resolution 8 bit
Overcurrent protection
V
OCD
V
OCD,offset
t
OCD,Comp
t
OCD,Flag
t
OCD,SD
Programmable overcurrent detection voltage
threshold
V
DS
Overcurrent detection V
offset
OCD comparator delay 100 ns
OCD to flag signal delay time C
OCD to shutdown delay time
Stall detection
V
STALL
V
STALL,offset
t
STALL,Comp
t
STALL
Programmable stall detection V
threshold
Stall detection V
Stall detection comparator delay 100 ns
Stall detection to flag signal delay time C
,Flag
Standby
I
STBY
Standby mode supply current
OCD_TH = ‘11111’ 1000 mV
OCD_TH = ‘00000’ 31 mV
voltage threshold
DS
(3)
DS
voltage
=TBDpF TBD ns
FLAG
TBD TBD µs
STALL_TH = '11111' 1000 mV
TBD TBD mV
STALL_TH = '00000' 31
voltage threshold offset TBD TBD mV
DS
=TBDpF TBD ns
FLAG
= V
V
CC
internally generated
(V
CCREG
V
SREG
V
= V
CC
voltages
REG
shorted to VCC)
=TBDV
voltages
REG
TBD µA
internally generated
(V
V
SREG
CCREG
=TBDV
shorted to VCC)
TBD 36
t
STBY,min
t
logicwu
t
cpwu
Minimum standby time 0.5 ms
Logic power-on and wake-up time 500 µs
Charge pump power-on and wake-up time
Internal voltage regulators
Power bridges disabled,
= 10 nF, C
C
p
=15 V
V
CC
= 220 nF,
boot
1ms
Doc ID 023278 Rev 1 15/74
Electrical characteristics L6480
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
V
CCOUT
V
CCREG,
drop
I
CCOUT
P
CC
V
REGOUT
V
CCREG,
drop
I
REGOUT
I
REGOUT,STB
Y
P
REG
Internal V
V
SREG to VCC
Internal V
Internal V
voltage regulator output voltage
CC
voltage regulator output current Short-circuit 180 360 mA
CC
voltage regulator power
CC
dissipation
Internal V
REG
voltage
V
CCREG to VREG
Internal V
REG
current
Internal V
REG
standby current
Internal V
REG
dissipation
dropout voltage ICC=TBD 3 V
voltage regulator output
dropout voltage I
voltage regulator output
voltage regulator output
voltage regulator power
Integrated analog to digital converter
N
ADC
V
ADC,ref
f
S
Analog to digital converter resolution 5 bit
Analog to digital converter reference voltage 3.3 V
Analog to digital converter sampling
frequency
Low (default), I
High, I
=10 mA 15
CC
=10 mA 7.3 7.5 V
CC
2.5 W
I
=TBDmA 3.3 V
REG
=TBD 3 V
REG
Short-circuit TBD 50 TBD mA
Short-circuit TBD 10 TBD mA
0.5 W
(2)
f
PWM
kHz
V
ADC,UVLO
1. Guaranteed in the temperature range -25 to 125 °C.
2. The value accuracy is dependent on oscillator frequency accuracy (Section 6.8).
3. FLAG
4. See Figure 19.
ADCIN UVLO threshold 1.05 1.16 1.35 V
and BUSY open drain outputs included.
16/74 Doc ID 023278 Rev 1
L6480 Pin connection
6##2%'
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4 Pin connection
Figure 2. Pin connection (top view)
4.1 Pin list
Table 6. Pin description
No. Name Type Function
11 VCCREG Power supply Internal V
voltage regulator supply voltage
REG
13 VREG Power supply Logic supply voltage
27 VDD Power supply Logic interface supply voltage
12 VSREG Power supply Internal V
voltage regulator supply voltage
CC
10 VCC Power supply Gate driver supply voltage
14 OSCIN Analog input
Oscillator pin1. To connect an external oscillator or
clock source
Oscillator pin2. To connect an external oscillator.
15 OSCOUT Analog output
When the internal oscillator is used, this pin can
supply a 2/4/8/16 MHz clock
9 CP Output Charge pump oscillator output
7 VBOOT Power supply
5 ADCIN Analog input Internal analog to digital converter input
6 VS Power supply Motor voltage
3 HVGA1 Power output High-side half bridge A1 gate driver output
Doc ID 023278 Rev 1 17/74
Bootstrap voltage needed for driving the high-side
power DMOS of both bridges (A and B)
Pin connection L6480
Table 6. Pin description (continued)
No. Name Type Function
36 HVGA2 Power output High-side half bridge A2 gate driver output
17 HVGB1 Power output High-side half bridge B1 gate driver output
22 HVGB2 Power output High-side half bridge B2 gate driver output
1 LVGA1 Power output Low-side half bridge A1 gate driver output
38 LVGA2 Power output Low-side half bridge A2 gate driver output
19 LVGB1 Power output Low-side half bridge B1 gate driver output
20 LVGB2 Power output Low-side half bridge B2 gate driver output
8,23,55 PGND Ground
2 OUTA1 Power input Full bridge A output 1
37 OUTA2 Power input Full bridge A output 2
18 OUTB1 Power input Full bridge B output 1
21 OUTB2 Power input Full bridge B output 2
16 AGND Ground
33 SW Logical input External switch input pin
29 DGND Ground
28 SDO Logical output Data output pin for serial interface
26 SDI Logical input Data input pin for serial interface
25 CK Logical input Serial interface clock
24 CS
30 BUSY/SYNC Open drain output
Logical input Chip select input pin for serial interface
Power ground pins. They must be connected to other
ground pins
Analog ground. It must be connected to other ground
pins
Digital ground. It must be connected to other ground
pins
By default, the BUSY
the device is performing a command.
The pin can be programmed in order to generate a
synchronization signal
/SYNC pin is forced low when
Status flag pin. An internal open drain transistor can
pull the pin to GND when a programmed alarm
31 FLAG
34
32 STCK Logical input Step-clock input
EPAD Exposed pad Ground
18/74 Doc ID 023278 Rev 1
STBY
RESET
Open drain output
Logical input
condition occurs (step loss, OCD, thermal prewarning or shutdown, UVLO, wrong command, nonperformable command)
Standby and reset pin. LOW logic level puts the
device in Standby mode and reset logic.
If not used, should be connected to V
Exposed pad. It must be connected to other ground
pins
REG
L6480 Typical applications
5 Typical applications
Table 7. Typical application values
Name Value
C
VSPOL
C
VS
C
BOOT
C
FLY
C
VSREG
C
VCC
C
VCCREG
C
VREG
C
VREGPOL
C
VDD
D1 Charge pump diodes
Q1,Q2,Q3,Q4,Q5,Q6,Q7
,Q8
R
PU
R
A
R
B
Figure 3. Typical application schematic
220 µF
220 nF
470 nF
47 nF
100 nF
470 nF
100 nF
100 nF
22 µF
100 nF
STD25NF10
39 kΩ
1.8 kΩ (VS = 85 V)
91 kΩ (VS = 85 V)
HOST
V
S
(10.5V - 85V)
C
BOOT
C
VREGPOL
C
VREG
R
PU
R
VREG
PU
FLAG
BUSY/SYNC
STBY/RESET
STCK
CS
CK
SDO
SDI
SW
OSCIN
OSCOUT
C
VCCREG
C
VCC
VCCREG
VCC CP VBOOT
VSREG
C
VDD
VDD
L6480
AGND
DGND
PGND
D1
C
VSREG
C
FLY
VS
ADCIN
HVGA1
OUTA1
LVGA1
LVGA2
OUTA2
HVGA2
HVGB1
OUTB1
LVGB1
LVGB2
OUTB2
HVGB2
C
C
VS
R
B
R
A
VSPOL
Q1 Q2
Q4Q3
Motor
Q5 Q6
Q8Q7
AM12826v1
Doc ID 023278 Rev 1 19/74
Functional description L6480
6 Functional description
6.1 Device power-up
During power-up, the device is under reset (all logic IOs disabled and power bridges in high
impedance state) until the following conditions are satisfied:
● V
●
●
●
● STBY/RESET input is forced high.
After power-up, the device state is the following:
● Parameters are set to default
● Internal logic is driven by internal oscillator and a 2-MHz clock is provided by the
● Bridges are disabled (high impedance).
is greater than V
CC
V
- VS is greater than ∆V
BOOT
V
is greater than V
REG
CCthOn
REGthOn
Internal oscillator is operative
OSCOUT pin
BOOTthOn
After power-up, a period of t
oscillator and logic startup.
Any movement command makes the device exit from High Z state (HardStop and SoftStop
included).
6.2 Logic I/O
Pins CS, CK, SDI, STCK, SW and STBY/RESET are TTL/CMOS 3.3 V-5 V compatible logic
inputs.
Pin SDO is a TTL/CMOS compatible logic output. VDD pin voltage imposes logical output
voltage range.
Pins FLAG
SW and CS
and BUSY/SYNC are open drain outputs.
inputs are internally pulled up to VDD and STBY/RESET input is internally
pulled down to ground.
6.3 Charge pump
To ensure the correct driving of the high-side integrated MOSFETs, a voltage higher than
the motor power supply voltage needs to be applied to the VBOOT pin. The high-side gate
driver supply voltage V
components realizing a charge pump (see Figure 4).
must pass before applying a command to allow proper
logicwu
is obtained through an oscillator and a few external
BOOT
20/74 Doc ID 023278 Rev 1
L6480 Functional description
Figure 4. Charge pump circuitry
6
6
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6.4 Microstepping
The driver is able to divide the single step into up to 128 microsteps. Stepping mode can be
programmed by the STEP_SEL parameter in the STEP_MODE register (Table 20.).
Step mode can be only changed when bridges are disabled. Every time the step mode is
changed, the electrical position (i.e. the point of microstepping sinewave that is generated)
is reset to the first microstep and the absolute position counter value (Section 6.5) becomes
meaningless.
7
TOHIGHSIDE
GATEDRIVERS
#
6"//4 #0
6$$
&,9
6
#0
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F
05-0
!-V
Figure 5. Normal mode and microstepping (128 microsteps)
2ESET
POSITION
.ORMALDRIVING -ICROSTEPPING
0(!3%!CURRENT
0(!3%"CURRENT
STEP STEPSTEP STEP STEP STEP
2ESET
POSITION
0(!3%!CURRENT
0(!3%"CURRENT
STEPS
Doc ID 023278 Rev 1 21/74
STEPS
STEPS
STEPS
STEPSTEP STEP STEP
MICROSTEPS
".W
Functional description L6480
6.4.1 Automatic Full-step and Boost modes
When motor speed is greater than a programmable full-step speed threshold, the L6480
switches automatically to Full-step mode; the driving mode returns to microstepping when
motor speed decreases below the full-step speed threshold.
The switching between the microstepping and Full-step mode and vice-versa is always
performed at an electrical position multiple of π/4 (Figure 6 andFigure 7).
Full-step speed threshold is set through the related parameter in the FS_SPD register
(Section 9.1.9).
When the BOOST_MODE bit of the FS_SPD register is low (default), the amplitude of the
voltage squarewave in Full-step mode is equal to the peak of the voltage sinewave multiplied
by sine(π/4) (Figure 6). This avoids the current drop between the two driving modes.
When the BOOST_MODE bit of the FS_SPD register is high, the amplitude of the voltage
squarewave in Full-step mode is equal to the peak of the voltage sinewave (Figure 7). That
improves the output current increasing the maximum motor torque.
Figure 6. Automatic full-step switching in Normal mode
V
peak
Phase A
sin(π /4 )x V
peak
Phase B
Microstepping
Full-Step
(2N+1) x π /4 (2N+1) x π /4
Microstepping
AM12829v1
22/74 Doc ID 023278 Rev 1
L6480 Functional description
Figure 7. Automatic full-step switching in Boost mode
V
peak
Phase A
V
peak
Phase B
Microstepping
(2N+1) x π /4 (2N+1) x π/4
6.5 Absolute position counter
An internal 22-bit register (ABS_POS) records all the motor motions according to the
selected step mode; the stored value unit is equal to the selected step mode (full, half,
quarter, etc.). The position range is from -2
6.6 Programmable speed profiles
The user can easily program a customized speed profile defining independently
acceleration, deceleration, maximum and minimum speed values by ACC, DEC,
MAX_SPEED and MIN_SPEED registers respectively (see Section 9.1.5, 9.1.6, 9.1.7 and
9.1.8).
When a command is sent to the device, the integrated logic generates the microstep
frequency profile that performs a motor motion compliant to speed profile boundaries.
All acceleration parameters are expressed in step/tick
expressed in step/tick; the unit of measurement does not depend on the selected step
mode. Acceleration and deceleration parameters range from 2
(equivalent to 14.55 to 59590 step/s
Minimum speed parameter ranges from 0 to (2
step/s).
Maximum speed parameter ranges from 2
15610 step/s).
2
).
-18
Full-Step
21
to +221-1 steps (see Section 9.1.1).
2
and all speed parameters are
12-1
-24
)•2
step/tick (equivalent to 0 to 976.3
to (210-1)• 2
-18
Microstepping
-40
to (212-2)•2
step/tick (equivalent to 15.25 to
AM12850v1
-40
step/tick2
Doc ID 023278 Rev 1 23/74
Functional description L6480
6.7 Motor control commands
The L6480 can accept different types of commands:
● constant speed commands (Run, GoUntil, ReleaseSW)
● absolute positioning commands (GoTo, GoTo_DIR, GoHome, GoMark)
● motion commands (Move)
● stop commands (SoftStop, HardStop, SoftHiz, HardHiz).
For detailed command descriptions refer to Section 9.2 on page 60.
6.7.1 Constant speed commands
A constant speed command produces a motion in order to reach and maintain a userdefined target speed starting from the programmed minimum speed (set in the MIN_SPEED
register) and with the programmed acceleration/deceleration value (set in the ACC and DEC
registers). A new constant speed command can be requested anytime.
Figure 8. Constant speed command examples
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MAXIMUM
SPEED
0ROGRAMMEDNUMBEROFMICROSTEPS
EXINGMODE #ONSTANTSPEEDMODE
)ND
6.7.2 Positioning commands
An absolute positioning command produces a motion in order to reach a user-defined
position that is sent to the device together with the command. The position can be reached
performing the minimum path (minimum physical distance) or forcing a direction (see
Figure 9).
Performed motor motion is compliant to programmed speed profile boundaries
(acceleration, deceleration, minimum and maximum speed).
Note that with some speed profiles or positioning commands, the deceleration phase can
start before the maximum speed is reached.
TIME
TIME
!-V
24/74 Doc ID 023278 Rev 1
L6480 Functional description
Figure 9. Positioning command examples
Speed
(step frequency)
SPD3
Run(SPD4,BW)
SPD1
SPD2
Run(SPD2,FW)
Minimum
speed
Minimum
speed
SPD4
Run(SPD1,FW)
Run(SPD3,FW)
time
AM12856v1
6.7.3 Motion commands
Motion commands produce a motion in order to perform a user-defined number of
microsteps in a user-defined direction that are sent to the device together with the command
(see Figure 10).
Performed motor motion is compliant to programmed speed profile boundaries
(acceleration, deceleration, minimum and maximum speed).
Note that with some speed profiles or motion commands, the deceleration phase can start
before the maximum speed is reached.
Figure 10. Motion commands examples
&ORWARD
DI
RECTION
0RESENT
POSITION
'O4O4ARGETPOS
4ARGET
POSITION
0RESENT
POSITION
'O4O?$)24ARGETPOS&7
4ARGET
POSITION
!-V
6.7.4 Stop commands
A stop command forces the motor to stop. Stop commands can be sent anytime.
Doc ID 023278 Rev 1 25/74
Functional description L6480
The SoftStop command causes the motor to decelerate with a programmed deceleration
value until MIN_SPEED value is reached and then stops the motor keeping the rotor
position (a holding torque is applied).
The HardStop command stops the motor instantly, ignoring deceleration constraints and
keeping the rotor position (a holding torque is applied).
The SoftHiZ command causes the motor to decelerate with a programmed deceleration
value until the MIN_SPEED value is reached and then forces the bridges into high
impedance state (no holding torque is present).
The HardHiZ command instantly forces the bridges into high impedance state (no holding
torque is present).
6.7.5 Step-clock mode
In Step-clock mode the motor motion is defined by the step-clock signal applied to the STCK
pin. At each step-clock rising edge, the motor is moved one microstep in the programmed
direction and absolute position is consequently updated.
When the system is in Step-clock mode the SCK_MOD flag in the STATUS register is
raised, the SPEED register is set to zero and motor status is considered stopped regardless
of the STCK signal frequency (the MOT_STATUS parameter in the STATUS register equal to
“00”).
6.7.6 GoUntil and ReleaseSW commands
In most applications the power-up position of the stepper motor is undefined, so an
initialization algorithm driving the motor to a known position is necessary.
The GoUntil and ReleaseSW commands47
can be used in combination with external switch input (see Section 6.14) to easily initialize
the motor position.
The GoUntil command makes the motor run at target constant speed until the SW input is
forced low (falling edge). When this event occurs, one of the following actions can be
performed:
● ABS_POS register is set to zero (home position) and the motor decelerates to zero
speed (as a SoftStop command)
● ABS_POS register value is stored in the MARK register and the motor decelerates to
zero speed (as a SoftStop command).
If the SW_MODE bit of the CONFIG register is set to ‘0’, the motor does not decelerate but
it immediately stops (as a HardStop command).
The ReleaseSW command makes the motor run at a programmed minimum speed until the
SW input is forced high (rising edge). When this event occurs, one of the following actions
can be performed:
● ABS_POS register is set to zero (home position) and the motor immediately stops (as a
HardStop command)
● ABS_POS register value is stored in the MARK register and the motor immediately
stops (as a HardStop command).
If the programmed minimum speed is less than 5 step/s, the motor is driven at 5 step/s.
26/74 Doc ID 023278 Rev 1
L6480 Functional description
6.8 Internal oscillator and oscillator driver
The control logic clock can be supplied by the internal 16-MHz oscillator, an external
oscillator (crystal or ceramic resonator) or a direct clock signal.
These working modes can be selected by EXT_CLK and OSC_SEL parameters in the
CONFIG register (see Ta b le 3 2 ).
At power-up the device starts using the internal oscillator and provides a 2-MHz clock signal
on the OSCOUT pin.
Attention: In any case, before changing clock source configuration, a
hardware reset is mandatory. Switching to different clock
configurations during operation may cause unexpected
behavior.
6.8.1 Internal oscillator
In this mode the internal oscillator is activated and OSCIN is unused. If the OSCOUT clock
source is enabled, the OSCOUT pin provides a 2, 4, 8 or 16-MHz clock signal (according to
OSC_SEL value); otherwise it is unused (see Figure 11).
6.8.2 External clock source
Two types of external clock source can be selected: crystal/ceramic resonator or direct clock
source. Four programmable clock frequencies are available for each external clock source:
8, 16, 24 and 32-MHz.
When an external crystal/resonator is selected, the OSCIN and OSCOUT pins are used to
drive the crystal/resonator (see Figure 11). The crystal/resonator and load capacitors (C
must be placed as close as possible to the pins. Refer to Ta bl e 8 for the choice of the load
capacitor value according to the external oscillator frequency.
Table 8. CL values according to external oscillator frequency
Crystal/resonator freq.
8 MHz 25 pF (ESR
16 MHz 18 pF (ESR
24 MHz 15 pF (ESR
32 MHz 10 pF (ESR
1. First harmonic resonance frequency.
2. Lower ESR value allows driving greater load capacitors.
If a direct clock source is used, it must be connected to the OSCIN pin and the OSCOUT pin
supplies the inverted OSCIN signal (see Figure 11).
(1)
CL
(2)
max
max
max
max
= 80 Ω)
= 50 Ω)
= 40 Ω)
= 40 Ω)
)
L
The L6480 integrates a clock detection system that resets the device in case of the failure of
the external clock source (direct or crystal/resonator). The monitoring of the clock source is
disabled by default, it can be enabled setting high the WD_EN bit in the GATECFG1 register
Doc ID 023278 Rev 1 27/74
Functional description L6480
(Section 9.1.21). When the external clock source is selected, the device continues to work
with the integrated oscillator for t
milliseconds and then the clock management system
extosc
switches to the OSCIN input.
Figure 11. OSCIN and OSCOUT pin configuration
%84?#,+ %84?#,+
-(Z
#, # ,
-(Z
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Note: When OSCIN is UNUSED, it should be left floating.
When OSCOUT is UNUSED it should be left floating.
6.9 Overcurrent detection
The L6480 measures the load current of each half bridge sensing the VDS voltage of all the
Power MOSFETs (Figure 12). When any of the V
threshold, the OCD flag in the STATUS register is forced low until the event expires and a
GetStatus command is sent to the device (Section 9.1.24 and Section 9.2.20). The
overcurrent event expires when all the Power MOSFET V
programmed threshold.
The overcurrent threshold can be programmed by the OCD_TH register in one of 32
available values ranging from 31.25 mV to 1 V with steps of 31.25 mV (Ta bl e 1 8
Section 9.1.17).
DS
/3#). /3#/54
)NTERNALOSCILLATOR
CONFIGURATION
WITHCL
OCKGENERATION
!-V
voltages rise over the programmed
voltages fall below the
DS
28/74 Doc ID 023278 Rev 1
L6480 Functional description
Figure 12. Overcurrent detection-principle scheme
,/')##/2%
/#$?(3XX
6OLTAGE
#OMPARATOR
6S
6S
(6'XX
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The overcurrent detection comparators are disabled, in order to avoid wrong voltage
measurements, in the following cases:
● The respective half bridge is in high impedance state (both gates forced off)
● The respective half bridge is commutating
● The respective half bridge is commutated and the programmed blanking time has not
yet elapsed
● The respective gate is turned off.
It is possible to set if an overcurrent event causes the bridge turn-off or not through the
OC_SD bit in the CONFIG register.
When the power bridges are turned off by an overcurrent event, they cannot be turned on
until the OCD flag is released by a GetStatus command.
6.10 Undervoltage lockout (UVLO)
The L6480 provides a programmable gate driver supply voltage UVLO protection. When
one of the supply voltages of the gate driver (V
high sides) falls below the respective turn-off threshold, an undervoltage event occurs. In
this case, all gates are immediately turned off and the UVLO flag in the STATUS register is
forced low.
The UVLO flag is forced low and the gates are kept off until the gate driver supply voltages
return to above the respective turn-on threshold; in this case the undervoltage event expires
and the UVLO flag can be released through a GetStatus command.
The UVLO thresholds can be selected between two sets according to the UVLOVAL bit
value in the CONFIG register.
Doc ID 023278 Rev 1 29/74
for the low sides and V
CC
- VS for the
BOOT
Functional description L6480
Table 9. UVLO thresholds
UVLOVAL
01
Low-side gate driver supply turn-off threshold
CCthOff
CCthOn
BOOTthOff
BOOTthOff
)
)
)
)
(V
Low-side gate driver supply turn-on threshold
(V
High-side gate driver supply turn-off threshold
(∆V
High-side gate driver supply turn-on threshold
(∆V
6.11 VS undervoltage lockout (UVLO_ADC)
The device provides an undervoltage signal of the integrated ADC input voltage (the
UVLO_ADC flag in the STATUS register). When V
UVLO_ADC flag is forced low and it is kept in this state until the ADCIN voltage is greater
than V
ADC,UVLO
and a GetStatus command is sent to the device.
The ADCIN undervoltage event doesn’t turn off the gates of the power bridges.
The motor supply voltage undervoltage detection can be performed by means of this
feature, connecting the ADCIN pin to VS through a voltage divider as described in
Section 7.5.
ADCIN
6.5 V 10.3 V
7 V 10.8 V
5.5 V 8.8 V
6 V 9.3 V
falls below the V
ADC,UVLO
value the
6.12 Thermal warning and thermal shutdown
An integrated sensor allows detection of the internal temperature and implementation of a 3level protection.
When the T
j(WRN)Set
warning condition and it expires when the temperature falls below the T
When the T
j(OFF)Set
circuitry is disabled (Miller clamps are still operative). This condition expires when the
temperature falls below the T
When the T
internal V
j(SD)OFF
voltage regulator is disabled and the current capability of the internal V
CC
voltage regulator is reduced (thermal shutdown). In this condition logic is still active (if
supplied). The thermal shutdown condition only expires when the temperature goes below
T
j(SD)ON
.
The thermal condition of the device is shown by TH_STATUS bits in the STATUS register
(Ta bl e 1 0).
threshold is reached, a warning signal is generated. This is the thermal
threshold is reached, all the gates are turned off and the gate driving
j(OFF)Rel
threshold.
threshold is reached, all the gates are turned off using Miller clamps, the
j(WRN)Rel
threshold.
REG
30/74 Doc ID 023278 Rev 1
L6480 Functional description
Table 10. Thermal protection summarizing table
State Set condition Release condition Description TH_STATUS
Normal Normal operation state 00
Warning T
Bridge shutdown T
Device shutdown T
j > Tj(WRN)Set
j > Tj(OFF)Set
j > Tj(SD)Set
6.13 Reset and standby
The device can be reset and put into Standby mode through the STBY/RESET pin. When it
is forced low, all the gates are turned off (High Z state), the charge pump is stopped, the SPI
interface and control logic are disabled and the internal
output current is limited; as a result, the L6480 heavily reduces the power consumption. At
the same time the register values are reset to their default and all the protection functions
are disabled. The STBY
ensure the complete switch to Standby mode.
/RESET input must be forced low at least for t
T
j > Tj(WRN)Rel
T
j > Tj(OFF)Rel
T
j > Tj(SD)Rel
Temperature warning: operation is
not limited
High temperature protection: the
gates are turned off and the gate
drivers are disabled
Overtemperature protection: the
gates are turned off, the gate
drivers are disabled, the internal
voltage regulator is disabled,
V
CC
the current capability of the
internal V
limited, and the charge pump is
disabled
voltage regulator is
REG
V
voltage regulator maximum
REG
STBY,min
01
10
11
in order to
On exiting Standby mode, as well as for IC power-up, a delay must be given before applying
a new command to allow proper oscillator and charge pump startup. Actual delay could vary
according to the values of the charge pump external components.
On exiting Standby mode all the gates are off and the HiZ flag is high.
The registers can be reset to the default values without putting the device into Standby
mode through the ResetDevice command (Section 9.2.14).
6.14 External switch (SW pin)
The SW input is internally pulled up to VDD and detects if the pin is open or connected to
ground (see Figure 13).
The SW_F bit of the STATUS register indicates if the switch is open (‘0’) or closed (‘1’)
(Section 9.1.24); the bit value is refreshed at every system clock cycle (125 ns). The
SW_EVN flag of the STATUS register is raised when a switch turn-on event (SW input falling
edge) is detected (Section 9.1.24). A GetStatus command releases the SW_EVN flag
(Section 9.2.20).
By default, a switch turn-on event causes a HardStop interrupt (SW_MODE bit of CONFIG
register set to ‘0’). Otherwise (SW_MODE bit of CONFIG register set to ‘1’), switch input
Doc ID 023278 Rev 1 31/74
Functional description L6480
events do not cause interrupts and the switch status information is at the user’s disposal
(Ta bl e 3 2 Section 9.1.24).
The switch input can be used by GoUntil and ReleaseSW commands as described in
Section 9.2.10 and Section 9.2.11.
If the SW input is not used, it should be connected to V
Figure 13. External switch connection
V
DD
SW
6.15 Programmable gate drivers
The L6480 integrates eight programmable gate drivers that allow the fitting of a wide range
of applications.
The following parameters can be adjusted:
● gate sink/source current (I
● controlled current time (t
● turn-off overboost time (t
During turn-on, the gate driver charges the gate forcing an I
current time period. At the end of the controlled current phase the gate of the external
MOSFET should be completely charged, otherwise the gate driving circuitry continues to
charge it using a holding current.
CC
OB
GATE
)
).
)
DD
External
Switch
.
current for all the controlled
GATE
AM12833v1
This current is equal to I
for the low-side gate drivers and 1 mA for the high-side ones.
GATE
During turn-off, the gate driver discharges the gate sinking an I
controlled current time period. At the beginning of turn-off an overboost phase can be
added: in this case the gate driver sinks an I
current for the programmed tOB period in
OB
order to rapidly reach the plateau region. At the end of the controlled current time the gate of
the external MOSFET should be completely charged, otherwise the gate driving circuitry
discharges it using the integrated Miller clamp.
32/74 Doc ID 023278 Rev 1
current for all the
GATE
L6480 Functional description
Figure 14. Gate driving currents
'ATEDISCHARGED
T
##
)
GATE
'ATETURNOFF
!-V
'ATE#URRENT
'ATECHARGED
T
##
)
GATE
'ATETURNON
T
/"
)
/"
The gate current can be set to one of the following values: 4, 8, 16, 24, 32, 64 and 96 mA
through the IGATE parameter in the GATECFG1 register (see Section 9.1.21).
Controlled current time can be programmed within range from 125 ns to 3.75 µs with a
resolution of 125 ns (TCC parameter in GATECFG1 register) (see Section 9.1.21).
Turn-off overboost time can be set to one of the following values: 0, 62.5, 125, 250 ns
(TBOOST parameter in GATECFG1 register). The 62.5 ns value is only available when clock
frequency is 16 MHz or 32 MHz; when clock frequency is 8 MHz it is changed to 125 ns and
when a 24-MHz clock is used it is changed to 83.3 ns. (see Section 9.1.21).
6.16 Deadtime and blanking time
During the bridge commutation, a deadtime is added in order to avoid cross conductions.
The deadtime can be programmed within a range from 125 ns to 4 µs with a resolution of
125 ns (TDT parameter in the GATECFG2 register) (see Section 9.1.22).
At the end of each commutation the overcurrent and stall detection comparators are
disabled (blanking) in order to avoid the respective systems detecting body diodes turn-off
current peaks.
The duration of blanking time is programmable through the TBLANK parameter in the
GATECFG2 register at one of the following values: 125, 250, 375, 500, 625, 750, 875, 1000
ns (see Section 9.1.22).
6.17 Integrated analog to digital converter
The L6480 integrates an N
voltage equal to
V
. The analog to digital converter input is available through the ADCIN
REG
pin and the conversion result is available in the ADC_OUT register (Section 9.1.16).
Sampling frequency is equal to the programmed PWM frequency.
bit ramp-compare analog to digital converter with a reference
ADC
Doc ID 023278 Rev 1 33/74
Functional description L6480
The ADC_OUT value can be used for motor supply voltage compensation or can be at the
user’s disposal.
6.18 Supply management and internal voltage regulators
The L6480 integrates two linear voltage regulators: the first one can be used to obtain gate
driver supply starting from a higher voltage (e.g. the motor supply one). Its output voltage
can be set to 7.5 V or 15 V according to the VCCVAL bit value (CONFIG register). The
second linear voltage regulator can be used to obtain the 3.3 V logic supply voltage.
The input and output voltages of both regulators are connected to external pins and the
regulators are totally independent: in this way a very flexible supply management can be
performed using external components or external supply voltages (Figure 15).
Figure 15. Device supply pin management
!LLVOLTAGESAREINTERNALLYGENERATED !LLVOLTAGESAREEXTERNALLYSUPPLIED
6"//4
#0
63
6"53
6"//4
#0
63
6"53
632%'
66
If V
is externally supplied, the VSREG and VCC pins must be shorted (V
CC
compliant with V
If V
is externally supplied, the VCCREG and VREG pins must be shorted and equal to
REG
6
CC
6##
6##2%'
62%'
range).
5SINGEXTERNALCOMPONENTS
ZENERDIODESRESISTORSIT
ISPOSSIBLETOREDUCEINTERNAL
POWERDISSIPATIONCONSTRAINS
66
6
632%'
6##
6##2%'
62%'
SREG
6##
6
!-V
must be
3.3 V.
V
must be always less than V
SREG
in order to avoid related ESD protection diode turn-
BOOT
on. The device can be protected from this event by adding an external low drop diode
between the VSREG and VS pins, charge pump diodes should be low drop too.
V
must be always less than VCC in order to avoid ESD protection diode turn-on. The
CCREG
device can be protected from this event by adding an external low drop diode between the
VCCREG and VSREG pins.
34/74 Doc ID 023278 Rev 1
L6480 Functional description
6.19 BUSY/SYNC pin
This pin is an open drain output which can be used as busy flag or synchronization signal
according to the SYNC_EN bit value (STEP_MODE register) (see Section 9.1.19).
6.20 FLAG pin
By default, an internal open drain transistor pulls the FLAG pin to ground when at least one
of the following conditions occurs:
● Power-up or standby/reset exit
● Stall detection on bridge A
● Stall detection on bridge B
● Overcurrent detection
● Thermal warning
● Thermal shutdown
● UVLO
● UVLO on ADC input
● Switch turn-on event
● Command error.
It is possible to mask one or more alarm conditions by programming the ALARM_EN
register (see Section 9.1.20 Ta bl e 2 3). If the corresponding bit of the ALARM_EN register is
low, the alarm condition is masked and it does not cause a FLAG pin transition; all other
actions imposed by alarm conditions are performed anyway. In case of daisy chain
configuration, FLAG pins of different ICs can be or-wired to save host controller GPIOs.
Doc ID 023278 Rev 1 35/74
Phase current control L6480
7 Phase current control
The L6480 controls the phase current applying a sinusoidal voltage to motor windings.
Phase current amplitude is not directly controlled but depends on phase voltage amplitude,
load torque, motor electrical characteristics and rotation speed. Sinewave amplitude is
proportional to the motor supply voltage multiplied by a coefficient (K
0 to 100% and the sinewave amplitude can be obtained through the following formula:
Equation 1
V
OUT
VSK
⋅=
VAL
VAL
). K
VAL
ranges from
Different K
values can be programmed for acceleration, deceleration and constant speed
VAL
phases and when the motor is stopped (HOLD phase) through KVAL_ACC, KVAL_DEC,
KVAL_RUN and KVAL_HOLD registers (Section 9.1.10). KVAL value is calculated
according to the following formula:
Equation 2
where K
K
VAL_X
VAL
K
VAL_X
is the starting K
BEMF_COMP+()VSCOMP K_THERM××[]microst× ep=
value programmed for the present motion phase
VAL
(KVAL_ACC, KVAL_DEC, KVAL_RUN or KVAL_HOLD), BEMF_COMP is the BEMF
compensation curve value, VSCOMP and K_THERM are the motor supply voltage and
winding resistance compensation factors and microstep is the current microstep value
(fraction of target peak current).
The L6480 offers various methods to guarantee a stable current value, allowing the
compensation of:
● low speed distortion (Section 7.3)
● back electromotive force (Section 7.4)
● motor supply voltage variation (Section 7.5)
● windings resistance variation (Section 7.6).
7.1 PWM sinewave generators
The two voltage sinewaves applied to the stepper motor phases are generated by two PWM
modulators.
The PWM frequency (f
obtained through the following formula:
Equation 3
36/74 Doc ID 023278 Rev 1
) is proportional to the oscillator frequency (f
PWM
f
OSC
f
PWM
------------- --------
512 N⋅
) and can be
OSC
m⋅=
L6480 Phase current control
'N' is the integer division factor and 'm' is the multiplication factor. 'N' and 'm' values can be
programmed by F_PWM_INT and F_PWM_DEC parameters in the CONFIG register (see
Ta bl e 3 8 and Ta bl e 3 9 , Section 9.1.23).
Available PWM frequencies are listed in Section 9.1.23 from Ta b le 4 0 to Tab le 4 3 .
7.2 Sensorless stall detection
The L6480 is able to detect a motor stall caused by an excessive load torque. When the
motor is driven using the voltage mode approach, a stall condition corresponds to an
unexpected increase of the phase current. Imposing a current threshold slightly above the
operative current, it is possible to detect the stall condition without speed or position
sensors.
The L6480 measures the load current of each phase sensing the V
side Power MOSFETs. When any of the V
the STEP_LOSS_X flag in the STATUS register of the respective bridge (STEP_LOSS_A or
STEP_LOSS_B) is forced low. The failure flag is kept low until the V
the programmed threshold and a GetStatus command is sent to the device (Section 9.1.24
and Section 9.2.20).
The stall detection threshold can be programmed in one of 32 available values ranging from
31.25 mV to 1 V with steps of 31.25 mV (seeSection 9.1.18).
Stall detection comparators are disabled, in order to avoid wrong voltage measurements, in
the following cases:
● The respective half bridge is in high impedance state (both gates forced off)
● The respective half bridge is commutating
● The respective half bridge is commutated and the programmed blanking time has not
yet elapsed
● The respective low-side gate is turned off.
7.3 Low speed optimization
When the motor is driven at a very low speed using a small driving voltage, the resulting
phase current can be distorted. As a consequence, the motor position is different from the
ideal one (see Figure 16).
voltage of the low-
voltages rise over the programmed threshold,
DS
DS
voltages fall below
DS
The device implements a low speed optimization in order to remove this effect.
Doc ID 023278 Rev 1 37/74
Phase current control L6480
Figure 16. Current distortion and compensation
7ITHOUTLOWSPEEDOPTIMIZAZION
)
PHASE
7ITHLOWSPEEDOPTIMIZAZION
)
PHASE
#URRENTDISTORTIONISHEAVILY
REDUCED
The optimization can be enabled setting high the LSPD_OPT bit in the MIN_SPEED register
(Section 9.1.8) and is active in a speed range from zero to MIN_SPEED. When low speed
optimization is enabled, speed profile minimum speed is forced to zero.
7.4 BEMF compensation
Using the speed information, a compensation curve is added to the amplitude of the voltage
waveform applied to the motor winding in order to compensate the BEMF variations during
acceleration and deceleration (see Figure 17).
The compensation curve is approximated by a stacked line with a starting slope (ST_SLP)
when speed is lower than a programmable threshold speed (INT_SPEED) and a fine slope
(FN_SLP_ACC and FN_SLP_DEC) when speed is greater than the threshold speed (see
sections 9.1.11, 9.1.12, 9.1.13 and 9.1.14).
!-V
38/74 Doc ID 023278 Rev 1
L6480 Phase current control
Figure 17. BEMF compensation curve
#OMPENSATION
VALUE
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&.?3,0?
).4?30%%$
!##
To obtain different current values during acceleration and deceleration phase, two different
final slope values, and consequently two different compensation curves, can be
programmed.
Acceleration compensation curve is applied when the motor runs. No BEMF compensation
is applied when the motor is stopped.
7.5 Motor supply voltage compensation
The sinewave amplitude generated by the PWM modulators is directly proportional to the
motor supply voltage (V
the motor phases are driven with an incorrect voltage. The L6480 can compensate motor
supply voltage variations in order to avoid this effect.
). When the motor supply voltage is different from its nominal value,
S
&.?3,0?$%#
3PEED
!-V
The motor supply voltage should be connected to the integrated ADC input through a
resistor divider in order to obtain V
/2 voltage at the ADCIN pin when VS is at its nominal
REG
value (see Figure 18).
The ADC input is sampled at f
Figure 18. Motor supply voltage compensation circuit
V
= VS x RB / (RA + RB)
ADCIN
frequency, which is equal to PWM frequency.
S
V
S
V
REG
R
A
R
B
ADCIN
ADC
f
PWM
5
ADC_OUT
AM12836v1
Doc ID 023278 Rev 1 39/74
Phase current control L6480
Motor supply voltage compensation can be enabled setting high the EN_VSCOMP bit of the
CONFIG register (see Ta bl e 3 7,Section 9.1.23). If the EN_VSCOMP bit is low, the
compensation is disabled and the internal analog to digital converter is at the user’s
disposal; the sampling rate is always equal to PWM frequency.
7.6 Winding resistance thermal drift compensation
The higher the winding resistance the greater the voltage to be applied in order to obtain the
same phase current.
The L6480 integrates a register (K_THERM) which can be used to compensate phase
resistance increment due to temperature rising.
The value in the K_THERM register (Section 9.1.15) multiplies duty cycle value allowing the
higher phase resistance value to be faced.
The compensation algorithm and the eventual motor temperature measurement should be
implemented by microcontroller firmware.
40/74 Doc ID 023278 Rev 1
L6480 Serial interface
8 Serial interface
The integrated 8-bit serial peripheral interface (SPI) is used for a synchronous serial
communication between the host microprocessor (always master) and the L6480 (always
slave).
The SPI uses chip select (CS
output (SDO) pins. When CS
), serial clock (CK), serial data input (SDI) and serial data
is high the device is unselected and the SDO line is inactive
(high impedance).
The communication starts when CS
is forced low. The CK line is used for synchronization of
data communication.
All commands and data bytes are shifted into the device through the SDI input, most
significant bit first. The SDI is sampled on the rising edges of the CK.
All output data bytes are shifted out of the device through the SDO output, most significant
bit first. The SDO is latched on the falling edges of the CK. When a return value from the
device is not available, an all zero byte is sent.
After each byte transmission the CS
input must be raised and be kept high for at least t
disCS
in order to allow the device to decode the received command and put the return value into
the shift register.
All timing requirements are shown in Figure 19 (see Section 3 for values).
Multiple devices can be connected in daisy chain configuration, as shown in Figure 20.
Figure 19. SPI timings diagram
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TSET#3
TR#+ TF#+TH#+ T L#+
TDIS#3
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-3"
. .
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. .
Doc ID 023278 Rev 1 41/74
THOL#3
,3"
TDIS3$/
-3"
!-V
Serial interface L6480
Figure 20. Daisy chain configuration
$%6
(/3430)SIGNALS
#3
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-
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"YTE.
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42/74 Doc ID 023278 Rev 1
L6480 Programming manual
9 Programming manual
9.1 Registers and flags description
The following shows the user registers available (detailed description in respective
paragraphs):
Table 11. Registers map
Address
[Hex]
Register name Register function
Len.
[bit]
Reset
Hex
Reset
Val ue
Remarks
h01 ABS_POS Current position 22 000000 0 R, WS
h02 EL_POS Electrical position 9 000 0 R, WS
h03 MARK Mark position 22 000000 0 R, WR
h04 SPEED Current speed 20 00000 0 step/tick (0 step/s) R
h05 ACC Acceleration 12 08A
h06 DEC Deceleration 12 08A
h07 MAX_SPEED Maximum speed 10 041
h08 MIN_SPEED Minimum speed 12 000
h15 FS_SPD Full-step speed 10 027
h09 KVAL_HOLD
h0A KVAL_RUN
h0B KVAL_ACC
h0C KVAL_DEC
Holding K
Constant speed K
Acceleration starting K
Deceleration starting K
VAL
VAL
8290.16·V
8290.16·V
8290.16·V
VAL
8290.16·V
VAL
125.5e-12 step/tick
(2008 step/s2)
125.5e-12 step/tick
(2008 step/s2)
248e-6 step/tick
(991.8 step/s)
0 step/tick
(0 step/s)
150.7e-6 step/tick
(602.7 step/s)
S
R, WR
S
R, WR
S
R, WR
S
2
2
h0D INT_SPEED Intersect speed 14 0408 15.4e-6 step/tick (61.5 step/s) R, WH
h0E ST_SLP Start slope 8 19 250.038% s/step R, WH
(1)
R, WS
R, WS
R, WR
R, WS
R, WR
R, WR
h0F FN_SLP_ACC Acceleration final slope 8 29 0.063% s/step 25 R, WH
h10 FN_SLP_DEC Deceleration final slope 8 29 0.063% s/step 25 R, WH
h11 K_THERM
h12 ADC_OUT ADC output 5 XX
Thermal compensation
factor
401.0 R, WR
(2)
0R
h13 OCD_TH OCD threshold 5 8 281.25 mV R, WR
h14 STALL_TH STALL threshold 5 10 531.25 mV R, WR
h16 STEP_MODE Step mode 4 7
BUSY/SYNC output used as
BUSY, 128 µsteps
R, WH
h17 ALARM_EN Alarms enables 8 FF All alarms enabled R, WS
Doc ID 023278 Rev 1 43/74
Programming manual L6480
Table 11. Registers map (continued)
Address
[Hex]
h18 GATECFG1
h19 GATECFG2
h1A CONFIG IC configuration 16 2C88
h1B STATUS Status 16 XXXX
1. R: readable, WH: writable, only when outputs are in high impedance, WS: writable only when motor is stopped, WR:
always writable.
2. According to startup conditions.
Register name Register function
Gate driver
configuration
Gate driver
configuration
Reset
Len.
[bit]
Hex
I
11 0
80t
gate
boost
BLANK
Internal 16 MHz oscillator
(OSCOUT@2 MHz),
SW event causes HardStop,
motor supply voltage
compensation disabled,
overcurrent shutdown,
V
CC
UVLO threshold low,
f
PWM
High impedance state,
motor stopped,
(2)
reverse direction,
all fault flags released
UVLO/Reset flag set
Reset
Val ue
= 4 mA, tCC = 125 ns, no
= 125 ns, tDT = 125 ns R, WH
= 7.5 V,
= f
/ 1024
OSC
Remarks
(1)
R, WH
R, WH
R
9.1.1 ABS_POS
The ABS_POS register contains the current motor absolute position in agreement with the
selected step mode; the stored value unit is equal to the selected step mode (full, half,
quarter, etc.). The value is in 2's complement format and it ranges from -2
At power-on the register is initialized to “0” (HOME position).
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
9.1.2 EL_POS
The EL_POS register contains the current electrical position of the motor. The two MSbits
indicate the current step and the other bits indicate the current microstep (expressed in
step/128) within the step.
Table 12. EL_POS register
Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
STEP MICROSTEP
When the EL_POS register is written by the user the new electrical position is instantly
imposed. When the EL_POS register is written, its value must be masked in order to match
21
to +221-1.
44/74 Doc ID 023278 Rev 1
L6480 Programming manual
with the step mode selected in the STEP_MODE register in order to avoid a wrong
microstep value generation (Section 9.1.19); otherwise the resulting microstep sequence is
incorrect.
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
9.1.3 MARK
The MARK register contains an absolute position called MARK, according to the selected
step mode; the stored value unit is equal to the selected step mode (full, half, quarter, etc.).
It is in 2's complement format and it ranges from -2
21
to +221-1.
9.1.4 SPEED
The SPEED register contains the current motor speed, expressed in step/tick (format
unsigned fixed point 0.28).
In order to convert the SPEED value in step/s the following formula can be used:
Equation 4
tick
28–
⋅
step/s[]
SPEED 2
----------- ------------- ------------- ---=
where SPEED is the integer number stored in the register and tick is 250 ns.
The available range is from 0 to 15625 step/s with a resolution of 0.015 step/s.
Note: The range effectively available to the user is limited by the MAX_SPEED parameter.
Any attempt to write the register causes the command to be ignored and the
NOTPERF_CMD flag to rise (Section 9.1.24).
9.1.5 ACC
The ACC register contains the speed profile acceleration expressed in step/tick2 (format
unsigned fixed point 0.40).
In order to convert the ACC value in step/s
Equation 5
[]
step/s
where ACC is the integer number stored in the register and tick is 250 ns.
The available range is from 14.55 to 59590 step/s
2
the following formula can be used:
2
ACC 2
------------ ------------- ------=
40–
⋅
2
tick
2
with a resolution of 14.55 step/s2.
When the ACC value is set to 0xFFF, the device works in infinite acceleration mode.
Any attempt to write to the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
Doc ID 023278 Rev 1 45/74
Programming manual L6480
9.1.6 DEC
The DEC register contains the speed profile deceleration expressed in step/tick2 (format
unsigned fixed point 0.40).
In order to convert the DEC value in step/s
Equation 6
2
the following formula can be used:
where DEC is the integer number stored in the register and tick is 250 ns.
The available range is from 14.55to 59590 step/s2 with a resolution of 14.55 step/s2.
When the device is working in infinite acceleration mode this value is ignored.
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
9.1.7 MAX_SPEED
The MAX_SPEED register contains the speed profile maximum speed expressed in
step/tick (format unsigned fixed point 0.18).
In order to convert it in step/s, the following formula can be used:
Equation 7
where MAX_SPEED is the integer number stored in the register and tick is 250 ns.
The available range is from 15.25 to 15610 step/s with a resolution of 15.25 step/s.
2
step/s
[]
step/s[]
MAX_SPEED 2
------------ ------------- ------------- ---------- --------=
DEC 2
⋅
----------- ------------- -------=
tick
tick
40–
2
18–
⋅
9.1.8 MIN_SPEED
The MIN_SPEED register contains the following parameters:
Table 13. MIN_SPEED register
Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
LSPD_OPT MIN_SPEED
The MIN_SPEED parameter contains the speed profile minimum speed. Its value is
expressed in step/tick and to convert it in step/s the following formula can be used:
Equation 8
step/s[]
where MIN_SPEED is the integer number stored in the register and tick is the ramp 250 ns.
46/74 Doc ID 023278 Rev 1
MIN_SPEED 2
------------- ------------- ------------ ----------- -----=
tick
24–
⋅
L6480 Programming manual
The available range is from 0 to 976.3 step/s with a resolution of 0.238 step/s.
When the LSPD_OPT bit is set high, low speed optimization feature is enabled and the
MIN_SPEED value indicates the speed threshold below which the compensation works. In
this case the minimum speed of the speed profile is set to zero.
Any attempt to write the register when the motor is running causes the NOTPERF_CMD flag
to rise.
9.1.9 FS_SPD
The FS_SPD register contains the following parameters:
Table 14. FS_SPD register
Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
BOOST_MODE FS_SPD
The FS_SPD threshold speed value over which the step mode is automatically switched to
full-step two-phase on. Its value is expressed in step/tick (format unsigned fixed point 0.18)
and to convert it in step/s the following formula can be used:
Equation 9
step/s[]
FS_SPD 0.5+()2
----------- ------------- ------------- ---------- ------------- --=
tick
18–
⋅
If FS_SPD value is set to hFF (max.) the system always works in Microstepping mode
(SPEED must go over the threshold to switch to Full-step mode). Setting FS_SPD to zero
does not have the same effect as setting the step mode to full-step two-phase on: the zero
FS_SPD value is equivalent to a speed threshold of about 7.63 step/s.
The available range is from 7.63 to 15625 step/s with a resolution of 15.25 step/s.
The BOOST_MODE bit sets the amplitude of the voltage squarewave during the full-step
operation (see Section 6.4.1).
9.1.10 KVAL_HOLD, KVAL_RUN, KVAL_ACC and KVAL_DEC
The KVAL_HOLD register contains the K
when the motor is stopped (compensations excluded).
The KVAL_RUN register contains the K
when the motor is running at constant speed (compensations excluded).
The KVAL_ACC register contains the starting K
modulators during acceleration (compensations excluded).
The KVAL_DEC register contains the starting K
modulators during deceleration (compensations excluded).
value that is assigned to the PWM modulators
VAL
value that is assigned to the PWM modulators
VAL
value that can be assigned to the PWM
VAL
value that can be assigned to the PWM
VAL
The available range is from 0 to 0.996 x V
Ta bl e 1 5.
Doc ID 023278 Rev 1 47/74
with a resolution of 0.004 x VS, as shown in
S
Programming manual L6480
Table 15. Voltage amplitude regulation registers
KVAL_X [7..0] Output voltage
00000000 0
00000001 V
…
11111110 V
11111111 V
…
9.1.11 INT_SPEED
The INT_SPEED register contains the speed value at which the BEMF compensation curve
changes slope (Section 7.4 for details). Its value is expressed in step/tick and to convert it in
[step/s] the following formula can be used:
Equation 10
where INT_SPEED is the integer number stored in the register and tick is 250 ns.
The available range is from 0 to 976.5 step/s with a resolution of 0.0596 step/s.
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
…
…
step/s[]
…
…
IN T_SPEED 2
----------- ------------- ------------- ---------- -----=
tick
…
x (1/256)
S
…
18–
⋅
…
x (254/256)
S
x (255/256)
S
9.1.12 ST_SLP
The ST_SLP register contains the BEMF compensation curve slope that is used when the
speed is lower than the intersect speed (Section 7.4). Its value is expressed in s/step and
the available range is from 0 to 0.004 with a resolution of 0.000015.
When ST_SLP, FN_SLP_ACC and FN_SLP_DEC parameters are set to zero, no BEMF
compensation is performed.
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
9.1.13 FN_SLP_ACC
The FN_SLP_ACC register contains the BEMF compensation curve slope that is used when
the speed is greater than the intersect speed during acceleration (Section 7.4 for details). Its
value is expressed in s/step and the available range is from 0 to 0.004 with a resolution of
0.000015.
When ST_SLP, FN_SLP_ACC and FN_SLP_DEC parameters are set to zero, no BEMF
compensation is performed.
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
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9.1.14 FN_SLP_DEC
The FN_SLP_DEC register contains the BEMF compensation curve slope that is used when
the speed is greater than the intersect speed during deceleration (Section 7.4 for details). Its
value is expressed in s/step and the available range is from 0 to 0.004 with a resolution of
0.000015.
When ST_SLP, FN_SLP_ACC and FN_SLP_DEC parameters are set to zero, no BEMF
compensation is performed.
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
9.1.15 K_THERM
The K_THERM register contains the value used by the winding resistance thermal drift
compensation system (Section 7.6).
The available range is from 1 to 1.46875 with a resolution of 0.03125, as shown in Ta b le 1 6 .
Table 16. Winding resistance thermal drift compensation coefficient
K_THERM [3..0] Compensation coeff.
0000 1
0 0 0 1 1.03125
…
1110 1.4375
1 1 1 1 1.46875
9.1.16 ADC_OUT
The ADC_OUT register contains the result of the analog to digital conversion of the ADCIN
pin voltage; the result is available even if the supply voltage compensation is disabled.
Any attempt to write to the register causes the command to be ignored and the
NOTPERF_CMD flag to rise (Section 9.1.24).
Table 17. ADC_OUT value and motor supply voltage compensation feature
Greater than V
V
S,nom
VS,
VS,
nom
Lower than V
V
…
S
S,nom
…
…
V
ADCIN/VREG
ADC_OUT
[4..0]
…
Compensation
coefficient
+ 50% > 24/32 1 1 X X X 0.65625
+ 50% 24/32 11000 0.65625
…
nom
…
…
…
…
…
…
…
…
16/32 10000 1
…
…
…
…
…
…
…
– 50% 8/32 01000 1.968875
– 50% < 8/32 0 0 X X X 1.968875
S,nom
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9.1.17 OCD_TH
The OCD_TH register contains the overcurrent threshold value (Section 6.9 for details). The
available range is from 31.25 mV to 1 V, steps of 31.25 mV, as shown in Ta bl e 1 8.
Table 18. Overcurrent detection threshold
OCD_TH [3..0] Overcurrent detection threshold
0000 31.25 mV
0001 62.5 mV
………… …
1110 968.75 mV
1111 1 V
9.1.18 STALL_TH
The STALL_TH register contains the stall detection threshold value. The available range is
from 31.25 mV to 1 V with a resolution of 31.25 mV.
Table 19. Stall detection threshold
STALL_th [6..0] Stall detection threshold
0000000 31.25 mA
0 0 0 0 0 0 1 62.5 mA
………………… …
1 1 1 1 1 1 0 968.75 mV
1111111 1 V
9.1.19 STEP_MODE
The STEP_MODE register has the following structure:
Table 20. STEP_MODE register
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
SYNC_EN SYNC_SEL 0
1. When the register is written this bit should be set to 0.
(1)
STEP_SEL
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The STEP_SEL parameter selects one of eight possible stepping modes:
Table 21. Step mode selection
STEP_SEL[2..0] Step mode
0 0 0 Full-step
0 0 1 Half-step
0 1 0 1/4 microstep
0 1 1 1/8 microstep
1 0 0 1/16 microstep
1 0 1 1/32 microstep
1 1 0 1/64 microstep
1 1 1 1/128 microstep
Every time the step mode is changed, the electrical position (i.e. the point of microstepping
sinewave that is generated) is reset to the first microstep.
Warning: Every time STEP_SEL is changed the value in the ABS_POS
register loses meaning and should be reset.
Any attempt to write the register when the motor is running causes the command to be
ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
When when SYNC_EN bit is set low, BUSY
execution, otherwise, when the SYNC_EN bit is set high, BUSY
/SYNC output is forced low during command
/SYNC output provides a
clock signal according to the SYNC_SEL parameter.
The synchronization signal is obtained starting from electrical position information (EL_POS
register) according to Tab l e 2 2:
Table 22. SYNC signal source
SYNC_SEL[2..0] Source
0 0 0 EL_POS[7]
0 0 1 EL_POS[6]
0 1 0 EL_POS[5]
0 1 1 EL_POS[4]
1 0 0 EL_POS[3]
1 0 1 EL_POS[2]
1 1 0 EL_POS[1]
1 1 1 EL_POS[0]
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9.1.20 ALARM_EN
The ALARM_EN register allows the selection of which alarm signals are used to generate
the FLAG
condition forces the FLAG
Table 23. ALARM_EN register
output. If the respective bit of the ALARM_EN register is set high, the alarm
pin output down.
ALARM_EN bit Alarm condition
0 (LSB) Overcurrent
1 Thermal shutdown
2 Thermal warning
3UVLO
4 ADC UVLO
5 Stall detection
6 Switch turn-on event
7 (MSB) Command error
9.1.21 GATECFG1
The GATECFG1 register has the following structure:
Table 24. GATECFG1 register
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
The IGATE parameter selects the sink/source current used by gate driving circuitry to
charge/discharge the respective gate during commutations. Seven possible values ranging
from 4 mA to 96 mA are available, as shown in Ta bl e 2 5 .
Table 25. IGATE parameter
000 4
001 4
010 8
WD_EN TBOOST
IGATE TCC
IGATE [2..0} Gate current [mA}
011 16
100 24
101 32
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Table 25. IGATE parameter
IGATE [2..0} Gate current [mA}
11064
11196
The TCC parameter defines the duration of constant current phase during gate turn-on and
turn-off sequences (Section 6.15).
Table 26. TCC parameter
TCC [4..0]
00000 125
00001 250
⇓⇓⇓⇓⇓ ⇓
11100 3625
11101 3750
11110 3750
11111 3750
Constant current time
[ns]
The TBOOST parameter defines the duration of the overboost phase during gate turn-off
(Section 6.15).
Table 27. TBOOST parameter
TBOOST
[2..0]
000 0
00162.5
Turn-off boost time
[ns]
(1)
(2)
/125
(3)
/83.3
010 125
011 250
100 375
101 500
110 750
111 1000
1. Clock frequency equal to 16 MHz or 32 MHz.
2. Clock frequency equal to 24 MHz.
3. Clock frequency equal to 8 MHz.
The WD_EN bit enables the clock source monitoring (Section 6.8.2).
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9.1.22 GATECFG2
The GATECFG2 register has the following structure:
Table 28. GATECFG2 register (voltage mode)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
TBLANK TDT
The TCC parameter defines the deadtime duration between the gate turn-off and the
opposite gate turn-on sequences (Section 6.16).
Table 2 9 . TDT para m e t er
TDT [4..0] Deadtime [ns]
00000 125
00001 250
⇓⇓⇓⇓⇓ ⇓
11110 3875
11111 4000
The TBLANK parameter defines the duration of the blanking of the current sensing
comparators (stall detection and overcurrent) after each commutation (Section 6.16).
Table 30. TBLANK parameters
9.1.23 CONFIG
The CONFIG register has the following structure:
Table 31. CONFIG register
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
TBLANK [2..0] Blanking time [ns]
000 125
001 250
⇓⇓⇓ ⇓
110 875
111 1000
F_PWM_INT F_PWM_DEC VCCVAL UVLOVAL
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
OC_SD EN_VSCOMP
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E
EXT_CLK OSC_SEL
L6480 Programming manual
The OSC_SEL and EXT_CLK bits set the system clock source:
Table 32. Oscillator management
EXT_CLK OSC_SEL[2..0] Clock source OSCIN OSCOUT
0000
0001
0010
0011
1 0 0 0 Internal oscillator: 16 MHz Unused
1 0 0 1 Internal oscillator: 16 MHz Unused
1 0 1 0 Internal oscillator: 16 MHz Unused
1 0 1 1 Internal oscillator: 16 MHz Unused
0100
0101
0110
0111
1100
1101
1110
1111
Internal oscillator: 16 MHz Unused Unused
External crystal or
resonator: 8 MHz
External crystal or
resonator: 16 MHz
External crystal or
resonator: 24 MHz
External crystal or
resonator: 32 MHz
Ext. clock source: 8 MHz
(crystal/resonator driver
disabled)
Ext. clock source: 16 MHz
(crystal/resonator driver
disabled)
Ext. clock source: 24 MHz
(crystal/resonator driver
disabled)
Ext. clock source: 32 MHz
(crystal/resonator driver
disabled)
Crystal/reson
ator driving
Crystal/reson
ator driving
Crystal/reson
ator driving
Crystal/reson
ator driving
Clock source
Clock source
Clock source
Clock source
Supplies a 2-MHz
clock
Supplies a 4-MHz
clock
Supplies an 8-MHz
clock
Supplies a 16-MHz
clock
Crystal/resonator
driving
Crystal/resonator
driving
Crystal/resonator
driving
Crystal/resonator
driving
Supplies inverted
OSCIN signal
Supplies inverted
OSCIN signal
Supplies inverted
OSCIN signal
Supplies inverted
OSCIN signal
The SW_MODE bit sets the external switch to act as HardStop interrupt or not:
Table 33. External switch hard stop interrupt mode
SW_MODE Switch mode
0 HardStop interrupt
1 User disposal
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The OC_SD bit sets if an overcurrent event causes or not the bridges to turn off; the OCD
flag in the status register is forced low anyway:
Table 34. Overcurrent event
OC_SD Overcurrent event
1 Bridges shut down
0 Bridges do not shut down
The VCCVAL bit sets the internal V
Table 35. Programmable V
VCCVAL V
0 7.5 V
115 V
CC
regulator output voltage.
CC
regulator output voltage
voltage
CC
The UVLOVAL bit sets the UVLO protection thresholds.
Table 36. Programmable UVLO thresholds
UVLOVAL V
0 7 V6.5 V6 V5.5 V
1 11 V 10.5 V 10 V 9.5 V
CCthOn
V
CCthOff
∆V
BOOTthOn
∆V
BOOTthOff
The EN_VSCOMP bit sets if the motor supply voltage compensation is enabled or not.
Table 37. Motor supply voltage compensation enable
EN_VSCOMP Motor supply voltage compensation
0 Disabled
1 Enabled
The F_PWM_INT bits set the integer division factor of PWM frequency generation.
Table 38. PWM frequency: integer division factor
F_PWM_INT
[2..0]
000 1
001 2
010 3
011 4
100 5
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L6480 Programming manual
Table 38. PWM frequency: integer division factor (continued)
F_PWM_INT
[2..0]
101 6
110 7
111 7
Integer division factor
The F_PWM_DEC bits set the multiplication factor of PWM frequency generation.
Table 39. PWM frequency: multiplication factor
F_PWM_DEC [2..0] Multiplication factor
000 0.625
001 0.75
010 0.875
011 1
100 1.25
101 1.5
110 1.75
111 2
In the following tables all available PWM frequencies are listed according to oscillator
frequency, F_PWM_INT and F_PWM_DEC values (the CONFIG register OSC_SEL
parameter must be correctly programmed).
Table 40. Available PWM frequencies [kHz]: 8-MHz oscillator frequency
F_PWM_DEC
F_PWM_
INT
000 9.8 11.7 13.7 15.6 19.5 23.4 27.3 31.3
001 4.9 5.9 6.8 7.8 9.8 11.7 13.7 15.6
010 3.3 3.9 4.6 5.2 6.5 7.8 9.1 10.4
011 2.4 2.9 3.4 3.9 4.9 5.9 6.8 7.8
100 2.0 2.3 2.7 3.1 3.9 4.7 5.5 6.3
101 1.6 2.0 2.3 2.6 3.3 3.9 4.6 5.2
110 1.4 1.7 2.0 2.2 2.8 3.3 3.9 4.5
000 001 010 011 100 101 110 111
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Table 41. Available PWM frequencies [kHz]: 16-MHz oscillator frequency
F_PWM_DEC
F_PWM_INT 000 001 010 011 100 101 110 111
000 19.5 23.4 27.3 31.3 39.1 46.9 54.7 62.5
001 9.8 11.7 13.7 15.6 19.5 23.4 27.3 31.3
010 6.5 7.8 9.1 10.4 13.0 15.6 18.2 20.8
011 4.9 5.9 6.8 7.8 9.8 11.7 13.7 15.6
100 3.9 4.7 5.5 6.3 7.8 9.4 10.9 12.5
101 3.3 3.9 4.6 5.2 6.5 7.8 9.1 10.4
110 2.83.33.94.55.66.77.88.9
Table 42. Available PWM frequencies [kHz]: 24-MHz oscillator frequency
F_PWM_DEC
F_PWM_INT 000 001 010 011 100 101 110 111
000 29.3 35.2 41.0 46.9 58.6 70.3 82.0 93.8
001 14.6 17.6 20.5 23.4 29.3 35.2 41.0 46.9
010 9.8 11.7 13.7 15.6 19.5 23.4 27.3 31.3
011 7.3 8.8 10.3 11.7 14.6 17.6 20.5 23.4
100 5.9 7.0 8.2 9.4 11.7 14.1 16.4 18.8
101 4.9 5.9 6.8 7.8 9.8 11.7 13.7 15.6
110 4.2 5.0 5.9 6.7 8.4 10.0 11.7 13.4
Table 43. Available PWM frequencies [kHz]: 32-MHz oscillator frequency
F_PWM_DEC
F_PWM_
INT
000 39.1 46.9 54.7 62.5 78.1 93.8 109.4 125.0
000 001 010 011 100 101 110 111
001 19.5 23.4 27.3 31.3 39.1 46.9 54.7 62.5
010 13.0 15.6 18.2 20.8 26.0 31.3 36.5 41.7
011 9.8 11.7 13.7 15.6 19.5 23.4 27.3 31.3
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Table 43. Available PWM frequencies [kHz]: 32-MHz oscillator frequency
F_PWM_DEC
F_PWM_
INT
100 7.8 9.4 10.9 12.5 15.6 18.8 21.9 25.0
101 6.5 7.8 9.1 10.4 13.0 15.6 18.2 20.8
110 5.6 6.7 7.8 8.9 11.2 13.4 15.6 17.9
Any attempt to write the CONFIG register when the motor is running causes the command
to be ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
9.1.24 STATUS
The STATUS register has the following structure:
Table 44. STATUS register
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
STEP_LOSS_B
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
NOTPERF_CM
D
000 001 010 011 100 101 110 111
STEP_LOSS_
A
MOT_STATUS DIR
OCD TH_SD
SW_EV
N
UVLO_AD
C
SW_F BUSY HiZ
UVLO STCK_MOD
When the HiZ flag is high it indicates that the bridges are in high impedance state. Any
motion command causes the device to exit from High Z state (HardStop and SoftStop
included), unless error flags forcing a High Z state are active.
The UVLO flag is active low and is set by an undervoltage lockout or reset events (power-up
included).
The UVLO_ADC flag is active low and indicates an ADC undervoltage event.
The OCD flag is active low and indicates an overcurrent detection event.
The STEP_LOSS_A and STEP_LOSS_B flags are forced low when a stall condition is
detected on bridge A or bridge B respectively.
The CMD_ERROR flag is active high and indicates that the command received by SPI can't
be performed or does not exist at all.
The SW_F reports the SW input status (low for open and high for closed).
The SW_EVN flag is active high and indicates a switch turn-on event (SW input falling
edge).
TH_STATUS bits indicate the current device thermal status (Section 6.12):
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Table 45. STATUS register TH_STATUS bits
TH_STATUS Status
00Normal
01Warning
1 0 Bridge shutdown
1 1 Device shutdown
UVLO, UVLO_ADC, OCD, STEP_LOSS_A, STEP_LOSS_B, CMD_ERROR, SW_EVN and
TH_STATUS bits are latched: when the respective conditions make them active (low or high)
they remain in that state until a GetStatus command is sent to the IC.
The BUSY bit reflects the BUSY pin status. The BUSY flag is low when a constant speed,
positioning or motion command is under execution and is released (high) after the command
has been completed.
The STCK_MOD bit is an active high flag indicating that the device is working in Step-clock
mode. In this case the step-clock signal should be provided through the STCK input pin.
The DIR bit indicates the current motor direction:
Table 46. STATUS register DIR bit
DIR Motor direction
1Forward
0Reverse
MOT_STATUS indicates the current motor status:
Table 47. STATUS register MOT_STATE bits
MOT_STATUS Motor status
0 0 Stopped
01 Acceleration
10 Deceleration
1 1 Constant speed
Any attempt to write to the register causes the command to be ignored and the
NOTPERF_CMD to rise (Section 9.1.24).
9.2 Application commands
The commands summary is given in Tab le 4 8 .
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Table 48. Application commands
Command Mnemonic Command binary code Action
[7..5] [4] [3] [2..1] [0]
NOP 000 0 0 00 0 Nothing
SetParam(PARAM,VALUE) 000 [PARAM] Writes VALUE in PARAM register
GetParam(PARAM) 001 [PARAM] Returns the stored value in PARAM register
Run(DIR,SPD) 010 1 0 00 DIR Sets the target speed and the motor direction
StepClock(DIR) 010 1 1 00 DIR
Move(DIR,N_STEP) 010 0 0 00 DIR
GoTo(ABS_POS) 011 0 0 00 0 Brings motor in ABS_POS position (minimum path)
GoTo_DIR(DIR,ABS_POS) 011 0 1 00 DIR Brings motor in ABS_POS position forcing DIR direction
GoUntil(ACT,DIR,SPD) 100 0 ACT 01 DIR
ReleseSW(ACT, DIR) 100 1 ACT 01 DIR
GoHome 011 1 0 00 0 Brings the motor in HOME position
GoMark 011 1 1 00 0 Brings the motor in MARK position
ResetPos 110 1 1 00 0 Resets the ABS_POS register (sets HOME position)
ResetDevice 110 0 0 00 0 Device is reset to power-up conditions
SoftStop 101 1 0 00 0 Stops motor with a deceleration phase
HardStop 101 1 1 00 0 Stops motor immediately
SoftHiZ 101 0 0 00 0
Puts the device in Step-clock mode and imposes DIR
direction
Makes N_STEP (micro)steps in DIR direction
(Not performable when motor is running)
Performs a motion in DIR direction with speed SPD until
SW is closed, the ACT action is executed then a SoftStop
takes place
Performs a motion in DIR direction at minimum speed
until the SW is released (open), the ACT action is
executed then a HardStop takes place
Puts the bridges in high impedance status after a
deceleration phase
HardHiZ 101 0 1 00 0 Puts the bridges in high impedance status immediately
GetStatus 110 1 0 00 0 Returns the status register value
RESERVED 111 0 1 01 1 RESERVED COMMAND
RESERVED 111 1 1 00 0 RESERVED COMMAND
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9.2.1 Command management
The host microcontroller can control motor motion and configure the L6480 through a
complete set of commands.
All commands are composed by a single byte. After the command byte, some bytes of
arguments should be needed (see Figure 21). Argument length can vary from 1 to 3 bytes.
Figure 21. Command with 3-byte argument
3$)
FROMHOST
3$/
TOHOST
#OMMANDBYTE
X X X X
!RGUMENTBYTE
-3"
!RGUMENTBYTE
!RGUMENTBYTE
,3"
!-V
By default, the device returns an all zero response for any received byte, the only exceptions
are GetParam and GetStatus commands. When one of these commands is received, the
following response bytes represent the related register value (see Figure 22). Response
length can vary from 1 to 3 bytes.
Figure 22. Command with 3-byte response
F
ROMHOST
TOHOST
3$)
3$/
#OMMANDBYTE
./0 ./0 ./0
2ESPONSEBYTE
-3"
2ESPONSEBYTEX
2ESPONSEBYTE
,3"
!-V
During response transmission, new commands can be sent. If a command requiring a
response is sent before the previous response is completed, the response transmission is
aborted and the new response is loaded into the output communication buffer (see
Figure 23).
Figure 23. Command response aborted
3$)
FROMHOST
3$/
TOHOST
#OMMAND
BYTERESPEXPECTED
#OMMAND
NO
RESPEXPECTED
2ESPONSEBYTE
-3"
#OMMAND
BYTERESPEXPECTED
2ESPONSEBYTEX
When a byte that does not correspond to a command is sent to the IC it is ignored and the
WRONG_CMD flag in the STATUS register is raised (see paragraph Figure 9.1.24).
9.2.2 Nop
Table 49. Nop command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
00000000 From host
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#OMMAND
NO
2ESPONSEBYTE
#OMMANDRESPONSE
ISABORTED
RESPEXPECTED
-3"
#OMMAND
NO
RESPEXPECTED
2ESPONSEBYTE
,3"
!-V
L6480 Programming manual
Nothing is performed.
9.2.3 SetParam (PARAM, VALUE)
Table 50. SetParam command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 0 0 PARAM
VALUE Byte 2 (if needed)
VALUE Byte 1 (if needed)
The SetParam command sets the PARAM register value equal to VALUE; PARAM is the
respective register address listed in Ta bl e 1 1.
The command should be followed by the new register VALUE (most significant byte first).
The number of bytes composing the VALUE argument depends on the length of the target
register (see Ta bl e 1 1).
Some registers cannot be written (see Ta b le 1 1 ); any attempt to write one of those registers
causes the command to be ignored and the WRONG_CMD flag to rise at the end of the
command byte, as if an unknown command code were sent (see Section 9.1.24).
Some registers can only be written in particular conditions (see Ta bl e 1 1 ); any attempt to
write one of those registers when the conditions are not satisfied causes the command to be
ignored and the NOTPERF_CMD flag to rise at the end of the last argument byte (see
Section 9.1.24).
Any attempt to set an inexistent register (wrong address value) causes the command to be
ignored and the WRONG_CMD flag to rise at the end of the command byte as if an
unknown command code were sent.
9.2.4 GetParam (PARAM)
From host
VALUE Byte 0
Table 51. GetParam command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 0 1 PARAM from host
ANS Byte 2 (if needed) to host
ANS Byte 1 (if needed) to host
ANS Byte 0 to host
This command reads the current PARAM register value; PARAM is the respective register
address listed in Ta bl e 1 1 .
The command response is the current value of the register (most significant byte first). The
number of bytes composing the command response depends on the length of the target
register (see Ta bl e 1 1).
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The returned value is the register one at the moment of GetParam command decoding. If
register values change after this moment, the response is not accordingly updated.
All registers can be read anytime.
Any attempt to read an inexistent register (wrong address value) causes the command to be
ignored and the WRONG_CMD flag to rise at the end of the command byte as if an
unknown command code were sent.
9.2.5 Run (DIR, SPD)
Table 52. Run command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0101000DIR from host
X X X X SPD (Byte 2) from host
SPD (Byte 1) from host
SPD (Byte 0) from host
The Run command produces a motion at SPD speed; the direction is selected by the DIR
bit: '1' forward or '0' reverse. The SPD value is expressed in step/tick (format unsigned fixed
point 0.28) that is the same format as the SPEED register (Section 9.1.4).
Note: The SPD value should be lower than MAX_SPEED and greater than MIN_SPEED,
otherwise the Run command is executed at MAX_SPEED or MIN_SPEED respectively.
This command keeps the BUSY flag low until the target speed is reached.
This command can be given anytime and is immediately executed.
9.2.6 StepClock (DIR)
Table 53. StepClock command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0101100DIR from host
The StepClock command switches the device in Step-clock mode (Section 6.7.5) and
imposes the forward (DIR = '1') or reverse (DIR = '0') direction.
When the device is in Step-clock mode, the SCK_MOD flag in the STATUS register is raised
and the motor is always considered stopped (Section 6.7.5 and 9.1.24).
The device exits Step-clock mode when a constant speed, absolute positioning or motion
command is sent through SPI. Motion direction is imposed by the respective StepClock
command argument and can by changed by a new StepClock command without exiting
Step-clock mode.
Events that cause bridges to be forced into high impedance state (overtemperature,
overcurrent, etc.) do not cause the device to leave Step-clock mode.
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The StepClock command does not force the BUSY flag low. This command can only be
given when the motor is stopped. If a motion is in progress, the motor should be stopped
and it is then possible to send a StepClock command.
Any attempt to perform a StepClock command when the motor is running causes the
command to be ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
9.2.7 Move (DIR, N_STEP)
Table 54. Move command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0100000DIR from host
X X N_STEP (Byte 2) from host
N_STEP (Byte 1) from host
N_STEP (Byte 0) from host
The move command produces a motion of N_STEP microsteps; the direction is selected by
the DIR bit ('1' forward or '0' reverse).
The N_STEP value is always in agreement with the selected step mode; the parameter
value unit is equal to the selected step mode (full, half, quarter, etc.).
This command keeps the BUSY flag low until the target number of steps is performed. This
command can only be performed when the motor is stopped. If a motion is in progress the
motor must be stopped and it is then possible to perform a move command.
Any attempt to perform a move command when the motor is running causes the command
to be ignored and the NOTPERF_CMD flag to rise (Section 9.1.24).
9.2.8 GoTo (ABS_POS)
Table 55. GoTo command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 1 1 00000 from host
X X ABS_POS (Byte 2) from host
The GoTo command produces a motion to ABS_POS absolute position through the shortest
path. The ABS_POS value is always in agreement with the selected step mode; the
parameter value unit is equal to the selected step mode (full, half, quarter, etc.).
The GoTo command keeps the BUSY flag low until the target position is reached.
This command can be given only when the previous motion command as been completed
(BUSY flag released).
ABS_POS (Byte 1) from host
ABS_POS (Byte 0) from host
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Any attempt to perform a GoTo command when a previous command is under execution
(BUSY low) causes the command to be ignored and the NOTPERF_CMD flag to rise
(Section 9.1.24).
9.2.9 GoTo_DIR (DIR, ABS_POS)
Table 56. GoTo_DIR command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0110100DIR from host
X X ABS_POS (Byte 2) from host
ABS_POS (Byte 1) from host
ABS_POS (Byte 0) from host
The GoTo_DIR command produces a motion to ABS_POS absolute position imposing a
forward (DIR = '1') or a reverse (DIR = '0') rotation. The ABS_POS value is always in
agreement with the selected step mode; the parameter value unit is equal to the selected
step mode (full, half, quarter, etc.).
The GoTo_DIR command keeps the BUSY flag low until the target speed is reached. This
command can be given only when the previous motion command has been completed
(BUSY flag released).
Any attempt to perform a GoTo_DIR command when a previous command is under
execution (BUSY low) causes the command to be ignored and the NOTPERF_CMD flag to
rise (Section 9.1.24).
9.2.10 GoUntil (ACT, DIR, SPD)
Table 57. GoUntil command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
1 0 0 0 ACT 0 1 DIR from host
X X X X SPD (Byte 2) from host
The GoUntil command produces a motion at SPD speed imposing a forward (DIR = '1') or a
reverse (DIR = '0') direction. When an external switch turn-on event occurs (Section 6.14),
the ABS_POS register is reset (if ACT = '0') or the ABS_POS register value is copied into
the MARK register (if ACT = '1'); the system then performs a SoftStop command.
The SPD value is expressed in step/tick (format unsigned fixed point 0.28) that is the same
format as the SPEED register (Section 9.1.4).
The SPD value should be lower than MAX_SPEED and greater than MIN_SPEED,
otherwise the target speed is imposed at MAX_SPEED or MIN_SPEED respectively.
SPD (Byte 1) from host
SPD (Byte 0) from host
If the SW_MODE bit of the CONFIG register is set low, the external switch turn-on event
causes a HardStop interrupt instead of the SoftStop one (Section 6.14 and Section 9.1.23).
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This command keeps the BUSY flag low until the switch turn-on event occurs and the motor
is stopped. This command can be given anytime and is immediately executed.
9.2.11 ReleaseSW (ACT, DIR)
Table 58. ReleaseSW command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
1 0 0 1 ACT 0 1 DIR from host
The ReleaseSW command produces a motion at minimum speed imposing a forward (DIR =
'1') or reverse (DIR = '0') rotation. When SW is released (opened) the ABS_POS register is
reset (ACT = '0') or the ABS_POS register value is copied into the MARK register (ACT =
'1'); the system then performs a HardStop command.
Note that, resetting the ABS_POS register is equivalent to setting the HOME position.
If the minimum speed value is less than 5 step/s or low speed optimization is enabled, the
motion is performed at 5 step/s.
The ReleaseSW command keeps the BUSY flag low until the switch input is released and
the motor is stopped.
9.2.12 GoHome
Table 59. GoHome command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
01110000 from host
The GoHome command produces a motion to the HOME position (zero position) via the
shortest path.
Note that, this command is equivalent to the “GoTo(0…0)” command. If a motor direction is
mandatory, the GoTo_DIR command must be used (Section 9.2.9).
The GoHome command keeps the BUSY flag low until the home position is reached. This
command can be given only when the previous motion command has been completed. Any
attempt to perform a GoHome command when a previous command is under execution
(BUSY low) causes the command to be ignored and the NOTPERF_CMD to rise
(Section 9.1.24).
9.2.13 GoMark
Table 60. GoMark command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
01111000from host
The GoMark command produces a motion to the MARK position performing the minimum
path.
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Note that, this command is equivalent to the “GoTo (MARK)” command. If a motor direction
is mandatory, the GoTo_DIR command must be used.
The GoMark command keeps the BUSY flag low until the MARK position is reached. This
command can be given only when the previous motion command has been completed
(BUSY flag released).
Any attempt to perform a GoMark command when a previous command is under execution
(BUSY low) causes the command to be ignored and the NOTPERF_CMD flag to rise
(Section 9.1.24).
9.2.14 ResetPos
Table 61. ResetPos command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
11011000 from host
The ResetPos command resets the ABS_POS register to zero. The zero position is also
defined as the HOME position (Section 6.5).
9.2.15 ResetDevice
Table 62. ResetDevice command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
11000000 from host
The ResetDevice command resets the device to power-up conditions (Section 6.1).
Note: At power-up the power bridges are disabled.
9.2.16 SoftStop
Table 63. SoftStop command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
10110000 from host
The SoftStop command causes an immediate deceleration to zero speed and a consequent
motor stop; the deceleration value used is the one stored in the DEC register
(Section 9.1.6).
When the motor is in high impedance state, a SoftStop command forces the bridges to exit
from high impedance state; no motion is performed.
This command can be given anytime and is immediately executed. This command keeps
the BUSY flag low until the motor is stopped.
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9.2.17 HardStop
Table 64. HardStop command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
10111000 from host
The HardStop command causes an immediate motor stop with infinite deceleration.
When the motor is in high impedance state, a HardStop command forces the bridges to exit
high impedance state; no motion is performed.
This command can be given anytime and is immediately executed. This command keeps
the BUSY flag low until the motor is stopped.
9.2.18 SoftHiZ
Table 65. SoftHiZ command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
10100000 from host
The SoftHiZ command disables the power bridges (high impedance state) after a
deceleration to zero; the deceleration value used is the one stored in the DEC register
(Section 9.1.6). When bridges are disabled, the HiZ flag is raised.
When the motor is stopped, a SoftHiZ command forces the bridges to enter high impedance
state.
This command can be given anytime and is immediately executed. This command keeps
the BUSY flag low until the motor is stopped.
9.2.19 HardHiZ
Table 66. HardHiZ command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
10101000 from host
The HardHiZ command immediately disables the power bridges (high impedance state) and
raises the HiZ flag.
When the motor is stopped, a HardHiZ command forces the bridges to enter high
impedance state.
This command can be given anytime and is immediately executed.
This command keeps the BUSY flag low until the motor is stopped.
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9.2.20 GetStatus
Table 67. GetStatus command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
11010000 from host
STATUS MSByte to host
STATUS LSByte to host
The GetStatus command returns the Status register value.
The GetStatus command resets the STATUS register warning flags. The command forces
the system to exit from any error state. The GetStatus command DOES NOT reset the HiZ
flag.
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L6480 Package mechanical data
10 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
®
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
Table 68. HTSSOP38 mechanical data
mm
Symbol
Min. Typ. Max.
A-1.1
A1 0.05 - 0.15
A2 0.85 0.9 0.95
b0.17 - 0.27
c0.09 - 0.20
D 9.60 9.70 9.80
E1 4.30 4.40 4.50
e- 0.50 -
E- 6.40 -
L 0.50 0.60 0.70
P 6.40 6.50 6.60
P1 3.10 3.20 3.30
∅ 0° - 8°
Figure 24. HTSSOP38 package dimensions
$
0
%
%
E
B
!
!
!
0
C
MM
,
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Package mechanical data L6480
Figure 25. HTSSOP38 footprint
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L6480 Revision history
11 Revision history
Table 69. Document revision history
Date Revision Changes
13-Jun-2012 1 Initial release.
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L6480
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