The L6472 device, realized in analog mixed
signal technology, is an advanced fully integrated
solution suitable for driving two-phase bipolar
stepper motors with microstepping. It integrates
a dual low R
power switches equipped with an accurate onchip current sensing circuitry suitable for non
dissipative current control and overcurrent
protection. Thanks to a new current control,
a 1/16 microstepping is achieved through an
adaptive decay mode which outperforms
traditional implementations. The digital control
core can generate user defined motion profiles
with acceleration, deceleration, speed or target
position, easily programmed through a dedicated
register set.
All application commands and data registers,
including those used to set analog values
(i.e.: current control value, current protection trip
point, deadtime, etc.) are sent through a standard
5-Mbit/s SPI.
A very rich set of protections (thermal, low bus
voltage, overcurrent) makes the L6472 device
“bullet proof”, as required by the most demanding
motor control applications.
DMOS full bridge with all of the
DS(on)
March 2015DocID022729 Rev 51/70
This is information on a product in full production.
1. Maximum output current limit is related to metal connection and bonding characteristics. Actual limit must satisfy maximum
2. HTSSOP28 mounted on the EVAL6472H.
Differential voltage between AGND, PGND and DGND ±0.3 V
GND, diff
V
Bootstrap peak voltage 55 V
boot
Internal voltage regulator output pin and logic supply voltage 3.6 V
V
REG
Integrated ADC input voltage range (ADCIN pin) -0.3 to +3.6 V
ADCIN
V
OSC
out_diff
LOGIC
I
out
T
T
P
thermal dissipation constraints.
OSCIN and OSCOUT pin voltage range -0.3 to +3.6 V
Differential voltage between V
, OUT1B, OUT2B, PGND pins
V
SB
, OUT1A, OUT2A, PGND and
SA
= VSB = VS 48 V
V
SA
Logic inputs voltage range -0.3 to +5.5 V
(1)
R.m.s. output current 3 A
(1)
Pulsed output current T
Operating junction temperature -40 to 150 °C
OP
Storage temperature range -55 to 150 °C
s
Total power dissipation (TA = 25 °C)
tot
< 1 ms 7 A
PULSE
(2)
5W
2.2 Recommended operating conditions
Symbol Parameter Test condition Value Unit
V
V
V
out_diff
V
REG,in
V
ADC
Logic interface supply voltage
DD
Motor supply voltage VSA = VSB = VS 8 45 V
S
Differential voltage between VSA, OUT1A, OUT2A,
PGND and VSB, OUT1B, OUT2B, PGND pins
Logic supply voltage
Integrated ADC input voltage (ADCIN pin) 0 V
Table 3. Recommended operating conditions
3.3 V logic outputs 3.3 V
5 V logic outputs 5
V
= V
SA
V
voltage imposed by
REG
external source
DocID022729 Rev 59/70
= VS 45 V
SB
3.2 3.3 V
V
REG
70
Electrical dataL6472
2.3 Thermal data
Table 4. Thermal data
SymbolParameterPackageTyp.Unit
R
thJA
1. HTSSOP28 mounted on the EVAL6472H Rev 1.0 board: four-layer FR4 PCB with a dissipating copper surface of about 40
cm2 on each layer and 15 via holes below the IC.
2. POWERSO36 mounted on the EVAL6472PD Rev 1.0 board: four-layer FR4 PCB with a dissipating copper surface of about
40 cm
Thermal resistance junction ambient
2
on each layer and 22 via holes below the IC.
POWERSO36
HTSSOP28
(1)
(2)
22
°C/W
12
10/70DocID022729 Rev 5
L6472Electrical characteristics
3 Electrical characteristics
VSA = VSB = 36 V; VDD = 3.3 V; internal 3 V regulator; TJ = 25 °C, unless otherwise
specified.
Symbol Parameter Test condition Min. Typ. Max. Unit
General
Table 5. Electrical characteristics
V
SthOn VS
V
SthOff
V
SthHyst VS
UVLO turn-on threshold 7.5 8.2 8.9 V
VS UVLO turn-off threshold 6.6 7.2 7.8 V
UVLO threshold hysteresis 0.7 1 1.3 V
Iq Quiescent motor supply current
T
Thermal warning temperature 130 °C
j(WRN)
T
j(SD)
Thermal shutdown temperature 160 °C
Charge pump
V
pump
f
pump,min
f
pump,max
I
boot
Voltage swing for charge pump
oscillator
Minimum charge pump oscillator
frequency
Maximum charge pump oscillator
frequency
(1)
(1)
Average boot current
Output DMOS transistor
High-side switch on-resistance
R
DS(on)
Low-side switch on-resistance
I
DSS
Leakage current
Rise time
t
r
(3)
Internal oscillator selected;
= 3.3 V ext; CP floating
V
REG
f
= f
sw,A
= 15.6 kHz
sw,B
POW_SR = ‘10’
T
= 25 °C, I
j
T
= 125 °C,
j
T
= 25 °C, I
j
= 125 °C,
T
j
OUT = V
= 3 A 0.37
out
(2)
I
= 3 A 0.51
out
= 3 A 0.18
out
(2)
I
= 3 A 0.23
out
S
OUT = GND -0.3
POW_SR = '00', I
POW_SR = '00', I
POW_SR = ‘11’, I
POW_SR = ‘10’, I
POW_SR = ‘01’, I
= +1 A 100
out
= -1 A 80
out
= ±1 A 100
out
= ±1 A 200
out
= ±1 A 300
out
0.5 0.65 mA
10 V
660 kHz
800 kHz
1.1 1.4 mA
3.1
mA
ns
DocID022729 Rev 511/70
70
Electrical characteristicsL6472
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
(3)
SR
SR
t
Fall time
f
Output rising slew rate
out_r
Output falling slew rate
out_f
Deadtime and blanking
t
DT
Deadtime
(1)
tblank Blanking time
(1)
POW_SR = '00'; I
POW_SR = '00'; I
POW_SR = ‘11’, I
POW_SR = ‘10’, I
POW_SR = ‘01’, I
POW_SR = '00', I
POW_SR = '00', I
POW_SR = ‘11’, I
POW_SR = ‘10’, I
POW_SR = ‘01’, I
POW_SR = '00', I
POW_SR = '00', I
POW_SR = ‘11’, I
POW_SR = ‘10’, I
POW_SR = ‘01’, I
= +1 A 90
out
= -1 A 110
out
= ±1 A 110
out
= ±1 A 260
out
= ±1 A 375
load
= +1 A 285
out
= -1 A 360
out
= ±1 A 285
out
= ±1 A 150
out
= ±1 A 95
out
= +1 A 320
out
= -1 A 260
out
= ±1 A 260
out
= ±1 A 110
out
= ±1 A 75
out
POW_SR = '00' 250
POW_SR = ‘11’, f
POW_SR = ‘10’, f
POW_SR = ‘01’, f
= 16 MHz 375
OSC
= 16 MHz 625
OSC
= 16 MHz 875
OSC
POW_SR = '00' 250
POW_SR = ‘11’, f
POW_SR = ‘10’, f
POW_SR = ‘01’, f
= 16 MHz 375
OSC
= 16 MHz 625
OSC
= 16 MHz 875
OSC
ns
V/µs
V/µs
ns
ns
Source-drain diodes
High-side diode forward ON voltage I
V
SD,HS
V
Low-side diode forward ON voltage I
SD,LS
t
rrHS
t
rrLS
High-side diode reverse recovery
time
Low-side diode reverse recovery time I
= 1 A 1 1.1 V
out
= 1 A 1 1.1 V
out
I
= 1 A 30 ns
out
= 1 A 100 ns
out
Logic inputs and outputs
V
Low logic level input voltage 0.8 V
IL
High logic level input voltage 2 V
V
IH
I
High logic level input current
IH
(4)
V
= 5 V 1 µA
IN
12/70DocID022729 Rev 5
L6472Electrical characteristics
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
IIL Low logic level input current
V
Low logic level output voltage
OL
V
High logic level output voltage
OH
RPU RPD
CS pull-up and STBY pull-down
resistors
(5)
(6)
V
= 0 V -1 µA
IN
VDD = 3.3 V, IOL = 4 mA 0.3
V
= 5 V, IOL = 4 mA 0.3
V
DD
V
= 3.3 V, IOH = 4 mA 2.4
DD
= 5 V, IOH = 4 mA 4.7
V
DD
V
CS = GND; STBY/RST = 5 V 335 430 565 k
Internal logic supply current
I
logic
I
logic,STBY
f
STCK
Standby mode internal logic supply
current
Step-clock input frequency 2 MHz
Internal oscillator and external oscillator driver
f
Internal oscillator frequency T
osc,i
f
osc,e
V
OSCOUTH
V
OSCOUTL
t
rOSCOUT
t
fOSCOUT
t
extosc
t
intosc
Programmable external oscillator
frequency
OSCOUT clock source high level
voltage
OSCOUT clock source low level
voltage
OSCOUT clock source rise and fall
time
Internal to external oscillator
switching delay
External to internal oscillator
switching delay
SPI
f
Maximum SPI clock frequency
CK,MAX
t
rCK
t
fCK
t
hCK
t
lCK
t
setCS
t
holCS
t
disCS
t
setSDI
t
holSDI
t
enSDO
SPI clock rise and fall time
SPI clock high and low time
Chip select setup time
Chip select hold time
De-select time
Data input setup time
Data input hold time
Data output enable time
(7)
(7)
(7)
(7)
(7)
(7)
(7)
(7)
(7)
3.3 V V
internal oscillator
3.3 V V
= 25 °C, V
j
externally supplied,
REG
externally supplied 2 2.5 µA
REG
= 3.3 V -3% 16 +3% MHz
REG
3.7 4.3 mA
8 32 MHz
Internal oscillator 3.3 V V
externally supplied; I
OSCOUT
Internal oscillator 3.3 V V
externally supplied; I
OSCOUT
REG
REG
= 4 mA
= 4 mA
2.4 V
0.3 V
Internal oscillator 20 ns
3 ms
1.5 µs
5 MHz
CL = 30 pF 25 ns
75 ns
350 ns
10 ns
800 ns
25 ns
20 ns
38 ns
DocID022729 Rev 513/70
70
Electrical characteristicsL6472
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
t
disSDO
t
vSDO
t
holSDO
Data output disable time
Data output valid time
Data output hold time
Switch input (SW)
(7)
(7)
(7)
37 ns
47 ns
57 ns
R
PUSW
SW input pull-up resistance SW = GND 60 85 110 k
Current control
I
STEP,max
I
STEP,min
Max. programmable reference
current
Min. programmable reference current 31 mA
Overcurrent protection
I
OCD,MAX
I
OCD,MIN
I
OCD,RES
t
OCD,Flag
t
OCD,SD
Maximum programmable overcurrent
detection threshold
Standby and reset pin. LOW logic level resets the
logic and puts the device into standby mode. If not
used, it should be connected to VDD
Internally connected to PGND, AGND and DGND
pins
18/70DocID022729 Rev 5
L6472Typical applications
5 Typical applications
Table 7. Typical application values
Name Value
220 nF
C
VS
C
C
C
100 µF
VSPOL
100 nF
C
REG
REGPOL
47 µF
C
100 nF
DD
10 µF
DDPOL
D1 Charge pump diodes
C
220 nF
BOOT
10 nF
C
FLY
R
39 k
PU
100
R
SW
10 nF
C
SW
Figure 4. Bipolar stepper motor control application using the L6472
DocID022729 Rev 519/70
70
Functional descriptionL6472
6 Functional description
6.1 Device power-up
At the end of power-up, the device state is the following:
Registers are set to default
Internal logic is driven by the internal oscillator and a 2 MHz clock is provided by the
OSCOUT pin
Bridges are disabled (High Z)
UVLO bit in the STATUS register is forced low (fail condition)
FLAG output is forced low.
During power-up the device is under reset (all logic IO disabled and power bridges in highimpedance state) until the following conditions are satisfied:
V
V
Internal oscillator is operative.
Any motion command causes the device to exit from High Z state (HardStop and SoftStop
included).
is greater than V
S
is greater than V
REG
SthOn
REGth
= 2.8 V (typ.)
6.2 Logic I/O
Pins CS, CK, SDI, STCK, SW and STBY\RST are TTL/CMOS 3.3 V - 5 V compatible logic
inputs.
Pin SDO is a TTL/CMOS compatible logic output. The VDD pin voltage sets the logic output
pin voltage range; when it is connected to VREG or a 3.3 V external supply voltage, the
output is 3.3 V compatible. When VDD is connected to a 5 V supply voltage, SDO is 5 V
compatible.
VDD is not internally connected to V
A 10 µF capacitor should be connected to the VDD pin in order to obtain a proper operation.
Pins FLAG
and BUSY\SYNC are open drain outputs.
6.3 Charge pump
To ensure the correct driving of the high-side integrated MOSFETs, a voltage higher than
the motor power supply voltage needs to be applied to the Vboot pin. The high-side gate
driver supply voltage Vboot is obtained through an oscillator and a few external components
realizing a charge pump (see Figure 5).
, an external connection is always needed.
REG
20/70DocID022729 Rev 5
L6472Functional description
Figure 5. Charge pump circuitry
6.4 Microstepping
The driver is able to divide the single step into up to 16 microsteps. Step mode can be
programmed by the STEP_SEL parameter in the STEP_MODE register (see Table 20 on
page 47).
Step mode can only be changed when bridges are disabled. Every time step mode is
changed, the electrical position (i.e. the point of microstepping sine wave that is generated)
is reset to zero, and the absolute position counter value (see Section 6.5) becomes
meaningless.
DocID022729 Rev 521/70
70
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