L6221
Quad Darlington switch
Features
■ Four non-inverting inputs with enable
■ Output voltage up to 50 V
■ Output current up to 1.8 A
■ Very low saturation voltage
■ TTL compatible inputs
■ Integral fast recirculation diodes
Applications
The L6221 monolithic quad Darlington switch is
designed for high current, high voltage switching
applications.
Description
Each of the four switches is controlled by a logic
input and all four are controlled by a common
enable input. All inputs are TTL-compatible for
direct connection to logic circuits.
Each switch consists of an open-collector
Darlington transistor plus a fast diode for
switching applications with inductive device loads.
The emitters of the four switches are commoned.
Any number of inputs and outputs of the same
device may be paralleled.
Table 1. Device summary
Power DIP 12+2+2
SO16+2+2
Figure 1. Block diagram
Order code Package
E-L6221AS Power DIP
E-L6221AD SO16+2+2
E-L6221AD013TR SO16+2+2 (tape and reel)
January 2009 Rev 3 1/22
www.st.com
This datasheet has been downloaded fromhttp://www.digchip.com at this page
22
Contents
Contents
1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7 Mounting instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2/22
Thermal data
1 Thermal data
Table 2. Thermal data
Symbol Parameter SO20 Power DIP Unit
R
th j-pins
R
th j-amb
Thermal resistance junction-pins max. 17 14 °C/W
Thermal resistance junction-ambient max. 80 80 °C/W
3/22
Pin information
Table 3 . Truth t able
(1)
Enable Input Power out
HH ON
HLOFF
LXOFF
1. For each input: H = High level, L = Low level
Table 4. Pin description
(1)
Name Function
IN 1 Input to driver 1
IN 2 Input to driver 2
OUT 1 Output of driver 1
OUT 2 Output of driver 2
CLAMP A Diode clamp to driver 1 and driver 2
IN 3 Input to driver 3
IN 4 Input to driver 4
OUT 3 Output of driver 3
OUT 4 Output of driver 4
CLAMP B Diode clamp to driver 3 and driver 4
ENABLE Enable input to all drivers
V
S Logic supply voltage
GND Common ground
1. See
Figure 1: Block diagram
5/22
Absolute maximum ratings
3 Absolute maximum ratings
Table 5. Absolute maximum ratings
Symbol Parameter Value Unit
V
o
V
s
VIN, V
I
C
I
C
I
C
T
op
T
stg
I
sub
P
tot
Output voltage 50 V
Logic supply voltage 7 V
Input voltage, enable voltage V
EN
Continuous collector current (for each channel) 1.8 A
Collector peak current (repetitive, duty cycle = 10% ton = 5 ms) 2.5 A
Collector peak current (non repetitive, t = 10 μ s) 3.2 A
Operating temperature range (junction) -40 to +150 °C
Storage temperature range -55 to +150 °C
Output substrate current 350 mA
Total power dissipation at:
T
= 90 ° C (Power DIP)
pins
T
= 90°C (SO20)
case
T
= 70 ° C (Power DIP)
amb
T
= 70°C (SO20)
amb
4.3
3.5
1
1
S
W
W
W
W
6/22
Electrical characteristics
4 Electrical characteristics
Note: Refer to the test circuits Figure 3 to Figure 10 (VS = 5 V, T
= 25 °C unless otherwise
amb
specified).
Table 6. Electrical characteristics
Symbol Parameter Test condition Min. Typ. Max. Unit
V
S
I
s
V
CE(sus)
I
CEX
V
CE(sat)
VINL, VENL Input low voltage - - - 0.8 V
I
L, IENL Input low current VIN = V
IN
V
L, VENH Input high voltage - 2.0 - - V
IN
IINH, IENH Input high current VIN = VINH, VEN = VENH--10μA
Logic supply voltage - 4.5 - 5.5 V
Logic supply current
All outputs ON, I
= 0.7A - - 20 mA
C
All outputs OFF - - 20 mA
= VINL, VEN = VENH
V
Output sustaining voltage
Output leakage current
Collector emitter saturation
voltage (one input on, all others
inputs off.)
IN
I
= 100 mA
C
VCE = 50V
V
= VINL, VEN = VENH
IN
= 4.5 V
V
s
V
= VINH, VEN = VENH
IN
IC = 0.6 A
IC = 1 A
I
= 1.8 A
C
, VEN = V
INL
ENL
46 - - V
--1mA
-
-
-
-
-
-
1
1.2
1.6
---100 μA
V
I
R
V
F
t
d (on)
t
d (off)
ΔI
Clamp diode leakage current
Clamp diode forward voltage
VR = 50 V, VEN = VENH
VIN = VINL
IF = 1A
IF = 1.8A
- - 100 μA
-
-
-
1.6
-
2.0VV
Tu r n- o n d e l a y t i m e Vp = 5V, RL = 10Ω --2μs
Turn-off delay time Vp = 5V, RL = 10Ω --5μs
= 5V, VEN = 5V
V
s
Logic supply current variation
IN
I
= -300 mA for each
out
channe
l
- - 120 mA
7/22