ST L5981 User Manual

June 2009 Doc ID 13004 Rev 6 1/37

L5981

1 A step-down switching regulator

Features

■ 1 A DC output current

■ 2.9 V to 18 V input voltage

■ Output voltage adjustable from 0.6 V

■ 250 kHz switching frequency, programmable

up to 1 MHz

■ Internal soft-start and inhibit

■ Low dropout operation: 100 % duty cycle

■ Voltage feed-forward

■ Zero load current operation

■ Overcurrent and thermal protection

■ VFQFPN8 3 mm x 3 mm package

Applications

■ Consumer: STB, DVD, DVD recorder, car

audio, LCD TV and monitors

■ Industrial: chargers, PLD, PLA, FPGA

■ Networking: XDSL, modems, DC-DC modules

■ Computer: optical storage, hard disk drive,

printers, audio/graphic cards

■ LED driving

Description

The L5981 is step-down switching regulator with

1.5 A (min.) current limited embedded power

MOSFET, so it is able to deliver in excess of 1 A

DC current to the load depending on the

application condition.

The input voltage can range from 2.9 V to 18 V,

while the output voltage can be set starting from

0.6 V to V

. Having a minimum input voltage of

2.9 V, the device is suitable also for 3.3 V bus.

Requiring a minimum set of external components,

the device includes an internal 250 kHz switching

frequency oscillator that can be externally

adjusted up to 1 MHz.

The VFQFPN8 package with exposed pad allows

reducing the R

thJA

down to approximately

60 °C/W.

VFQFPN8 3 mm x 3 mm

Figure 1. Application circuit

www.st.com

Contents L5981

2/37 Doc ID 13004 Rev 6

Contents

1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.1 Oscillator and synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4.2 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.3 Error amplifier and compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.4 Over-current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.5 Inhibit function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.6 Hysteretic thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.1 Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.2 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.3 Output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.4 Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.4.1 Type III compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.4.2 Type II compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.5 Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5.6 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.7 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

7 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

L5981 Pin settings

Doc ID 13004 Rev 6 3/37

1 Pin settings

1.1 Pin connection

Figure 2. Pin connection (top view)

1.2 Pin description

OUT

SYNCH

INH

COMP

GND

FSW

OUT

SYNCH

INH

COMP

GND

FSW

Table 1. Pin description

Pin n° Type Description

1 OUT Regulator output

2 SYNCH

Master/slave synchronization. When it is left floating, a signal with a

phase shift of half a period respect to the power turn on is present at the

pin. When connected to an external signal at a frequency higher than the

internal one, then the device is synchronized by the external signal, with

zero phase shift.

Connecting together the SYNCH pin of two devices, the one with higher

frequency works as master and the other one as slave; so the two

powers turn on have a phase shift of half a period.

3INH

A logical signal (active high) disable the device. With INH higher than

1.9 V the device is OFF and with INH lower than 0.6 V the device is ON.

4 COMP Error amplifier output to be used for loop frequency compensation

5FB

Feedback input. Connecting the output voltage directly to this pin the

output voltage is regulated at 0.6 V. To have higher regulated voltages an

external resistor divider is required from Vout to FB pin.

The switching frequency can be increased connecting an external

resistor from FSW pin and ground. If this pin is left floating the device

works at its free-running frequency of 250 kHz.

7 GND Ground

Unregulated DC input voltage

Maximum ratings L5981

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2 Maximum ratings

2.1 Absolute maximum ratings

2.2 Thermal data

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

Vcc Input voltage 20

OUT Output DC voltage -0.3 to V

, COMP, SYNCH Analog pin -0.3 to 4

INH Inhibit pin -0.3 to V

FB Feedback voltage -0.3 to 1.5

TOT

Power dissipation at T

< 60 °C 1.5. W

Junction temperature range -40 to 150 °C

stg

Storage temperature range -55 to 150 °C

Table 3. Thermal data

Symbol Parameter Value Unit

thJA

Maximum thermal resistance

junction-ambient

(1)

1. Package mounted on demonstration board.

VFQFPN 60 °C/W

L5981 Electrical characteristics

Doc ID 13004 Rev 6 5/37

3 Electrical characteristics

= 25 °C, V

= 12 V, unless otherwise specified.

Table 4. Electrical characteristics

Symbol Parameter Test condition

Val ues

Unit

Min Typ Max

Operating input voltage

range

(1)

2.9 18

CCON

Turn on V

threshold

(1)

2.9

CCHYS

UVLO hysteresis

(1)

0.175 0.3

DS(on)

MOSFET on resistance

140 170

mΩ

(1)

140 220

LIM

Maximum limiting current 1.5 1.8 2.1 A

Oscillator

Switching frequency

225 250 275

kHz

(1)

220 275

FSW

FSW pin voltage 1.254 V

D Duty cycle 0 100 %

ADJ

Adjustable switching

frequency

FSW

= 33 kΩ 1000 kHz

Dynamic characteristics

Feedback voltage 2.9 V < V

< 18 V

(1)

0.593 0.6 0.607 V

DC characteristics

Quiescent current

Duty cycle = 0,

= 0.8 V

2.4 mA

QST-BY

Total stand-by quiescent

current

20 30 μA

Inhibit

INH threshold voltage

Device ON level 0.6

Device OFF level 1.9

INH current INH = 0 7.5 10 μA

Soft-start

Soft-start duration

FSW pin floating 7.4 8.2 9.1

= 1 MHz,

FSW

= 33 kΩ

Electrical characteristics L5981

6/37 Doc ID 13004 Rev 6

Error amplifier

High level output voltage V

< 0.6 V 3

Low level output voltage V

> 0.6 V 0.1

Bias source current V

= 0 V to 0.8 V 1 μA

O SOURCE

Source COMP pin V

= 0.5 V, V

COMP

=1 V 20 mA

O SINK

Sink COMP pin V

= 0.7 V, V

COMP

=1 V 25 mA

Open loop voltage gain

(2)

100 dB

Synchronization function

High input voltage 2 3.3

Low input voltage 1

Slave sink current V

SYNCH

= 2.9 V 0.7 0.9 mA

Master output amplitude I

SOURCE

= 4.5 mA 2.0 V

Output pulse width SYNCH floating 110

Input pulse width 70

Protection

FBDISC

FB disconnection source

current

1 μA

SHDN

Thermal shutdown 150

°C

Hystereris 30

1. Specification refered to T

from -40 to +125 °C. Specification in the -40 to +125 °C temperature range are

assured by design, characterization and statistical correlation.

2. Guaranteed by design.

Table 4. Electrical characteristics (continued)

Symbol Parameter Test condition

Val ues

Unit

Min Typ Max

L5981 Functional description

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4 Functional description

The L5981 is based on a “voltage mode”, constant frequency control. The output voltage

OUT

is sensed by the feedback pin (FB) compared to an internal reference (0.6 V) providing

an error signal that, compared to a fixed frequency sawtooth, controls the on and off time of

the power switch.

The main internal blocks are shown in the block diagram in Figure 3. They are:

● A fully integrated oscillator that provides sawtooth to modulate the duty cycle and the

synchronization signal. Its switching frequency can be adjusted by and external

resistor. The voltage and frequency feed forward are implemented.

● The soft-start circuitry to limit inrush current during the start up phase.

● The voltage mode error amplifier

● The pulse width modulator and the relative logic circuitry necessary to drive the internal

power switch.

● The high-side driver for embedded p-channel power MOSFET switch.

● The peak current limit sensing block, to handle over load and short circuit conditions.

● A voltage regulator and internal reference. It supplies internal circuitry and provides a

fixed internal reference.

● A voltage monitor circuitry (UVLO) that checks the input and internal voltages.

● A thermal shutdown block, to prevent thermal run away.

Figure 3. Block diagram

Functional description L5981

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4.1 Oscillator and synchronization

Figure 4 shows the block diagram of the oscillator circuit. The internal oscillator provides a

constant frequency clock. Its frequency depends on the resistor externally connect to FSW

pin. In case the FSW pin is left floating the frequency is 250 kHz; it can be increased as

shown in Figure 6 by external resistor connected to ground.

To improve the line transient performance keeping the PWM gain constant versus the input

voltage, the voltage feed forward is implemented by changing the slope of the sawtooth

according to the input voltage change (see Figure 5.a).

The slope of the sawtooth also changes if the oscillator frequency is increased by the

external resistor. In this way a frequency feed forward is implemented (Figure 5.b) in order to

keep the PWM gain constant versus the switching frequency (see Section 5.4 for PWM gain

expression).

On the SYNCH pin the synchronization signal is generated. This signal has a phase shift of

180° with respect to the clock. This delay is useful when two devices are synchronized

connecting the SYNCH pin together. When SYNCH pins are connected, the device with

higher oscillator frequency works as master, so the slave device switches at the frequency

of the Master but with a delay of half a period. This minimizes the RMS current flowing

through the input capacitor [see L5988D data sheet].

Figure 4. Oscillator circuit block diagram

The device can be synchronized to work at higher frequency feeding an external clock

signal. The synchronization changes the sawtooth amplitude, changing the PWM gain

(Figure 5.c). This changing has to be taken into account when the loop stability is studied.

To minimize the change of the PWM gain, the free running frequency should be set (with a

resistor on FSW pin) only slightly lower than the external clock frequency. This pre-adjusting

of the frequency will change the sawtooth slope in order to get negligible the truncation of

sawtooth, due to the external synchronization.

Clock

Generator

Ramp

Generator

FSW

Sawtooth

Clock

Synchronization

SYNCH

Clock

Generator

Ramp

Generator

FSW

Sawtooth

ClockClock

Synchronization

SYNCH

L5981 Functional description

Doc ID 13004 Rev 6 9/37

Figure 5. Sawtooth: voltage and frequency feed forward; external synchronization

Figure 6. Oscillator frequency versus FSW pin resistor

Functional description L5981

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4.2 Soft-start

The soft-start is essential to assure correct and safe start up of the step-down converter. It

avoids inrush current surge and makes the output voltage increases monothonically.

The soft-start is performed by a staircase ramp on the non-inverting input (V

REF

) of the error

amplifier. So the output voltage slew rate is:

Equation 1

where SR

VREF

is the slew rate of the non-inverting input while R1 and R2 the resistor divider

to regulate the output voltage (see Figure 7). The soft-start stair case consists of 64 steps of

9.5 mV each one, from 0 V to 0.6 V. The time base of one step is of 32 clock cycles. So the

soft-start time and then the output voltage slew rate depend on the switching frequency.

Figure 7. Soft-start scheme

Soft-start time results:

Equation 2

For example with a switching frequency of 250 kHz the SS

TIME

is 8 ms.

OUT

VREF

------- -+

⎝⎠

⎛⎞

⋅=

TIME

32 64⋅

Fsw

-----------------=

L5981 Functional description

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4.3 Error amplifier and compensation

The error amplifier (E/A) provides the error signal to be compared with the sawtooth to

perform the pulse width modulation. Its non-inverting input is internally connected to a 0.6 V

voltage reference, while its inverting input (FB) and output (COMP) are externally available

for feedback and frequency compensation. In this device the error amplifier is a voltage

mode operational amplifier so with high DC gain and low output impedance.

The uncompensated error amplifier characteristics are the following:

In continuos conduction mode (CCM), the transfer function of the power section has two

poles due to the LC filter and one zero due to the ESR of the output capacitor. Different

kinds of compensation networks can be used depending on the ESR value of the output

capacitor. In case the zero introduced by the output capacitor helps to compensate the

double pole of the LC filter a type II compensation network can be used. Otherwise, a type

III compensation network has to be used (see Chapter 5.4 for details about the

compensation network selection).

Anyway the methodology to compensate the loop is to introduce zeros to obtain a safe

phase margin.

Table 5. Uncompensated error amplifier characteristics

Error amplifier Value

Low frequency gain 100 dB

GBWP 4.5 MHz

Slew rate 7 V/μs

Output voltage swing 0 to 3.3 V

Maximum source/sink current 25 mA/40 mA

Functional description L5981

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4.4 Overcurrent protection

The L5981 implements the over current protection sensing current flowing through the

power MOSFET. Due to the noise created by the switching activity of the power MOSFET,

the current sensing is disabled during the initial phase of the conduction time. This avoids an

erroneous detection of a fault condition. This interval is generally known as “masking time”

or “blanking time”. The masking time is about 200 ns.

When the over current is detected, two different behaviors are possible depending on the

operating condition.

1. Output voltage in regulation. When the over current is sensed, the power MOSFET is

switched off and the internal reference (V

REF

), that biases the non-inverting input of the

error amplifier, is set to zero and kept in this condition for a soft-start time (T

, 2048

clock cycles). After this time, a new soft-start phase takes place and the internal

reference begins ramping (see Figure 8.a).

2. Soft-start phase. If the over current limit is reached the power MOSFET is turned off

implementing the pulse by pulse over current protection. During the soft-start phase,

under over current condition, the device can skip pulses in order to keep the output

current constant and equal to the current limit. If at the end of the "masking time" the

current is higher than the over current threshold, the power MOSFET is turned off and it

will skip one pulse. If, at the next switching on at the end of the "masking time" the

current is still higher than the threshold, the device will skip two pulses. This

mechanism is repeated and the device can skip up to seven pulses. While, if at the end

of the "masking time" the current is lower than the over current threshold, the number of

skipped cycles is decreased of one unit. At the end of soft-start phase the output

voltage is in regulation and if the over current persists the behavior explained above

takes place. (see Figure 8.b)

So the over current protection can be summarized as an “hiccup” intervention when the

output is in regulation and a constant current during the soft-start phase. If the output is

shorted to ground when the output voltage is on regulation, the over current is triggered and

the device starts cycling with a period of 2048 clock cycles between “hiccup” (power

MOSFET off and no current to the load) and “constant current” with very short on-time and

with reduced switching frequency (up to one eighth of normal switching frequency). See

Figure 32. for short circuit behavior.

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