The L5970AD is a step down monolithic power
switching regulator with a switch current limit of 1.5A
so it is able to deliver more than 1A DC current to the
load depending on the application conditions.
The output voltage can be set from 1.235V to 35V.
The device uses an internal P-Channel D-MOS tran-
sistor (with a typical R
element to avoid the use of bootstrap capacitor and
guarantee high efficiency.
An internal oscillator fixes the switching frequency at
500KHz to minimize the size of external components.
Having a minimum input voltage of 4.4V only, it is
particularly suitable for 5V bus, available in all computer related applications.
Pulse by pulse current limit with the internal frequency modulation offers an effective constant current
short circuit protection.
of 200mΩ) as switching
DSON
Figure 2. Test and Application Circuit
VREF
3.3V
C4
22nF
C3
220pF
VCC
SYNC.
COMP
R3
4.7K
VIN = 4.4V to 35V
C1
10µF
35V
CERAMIC
March 2005
6
8
L5970AD
2
4
OUT
1
7
5
GNDINH
D05IN1530
FB
3
L1 15µH
D1
STPS2L25U
R1
5.6K
R2
3.3K
VOUT=3.3V
C2
330µF
10V
Rev. 1
1/11
L5970AD
Table 2. Thermal Data
SymbolParameterValueUnit
R
th (j-amb)
(*) Package mounted on board
Figure 3. Pin Connection (top view)
Table 3. Pin Description
N.NameDescription
1OUTRegulator Output.
2SYNC Master/Slave Synchronization. When it is open, a signal synchronous with the turn-off of the inter-
3INH
4COMP E/A output to be used for frequency compensation.
5FBStepdown feedback input. Connecting the output voltage directly to this pin results in an output
6V
7GNDGround.
8V
Thermal Resistance Junction to ambientMax.120 (*)°C/W
VCC
OUT
SYNC
INH
COMP
1
2
3
4
D98IN955
8
GND
7
VREF
6
FB
5
nal power is present at the pin. When connected to an external signal at a frequency higher than
the internal one, then the device is synchronized by the external signal.
Connecting together the SYNC pin of two devices, the one with the higher frequency works as
master and the other one, works as slave.
A logical signal (active high) disables the device. With IHN higher than 2.2V the device is OFF and with
INH lower than 0.8V, the device is ON.
If INH is not used the pin must be grounded. When it is open, an internal pull-up disables the device.
voltage of 1.235V. An external resistor divider is required for higher output voltages (the typical
value for the resistor connected between this pin and ground is 4.7K).
Reference voltage of 3.3V. No filter capacitor is needed to stability.
The main internal blocks are shown in Fig. 4, where is reported the device block diagram. They are:
●A voltage regulator that supplies the internal circuitry. From this regulator, a 3.3V reference
voltage is externally available.
●A voltage monitor circuit that checks the input and internal voltages.
●A fully integrated sawtooth oscillator whose frequency is500KHz
●Two embedded current limitations circuitries which control the current that flows through the
power switch. The Pulse by Pulse Current Limit forces the power switch OFF cycle by cycle
if the current reaches an internal threshold, while the Frequency Shifter reduces the switching frequency in order to strongly reduce the duty cycle.
●A transconductance error amplifier.
●A pulse width modulator (PWM) comparator and the relative logic circuitry necessary to drive
the internal power.
●An high side driver for the internal P-MOS switch.
●An inhibit block for stand-by operation.
●A circuit to realize the thermal protection function.
Figure 4. Block Diagram
VCC
VOLTAGES
MONITOR
PWM
+
-
THERMAL
SHUTDOWN
SUPPLY
1.235V 3.5V
PEAK TO PEAK
CURRENT LIMIT
DCkQ
DRIVER
FREQUENCY
SHIFTER
GNDOUT
V
REF
BUFFER
LPDMOS
POWER
D00IN1125
V
REF
INH
COMP
FB
SYNC
TRIMMING
1.235V
INHIBIT
E/A
-
+
OSCILLATOR
3.1 POWER SUPPLY & VOLTAGE REFERENCE
The internal regulator circuit (shown in Figure 2) consists of a start-up circuit, an internal voltage Preregulator, the Bandgap voltage reference and the Bias block that provides current to all the blocks.
The Starter gives the start-up currents to the whole device when the input voltage goes high and the device is enabled (inhibit pin connected to ground).
The Preregulator block supplies the Bandgap cell with a preregulated voltage V
that has a very low
REG
supply voltage noise sensitivity.
3.2 VOLTAGES MONITOR
An internal block senses continuously the Vcc, V
and Vbg. If the voltages go higher than their thresholds, the
ref
regulator starts to work. There is also an hysteresis on the V
4/11
(UVLO).
CC
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