L5962
Multiple linear/switching voltage regulator for car-radio
Features
■Step-down synchronous switching voltage regulator
–Internal high-side/ Low-side NDMOS
–1.2 < Vout < 8 V selectable through external resistors
–1.2/2.5 A load current selected through dedicated pin
–185 kHz free-run frequency
–SYNC function (220 < fsw < 400 kHz)
■Linear regulators
–3.3/5 V @ 150 mA standby regulator selected through dedicated pin (VSTBYSEL)
–5/8.5 V @ 350 mA switched linear regulator enabled and selected through I2C bus (VLR1)
–3.3/10 V @ 1 A switched linear regulator enabled and selected through I2C bus (VLR2)
■2 High side drivers (0.5 V max drop @ 0.5 A) enabled through I2C bus and equipped with protection circuit against:
–short to ground and battery
–loss of ground and battery
–unsupplied short to battery
■Reset function with configurable delay (RST, RSTDLY)
■I2C bus
PowerSO36 (slug-up)
■Enable pin to drive switching regulator and I2C bus logic
■Under/over voltage battery detector (VBATVW)
–Under voltage threshold adjustable through dedicated pin (LVWIN)
■Load dump protection
■Independent thermal protection on all regulators
Description
L5962 is a very versatile device exploiting BCD technology characteristics to provide a complete set of regulated voltages covering all the needs of a car-radio set.
In standby condition the device guarantees extremely low quiescent current (90 µA max - 40 °C < T < 85 °C) and minimum operating voltage (4.5 V using an external Schottky diode for the back-up function).
Order code |
Package |
Packing |
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L5962 |
PowerSO36 |
Tray |
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L5962TR |
PowerSO36 |
Tape and reel |
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December 2009 |
Doc ID 16819 Rev 2 |
1/24 |
www.st.com
Contents |
L5962 |
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Contents
1 |
Block and application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2 |
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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3 |
Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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3.1 |
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
9 |
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3.2 |
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
9 |
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3.3 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
9 |
4 |
Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
15 |
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4.1 |
Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
15 |
4.1.1 Linear regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.1.2 Switching regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2 High side drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5 |
Operating mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5.1 |
Battery detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
18 |
6 |
I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
19 |
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6.1 |
Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.2 |
Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.3 |
Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6.4 |
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
19 |
7 |
Software specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
21 |
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8 |
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
22 |
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9 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
23 |
2/24 |
Doc ID 16819 Rev 2 |
L5962 |
List of tables |
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List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 6. Chip address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 7. IB1 data byte. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 8. VLR2 output level selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 9. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Doc ID 16819 Rev 2 |
3/24 |
List of figures |
L5962 |
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List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Low voltage warning high level block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 5. Data validity on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 6. Timing diagram on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 7. Acknowledge on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 8. PowerSO36 (slug-up) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . 22
4/24 |
Doc ID 16819 Rev 2 |
L5962 |
Block and application diagram |
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VINSW |
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VBATP |
Bandgap |
Reference |
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PH |
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Switching |
CBS |
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CLIM |
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External |
POR & |
Regulator |
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Storage |
Startup Logic |
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VFB |
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VCMP |
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SOST |
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Standby |
VSTBYSEL |
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VSTBY |
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Regulator |
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Oscillator |
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SYNCH |
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Clock |
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LVWIN |
UV / OV |
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Linear |
VLR1 |
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Regulator |
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VBATVW |
Detect |
Synch |
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#1 |
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Logic |
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RST |
Reset & |
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RSTDLY |
Delay |
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Linear |
VINLR2 |
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Regulator |
VLR2 |
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#2 |
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SDA |
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SCL |
I2Cbus |
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Logic |
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HSD |
HSD1 |
EN |
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Ground |
HSD |
HSD2 |
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TAB PGND AGND SUBS |
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AC00428 |
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VBAT |
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Doc ID 16819 Rev 2 |
5/24 |
6/24 |
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Block |
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.2 Figure |
application and |
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+5V |
47K S1 |
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22µH |
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Application |
diagram |
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470 |
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VDCOUT |
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22K |
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22k/(VDCOUT-1) |
3.3nF |
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36 NC |
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TAB 1 |
22 |
200u/10V |
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2.2µ |
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35 NC |
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PGND 2 |
1500pF |
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75k |
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0.1µF |
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2.7nF |
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34 CLIM |
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CBS 3 |
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diagram |
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ID Doc |
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1.8nF |
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33 VFB |
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PHASE 4 |
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32 VCMP |
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NC 5 |
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4.7µ |
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31 SOST |
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NC 6 |
30µ/35V |
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SYNC |
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47K |
30 SYNC |
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SUBGND 7 |
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16819 |
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VBAT |
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SCL |
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RESET |
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29 SCL |
L5962 |
VINsw 8 |
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EN |
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HSD1 |
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+5V |
28 EN |
HSD1 9 |
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Rev |
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VSTBY 10K |
S2 |
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27 RESET |
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VBAT 10 |
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VLR2 |
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HSD2 |
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26 VLR2 |
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HSD2 11 |
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2 |
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VBAT |
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25 VINLR |
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VBATP 12 |
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1000u/50V |
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SDA |
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24 SDA |
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RSTDLY 13 |
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VLR1 |
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VSTBY |
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1µ.0 |
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VSTBY 10K |
23 VLR1 |
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VSTBY 14 |
0.1µ |
0.1µ |
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0.1µ |
1µ 0.1µ |
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22 VBATW |
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VSTBYS 15 |
1µ |
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0.1µ |
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1µ |
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21 LVWIN |
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S3 |
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AGND 16 |
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470µ/25V |
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VBATW |
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20 NC |
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NC 17 |
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19 NC |
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NC 18 |
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R1 |
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R2 |
0.1µ |
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L5962 |
L5962 |
Pin description |
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N.C. |
36 |
1 |
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TAB |
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N.C. |
35 |
2 |
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PGND |
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CLIM |
34 |
3 |
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CBS |
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VFB |
33 |
4 |
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PH |
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VCMP |
32 |
5 |
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N.C. |
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SOST |
31 |
6 |
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N.C. |
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SYNC |
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30 |
7 |
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SUBGND |
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SCL |
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29 |
8 |
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VINsw |
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EN |
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28 |
9 |
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HSD1 |
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RST |
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27 |
10 |
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VBAT |
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VLR2 |
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26 |
11 |
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HSD2 |
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VINLR2 |
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25 |
12 |
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VBATP |
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SDA |
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24 |
13 |
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RSTDLY |
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VLR1 |
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14 |
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VSTBY |
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VBATW |
22 |
15 |
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VSTBYSEL |
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LVWIN |
21 |
16 |
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AGND |
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N.C. |
20 |
17 |
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N.C. |
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N.C. |
19 |
18 |
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N.C. |
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AC00429 |
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Table 2. |
Pin description |
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Pin # |
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Pad name |
Function |
Description |
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1 |
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TAB |
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This pin must be connected to GND |
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2 |
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PGND |
Switching regulator ground |
It is the power ground reference |
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3 |
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CBS |
Bootstrap for switching regulator |
Bootstrap capacitor Input for the switching |
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regulator |
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Phase output. It is the switching output of the |
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PH |
Switching stage output |
switching regulator. It also provides phase |
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reference for bootstrap drive. |
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5 |
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N.C. |
Not connected |
- |
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6 |
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N.C. |
Not connected |
- |
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7 |
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SUBGND |
Substrate ground |
Substrate ground |
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8 |
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VINsw |
Switching regulator supply voltage |
Battery voltage for the switching regulator |
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9 |
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HSD1 |
High side driver 1 |
Output of the 1st high side driver |
10 |
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VBAT |
VLR1/HSD1/HSD2 supply voltage |
Voltage input for linear regulator #1 high side |
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driver and battery warnings |
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11 |
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HSD2 |
High side driver 2 |
Output of the 2nd high side driver |
12 |
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VBATP |
Standby regulator supply voltage |
Protected battery input for bias, bandgap, |
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oscillator, and VSTBY regulator |
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13 |
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RSTDLY |
Reset delay function |
Input |
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14 |
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VSTBY |
Standby regulator output |
Output of the standby regulator |
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Doc ID 16819 Rev 2 |
7/24 |
Pin description |
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L5962 |
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Table 2. |
Pin description (continued) |
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Pin # |
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Pad name |
Function |
Description |
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15 |
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VSTBYSEL |
Standby regulator selector |
Selection input for standby regulator output (3.3 V |
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or 5 V) |
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16 |
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AGND |
Analog ground |
Analog voltage reference |
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17 |
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N.C. |
Not connected |
- |
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18 |
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N.C. |
Not connected |
- |
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19 |
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N.C. |
Not connected |
- |
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20 |
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N.C. |
Not connected |
- |
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21 |
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LVWIN |
Battery detector adjustment input |
Low-voltage warning input |
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22 |
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VBATW |
Battery detector output (open-drain) |
Battery voltage warning output |
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23 |
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VLR1 |
Switched linear regulator 1 |
Output of the 1st linear regulator |
24 |
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SDA |
I2C bus data |
I2C data line |
25 |
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VINLR2 |
VLR2 supply voltage |
Battery supply for the 2nd linear regulator |
26 |
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VLR2 |
Switched linear regulator 2 |
Output of the 2nd linear regulator |
27 |
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RST |
Reset |
Output |
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28 |
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EN |
Enable |
Active mode enable input. Active high |
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29 |
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SCL |
I2C bus clock |
I2C clock source supplied by the master device |
30 |
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SYNC |
Switching regulator SYNC function |
Synchronization Input |
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31 |
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SOST |
Switching regulator soft-start |
Soft start external capacitor |
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32 |
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VCMP |
Switching regulator compensation |
Feedback compensation input. |
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33 |
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VFB |
Switching regulator feedback |
Regulated output voltage sense |
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34 |
|
CLIM |
Switching regulator current limit selector |
Choose between two current limits |
|
|
|
|
|
35 |
|
N.C. |
Not connected |
- |
|
|
|
|
|
36 |
|
N.C. |
Not connected |
- |
|
|
|
|
|
8/24 |
Doc ID 16819 Rev 2 |