ST L5962 User Manual

L5962

Multiple linear/switching voltage regulator for car-radio

Features

■Step-down synchronous switching voltage regulator

–Internal high-side/ Low-side NDMOS

–1.2 < Vout < 8 V selectable through external resistors

–1.2/2.5 A load current selected through dedicated pin

–185 kHz free-run frequency

–SYNC function (220 < fsw < 400 kHz)

■Linear regulators

–3.3/5 V @ 150 mA standby regulator selected through dedicated pin (VSTBYSEL)

–5/8.5 V @ 350 mA switched linear regulator enabled and selected through I2C bus (VLR1)

–3.3/10 V @ 1 A switched linear regulator enabled and selected through I2C bus (VLR2)

■2 High side drivers (0.5 V max drop @ 0.5 A) enabled through I2C bus and equipped with protection circuit against:

–short to ground and battery

–loss of ground and battery

–unsupplied short to battery

■Reset function with configurable delay (RST, RSTDLY)

■I2C bus

Table 1. Device summary

PowerSO36 (slug-up)

■Enable pin to drive switching regulator and I2C bus logic

■Under/over voltage battery detector (VBATVW)

–Under voltage threshold adjustable through dedicated pin (LVWIN)

■Load dump protection

■Independent thermal protection on all regulators

Description

L5962 is a very versatile device exploiting BCD technology characteristics to provide a complete set of regulated voltages covering all the needs of a car-radio set.

In standby condition the device guarantees extremely low quiescent current (90 µA max - 40 °C < T < 85 °C) and minimum operating voltage (4.5 V using an external Schottky diode for the back-up function).

Order code	Package	Packing
L5962	PowerSO36	Tray
L5962TR	PowerSO36	Tape and reel

December 2009

Doc ID 16819 Rev 2

1/24

www.st.com

Contents	L5962

Contents

1	Block and application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 5
2	Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		7
3	Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		9
	3.1	Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	3.2	Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
	3.3	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	9
4	Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		15
	4.1	Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15

4.1.1 Linear regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.1.2 Switching regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.2 High side drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5	Operating mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		18
	5.1	Battery detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
6	I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		19
	6.1	Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
	6.2	Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
	6.3	Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
	6.4	Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	19
7	Software specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		21
8	Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		22
9	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		23

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L5962	List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 6. Chip address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 7. IB1 data byte. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 8. VLR2 output level selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 9. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Doc ID 16819 Rev 2

3/24

List of figures	L5962

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Low voltage warning high level block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 5. Data validity on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 6. Timing diagram on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 7. Acknowledge on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 8. PowerSO36 (slug-up) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . 22

4/24	Doc ID 16819 Rev 2

L5962	Block and application diagram

1 Block and application diagram

Figure 1. Block diagram

			VINSW
VBATP	Bandgap	Reference		PH
			Switching	CBS
				CLIM
	External	POR &	Regulator
	Storage	Startup Logic		VFB
				VCMP
				SOST
			Standby	VSTBYSEL
				VSTBY
			Regulator
	Oscillator
SYNCH		Clock
LVWIN	UV / OV		Linear	VLR1
			Regulator
VBATVW	Detect	Synch
			#1
		Logic
RST	Reset &
RSTDLY	Delay		Linear	VINLR2
			Regulator	VLR2
			#2
SDA
SCL	I2Cbus
	Logic		HSD	HSD1
EN
		Ground	HSD	HSD2
		TAB PGND AGND SUBS		AC00428
			VBAT

Doc ID 16819 Rev 2

5/24

6/24

Block

.2 Figure

application and

+5V

47K S1

22µH

Application

diagram

470

VDCOUT

22K

22k/(VDCOUT-1)

3.3nF

36 NC

TAB 1

22

200u/10V

2.2µ

35 NC

PGND 2

1500pF

75k

0.1µF

2.7nF

34 CLIM

CBS 3

diagram

ID Doc

1.8nF

33 VFB

PHASE 4

32 VCMP

NC 5

4.7µ

31 SOST

NC 6

30µ/35V

SYNC

47K

30 SYNC

SUBGND 7

16819

VBAT

SCL

RESET

29 SCL

L5962

VINsw 8

EN

HSD1

+5V

28 EN

HSD1 9

Rev

VSTBY 10K

S2

27 RESET

VBAT 10

VLR2

HSD2

26 VLR2

HSD2 11

2

VBAT

25 VINLR

VBATP 12

1000u/50V

SDA

24 SDA

RSTDLY 13

VLR1

VSTBY

1µ.0

VSTBY 10K

23 VLR1

VSTBY 14

0.1µ

0.1µ

0.1µ

1µ 0.1µ

22 VBATW

VSTBYS 15

1µ

0.1µ

1µ

21 LVWIN

S3

AGND 16

470µ/25V

VBATW

20 NC

NC 17

19 NC

NC 18

R1

R2

0.1µ

L5962

L5962	Pin description

2 Pin description

Figure 3. Pin connection (top view)

N.C.	36		1			TAB
N.C.	35		2			PGND
CLIM	34		3			CBS
VFB	33		4			PH
VCMP	32		5			N.C.
SOST	31		6			N.C.
SYNC		30	7			SUBGND
SCL		29	8			VINsw
EN		28	9			HSD1
RST		27	10			VBAT
VLR2		26	11			HSD2
VINLR2		25	12			VBATP
SDA		24	13			RSTDLY
VLR1		23	14			VSTBY
VBATW	22		15			VSTBYSEL
LVWIN	21		16			AGND
N.C.	20		17			N.C.
N.C.	19		18			N.C.
			AC00429

Table 2.		Pin description
Pin #		Pad name	Function	Description
1		TAB		This pin must be connected to GND
2		PGND	Switching regulator ground	It is the power ground reference
3		CBS	Bootstrap for switching regulator	Bootstrap capacitor Input for the switching
				regulator
				Phase output. It is the switching output of the
4		PH	Switching stage output	switching regulator. It also provides phase
				reference for bootstrap drive.
5		N.C.	Not connected	-
6		N.C.	Not connected	-
7		SUBGND	Substrate ground	Substrate ground
8		VINsw	Switching regulator supply voltage	Battery voltage for the switching regulator
9		HSD1	High side driver 1	Output of the 1st high side driver
10		VBAT	VLR1/HSD1/HSD2 supply voltage	Voltage input for linear regulator #1 high side
				driver and battery warnings
11		HSD2	High side driver 2	Output of the 2nd high side driver
12		VBATP	Standby regulator supply voltage	Protected battery input for bias, bandgap,
				oscillator, and VSTBY regulator
13		RSTDLY	Reset delay function	Input
14		VSTBY	Standby regulator output	Output of the standby regulator

Doc ID 16819 Rev 2

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Pin description				L5962
Table 2.		Pin description (continued)
Pin #		Pad name	Function	Description
15		VSTBYSEL	Standby regulator selector	Selection input for standby regulator output (3.3 V
				or 5 V)
16		AGND	Analog ground	Analog voltage reference
17		N.C.	Not connected	-
18		N.C.	Not connected	-
19		N.C.	Not connected	-
20		N.C.	Not connected	-
21		LVWIN	Battery detector adjustment input	Low-voltage warning input
22		VBATW	Battery detector output (open-drain)	Battery voltage warning output
23		VLR1	Switched linear regulator 1	Output of the 1st linear regulator
24		SDA	I2C bus data	I2C data line
25		VINLR2	VLR2 supply voltage	Battery supply for the 2nd linear regulator
26		VLR2	Switched linear regulator 2	Output of the 2nd linear regulator
27		RST	Reset	Output
28		EN	Enable	Active mode enable input. Active high
29		SCL	I2C bus clock	I2C clock source supplied by the master device
30		SYNC	Switching regulator SYNC function	Synchronization Input
31		SOST	Switching regulator soft-start	Soft start external capacitor
32		VCMP	Switching regulator compensation	Feedback compensation input.
33		VFB	Switching regulator feedback	Regulated output voltage sense
34		CLIM	Switching regulator current limit selector	Choose between two current limits
35		N.C.	Not connected	-
36		N.C.	Not connected	-

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