ST L4981A, L4981B User Manual

L4981A

®

CONTROL BOOST PWM UP TO 0.99P.F.
LIMIT LINE CURRENT DISTORTION TO < 5%
UNIVERSAL INPUT MAINS
FEED FORWARD LINE AND LOAD REGULA-

TION
AVERAGE CURRENT MODE PWM FOR

MINIMUM NOISE SENSITIVITY
HIGH CURRENT BIPOLAR AND DMOS TO-

TEM POLE OUTPUT
LOW START-UP CURRENT (0.3mA TYP.)
UNDER VOLTAGE LOCKOUT WITH HYS-

TERESIS AND PROGRAMMABLE TURN ON
THRESHOLD

OVERVOLTAGE, OVERCURRENT PROTEC­TION

PRECISE 2% ON CHIP REFERENCE EX­TERNALLY AVAILABLE

SOFT START

DESCRIPTION

The L4981 I.C. provides the necessary features
to achieve a very high power factor up to 0.99.
Realized in BCD 60II technology this power factor
corrector (PFC) pre-regulator contains all the con-

L4981B

POWER FACT O R CORR ECTOR

MULTIPOWER BCD TECHNOLOGY

DIP20 SO20

ORDERING NUMBERS:

L4981XD (SO20)

trol functions for designing a high efficiency-mode
power supply with sinusoidal line current con­sumption.
The L4981 can be easily used in systems with
mains voltages between 85V to 265V without any
line switch. This new PFC offers the possibility to
work at fixed frequency (L4981A) or modulated
frequency (L4981B) optimizing the size of the in-

L4981X (DIP20)

BLOCK DIAGRAM

November 2001

1/16

L4981A - L4981B

put filter; both the operating frequency modes
working with an average current mode PWM con­troller, maintaining sinusoidal line c urrent without
slope compensation.
Besides power MOSFET gate driver, precise volt­age reference (externally available), error ampli-

soft start are included. To limit the number of the
external components, the device integrates pro­tections as overvoltage and overcurrent. The
overcurrent level can be programmed using a
simple resistor for L4981A. For a better precision
and for L4981B an external divider must be used.

fier, undervoltage lockout, current sense and the

ABSOLUTE MAXIMUM RATINGS

Symbol Pin Parameter Value Unit

V

CC

I

GDRV

V

GDRV

V

VA-OUT

I

AC

V

CA-OUT

V

ROSC

I

COSC

I

FREQ-MOD

V

SYNC

V

IPK

P

tot

T

op

T

stg

(*) Maximum package power dissipation limits must be observed.

19 Supply Voltage (ICC ≤50mA) (*) selflimit V
20 Gate driv. output peak current (t = 1µs) SINK 2 Α

. SOURCE 1.5 A

Gate driv. output voltage t = 0.1µs-1V
Voltages at pins 3, 14, 7, 6, 12, 15 -0.3 to 9 V

13 Error Amplifier Voltage -0.3 to 8.5 V

4 AC Input Current 5 mA

Voltages at pin 8, 9 -0.5 to 7 V

5 Current Amplifier Volt. (Isource = -20mA; Isink = 20mA) -0.3 to 8.5 V

17 Voltage at pin 17 -0.3 to 3 V

11, 18 Voltage at pin 11, 18 -0.3 to 7 V

18 Input Sink Current 15 mA
16 Frequency Modulation Sink Current (L4981B) 5 mA
16 Sync. Voltage (L4981A) -0.3 to 7 V

2 Voltage at pin 2

Voltage at Pin 2 t = 1µs
Power Dissipation at T
Power Dissipation at T

= 70°C (DIP20) 1 W

amb

= 70°C (SO20) 0.6 W

amb

-0.3 to 5.5

-2

Operating Ambient Temperature -40 to 125 °C
StorageTemperature -55 to 150 °C

V
V

PIN CONNECTIONS

2/16

(Top views)

L4981A

L4981B

L4981A - L4981B

THERMAL DATA

Symbol Parameter DIP 20 SO 20 Unit

R

th j-amb

PIN FUNCTIONS

N. Name Description

1 P-GND Power ground.
2 IPK

Thermal Resistance Junction-ambient 80 120 °C/W

L4981A

peak current limiting. A current limitation is obtained using a single resistor connected
between Pin 2 and the sense resistor. To have a better precision another resistor between Pin
2 and a reference voltage (Pin 11) must be added.

L4981B

peak current limiting. A precise current limitation is obtained using two external
resistor only. These resistors must be connected between the sense resistor, Pin 2 and the
reference voltage.

3 OVP Overvoltage protection. At this input are compared an internal precise 5.1V (typ) voltage

reference with a sample of the boost output voltage obtained via a resistive voltage divider in
order to limit the maximum output peak voltage.

4 IAC Input for the AC current. An input current proportional to the rectified mains voltage generates,

via a multiplier, the current reference for the current amplifier.

5 CA-OUT Current amplifier output. An external RC network determinates the loop gain.
6 LFF Load feedforward; this voltage input pin allows to modify the multiplier output current

proportionally to the load, in order to give a faster response versus load transient. The best
control is obtained working between 1.5V and 5.3V. If this function is not used, connect this pin
to the voltage reference (pin = 11).

7 VRMS Input for proportional RMS line voltage. the VRMS input compesates the line voltage changes.

Connecting a low pass filter between the rectified line and the pin 7, a DC voltage proportional
to the input line RMS voltage is obtained. The best control is reached using input voltage
between 1.5V and 5.5V. If this function is not used connect this pin to the voltage reference
(pin = 11).

8 MULT-OUT Multiplier output. This pin common to the multiplier output and the current amplifier N.I. input is

. The MULT-OUT pin must be taken not below -0.5V.

SENSE

9I

SENSE

an high impedence input like I
Current amplifier inverting input. Care must be taken to avoid this pin goes down -0.5V.

10 S-GND Signal ground.
11 V

REF

Output reference voltage (typ = 5.1V).Voltage refence at ± 2% of accuracy externally available,
it’s internally current limited and can deliver an output current up to 10mA.

12 SS A capacitor connected to ground defines the soft start time. An internal current generator

delivering 100µA (typ) charges the external capacitor defining the soft start time constant. An
internal MOS discharge, the external soft start capacitor both in overvoltage and UVLO
conditions.

13 VA-OUT Error amplifier output, an RC network fixes the voltage loop gain characteristics.
14 VFEED Voltage error amplifier inverting input. This feedback input is connected via a voltage divider to

the boost output voltage.

15 P-UVLO Programmable under voltage lock out threshold input. A voltage divider between supply

voltage and GND can be connected in order to program the turn on threshold.

16 SYNC

(L4981A)

This synchronization input/output pin is CMOS logic compatible. Operating as SYNC in, a
rectangular wave must be applied at this pin. Opearting as SYNC out, a rectangular clock
pulse train is available to synchronize other devices.

FREQ-MOD

(L4981B)

17 R
18 C
19 V

OSC
OSC

CC

Frequency modulation current input. An external resistor must be connected between pin 16
and the rectified line voltage in order to modulate the oscillator frequency. Connecting pin 16 to
ground a fixed frequency imposed by R

OSC

and C

An external resistor connected to ground fixes the constant charging current of C

is obtained.

OSC

OSC

.
An external capacitor connected to GND fixes the switching frequency.
Supply input voltage.

20 GDRV Output gate driver. Bipolar and DMOS transistors totem pole output stage can deliver peak

current in excess 1A useful to drive MOSFET or IGBT power stages.

3/16

L4981A - L4981B

ELECTRICAL CHARACTERISTICS

= 24KΩ, CSS = 1µF, V

R

OSC

= GND, V

V

FEED

= 1V, V

IPK

OVP

= 3.5V, V

CA-OUT

= 1V, TJ = 25°C

(Unless otherwise specified V

ISENSE

= 0V, V

LFF

= V

= 18V, C

CC

, IAC = 100µA, V

REF

OSC

= 1nF,

RMS

= 1V,

Symbol Prameter Test Condition Min. Typ. Max. Unit

ERROR AMPLIFIER SECTION

V

IO

IIBInput Bias Current V

Input Offset Voltage –25°C < TJ < 85°C ±8mV

= 0V -500 -50 500 nA

FEED

Open Loop Gain 70 100 dB

V

13H

V

13L

-I

13

I

13

Output High voltage V

Output Low Voltage V

Output Source Current V
Output Sink Current V

FEED

I

VA-OUT

FEED

I

VA-OUT

FEED
FEED

= 4.7V

= -0.5mA

= 5.5V

= 0.5mA
= 4.7V; V
= 5.5V; V

5.5 6.5 7.5 V

0.4 1 V

= 3.5V 2 10 mA

VA-OUT

= 3.5V 4 20 mA

VA-OUT

REFERENCE SECTION

V

ref

∆V

∆V

I

ref sc

Reference Output Voltage –25°C < TJ < 85°C 4.97 5.1 5.23 V

T

Load Regulation 1mA ≤ I

ref

–25°C < T

Line Regulation 12V ≤ VCC ≤ 19V

ref

–25°C < T

Short Circuit Current V

= 25°C I

j

= 0V 20 30 50 mA

ref

= 0 5.01 5.1 5.19 V

ref

≤ 10mA

ref

< 85°C

J

315mV

310mV

< 85°C

J

OSCILLATOR SECTION

f

osc

V

svp

I

18C

I

18D

V

18

SYNC SECTION

t

W

I

16

-I

16

V

16L

V

16H

t

d

FREQUENCY MODULATION FUNCTION

f

18max

f

18min

Initial Accuracy Tj = 25°C 85 100 115 KHz
Frequency Stability 12V ≤ VCC ≤ 19V

–25°C < T

< 85°C

J

80 100 120 KHz

Ramp Valley to Peak 4.7 5 5.3 V
Charge Current V
Discharge Current V

= 3.5V 0.45 0.55 0.65 mA

COSC

= 3.5V 11.5 mA

COSC

Ramp Valley Voltage 0.9 1.15 1.4 V

(Only for

L4981A

)
Output Pulse Width 50% Amplitude 0.3 0.8 µs
Sink Current with Low Output

Voltage
Source Current with High Output

Voltage

V
V

V
V

SYNC
COSC

SYNC
COSC

= 0.4V
= 0V

= 4.5V
= 6.7V

0.4 0.8 mA

16 mA

Low Input Voltage 0.9 V
High Input Voltage 3.5 V
Pulse for Synchronization 800 ns

(Only for
Maximum Oscillation Frequency V
Minimum Oscillator Frequency I

L4981B

FREQ-MOD

FREQ-MOD

V

= 4V (Pin 7)

VRMS

I

FREQ-MOD

V

= 2V (Pin 7)

VRMS

)

= 0V (Pin 16) I

= 360µA (Pin 16)

= 180µA (Pin 16)

= 0 85 100 115 KHz

freq

74 KHz

76 KHz

SOFT START SECTION

V

I

SS

12sat

Soft Start Source Current VSS = 3V 60 100 140 µA
Output Saturation Voltage V3 = 6V, ISS = 2mA 0.1 0.25 V

4/16

L4981A - L4981B

ELECTRICAL CHARACTERISTICS

(continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit

SUPPLY VOLTAGE

V

CC

Operating Supply Voltage 19.5 V

OVER VOLTAGE PROTECTION COMPARATOR

V

thr

V

3Hys

I

3

t

d

Rising Threshold Voltage V

-20mV

ref

5.1 V
+20mV

ref

Hysteresis 180 250 320 mV
Input Bias Current 0.05 1 µA
Propagation delay to output V

OVP

= V

+100mV 1 2 µs

thr

OVER CURRENT PROTECTION COMPARATOR

V

th

t

d

I

ipk

I

L

Threshold Voltage ±30 mV
Propagation delay to Output V
Current Source Generator V
Leakage Current V

= V

OCP

= -0.1V

IPK

= -0.1V

IPK

-0.2V 0.4 0.9 µs

thr

only for L4981A
only for L4981B

65 85 105 µA

5 µA

CURRENT AMPLIFIER SECTION

V

offset

I

9bias

SVR Supply Voltage Rejection 12V ≤ V

V

5H

V

5L

-I

5

I

5

Input Offset Voltage V
Input Bias Current V

MULT OUT
SENSE

Open Loop Gain 1.1V ≤ V

V

MULT OUT

Output High Voltage V

Output Low Voltage V

Output Source Current V
Output Sink Current 2 10 mA

MULT OUT

I

CA OUT

MULT OUT

I

CA OUT

MULT OUT

V

IAC

= V

= 3.5V ±2mV

SENSE

= 0V -500 50 500 nA

≤ 6V 70 100 dB

CA OUT

≤ 19V

CC

= 3.5V V
= 200mV

= -0.5mA, V

= -200mV

= 0.5mA, V

= 200mV,

= 0V, V

CA-OUT

SENSE

= 0V

IAC

= 0V

IAC

= 3.5V

= 3.5V

68 90 dB

6.2 V

0.9 V

210 mA

OUTPUT SECTION

V
V

V

GDRV

20L
20H

t

r

t

f

Output Voltage Low I
Output Voltage High I

Output Voltage Rise Time C
Output Voltage Fall Time C
Voltage Clamp I

= 250mA 0.5 0.8 V

SINK

= 250mA

SOURCE

V

= 15V

CC

= 1nF 50 150 ns

OUT

= 1nF 30 100 ns

OUT

= 0mA 13 16 19 V

SOURCE

11.5 12.5 V

TOTAL STANDBY CURRENT SECTION

I

19start

I

19on

Supply Current before start up VCC = 14V 0.3 0.5 mA
Supply Current after turn on V

= 0V, V

IAC

COSC

= 0,

812mA

Pin17 = Open

I

19

V

CC

Operating Supply Current Pin20 = 1nF 12 16 mA

Zener Voltage (*) 20 25 30 V

UNDER VOLTAGE LOCKOUT SECTION

V

V

th ON

th OFF

Turn on Threshold 14.5 15.5 16.5 V
Turn off Threshold 9 10 11 V
Programmable Turn-on Threshold Pin 15 to VCC = 220K

10.6 12 13.4 V

Pin15 to GND = 33K

LOAD FEED FORWARD

I

LFF

V

(*) Maximum package power dissipation limits must be observed.

Bias Current V6 = 1.6V 70 140 µA

= 5.3V 200 300 µA

V

6

Input Voltage Range 1.6 5.3 V

I

V

5/16