ST L4974A User Manual

L4974

.

.3.5A OUTPUT CURRENT

.5.1V TO 40V OUTPUT VOLTAGE RANGE

.0 TO 90% DUTY CYCLE RANGE

.INTERNAL FEED-FORWARD LINE REG.

.INTERNAL CURRENT LIMITING

.PRECISE 5.1V ± 2% ON CHIP REFERENCE

.RESET AND POWER FAIL FUNCTIONS

.INPUT/OUTPUT SYNC PIN

UNDER VOLTAGE LOCK OUT WITH HYS-

.TERETIC TURN-ON

PWM LATCH FOR SINGLE PULSE PER PE-

.RIOD

.VERY HIGH EFFICIENCY

.SWITCHING FREQUENCY UP TO 200KHz

.THERMAL SHUTDOWN CONTINUOUS MODE OPERATION

DESCRIPTION

The L4974Aisa stepdownmonolithicpower switching regulator delivering 3.5A at a voltage variable from 5.1 to 40V.

Realized with BCD mixed technology, the device uses a DMOS output transistor to obtain very high efficiencyand very fast switching times. Featuresof

BLOCK DIAGRAM

L4974A

3.5A SWITCHING REGULATOR

MULTIPOWER BCD TECHNOLOGY

POWERDI P (16 + 2 + 2)

ORDERING NUMBER : L4974A

the L4974A include reset and power fail for microprocessors, feed forward line regulation, soft start, limiting current and thermal protection. The device is mountedin a Powerdip16 + 2 + 2 plasticpackage and requires few external components. Efficient operation at switching frequencies up to 200KHz allows reductionin the size and cost of externalfilter component.

June 2000

1/22

L4974A

ABSOLUTE MAXIMUM RATINGS

Symbo l	Parameter	Valu e	Unit
V11	Input Voltage	55	V
V11	Input Operating Voltage	50	V
V20	Output DC Voltage	-1	V
	Output Peak Voltage at t = 0.1μs f = 200khz	-5	V
I20	Maximum Output Current	Internally Limited
VI	Boostrap Voltage	65	V
	Boostrap Operating Voltage	V11 + 15	V
V4, V8	Input Voltage at Pins 4, 12	12	V
V3	Reset Output Voltage	50	V
I3	Reset Output Sink Current	50	mA
V2, V7, V9, V10	Input Voltage at Pin 2, 7, 9, 10	7	V
I2	Reset Delay Sink Current	30	mA
I7	Error Amplifier Output Sink Current	1	A
I8	Soft Start Sink Current	30	mA
Ptot	Total Power Dissipation at TPINS ≤ 90°C	5	W
	at Tamb = 70°C (No copper area on PCB)	1.3	W
TJ, Tstg	Junction and Storage Temperature	-40 to 150	°C

PIN CONNECTION (top view)

THERMAL DATA

Symb ol	Parameter		Valu e	Unit
Rth j-pins	Thermal Resistance Junction-Pins	max	12	°C/W
Rth j-amb	Thermal Resistance Junction-ambient	max	60	°C/W

2/22

		L4974A
PIN FUNCTIONS
No	Name	F unctio n
1	BOOTSTRAP	A Cboot capacitor connected between this terminal and the output allows to drive
		properly the internal D-MOS transistor.
2	RESET DELAY	A Cd capacitor connected between this terminal and ground determines the reset
		signal delay time.
3	RESET OUT	Open Collector Reset/power Fail Signal Output. This output is high when the supply
		and the output voltages are safe.
4	RESET INPUT	Input of Power Fail Circuit. The threshold is 5.1V. It may be connected via a divider
		to the input for power fail function. It mustbe connected to the pin 14 an external 30KΩ
		resistor when power fail signal not required.
5, 6	GROUND	Common Ground Terminal
15, 16
7	FREQUENCY	A series RC network connected between this terminal and ground determines the
	COMPENSATION	regulation loop gain characteristics.
8	SOFT START	Soft Start Time Constant. A capacitor is connected between thi sterminal and ground
		to define the soft start time constant.
9	FEEDBACK INPUT	The Feedback Terminal of the Regulation Loop. The output is connected directly to
		this terminal for 5.1V operation; It is connected via a divider for higher voltages.
10	SYNC INPUT	Multiple L4974A's are synchronized by connecting pin 10 inputs together or via an
		external syncr. pulse.
11	SUPPLY VOLTAGE	Unregulated Input Voltage.
12, 19	N.C.	Not Connected.
13	Vref	5.1V Vref Device Reference Voltage.
14	Vstart	Internal Start-up Circuit to Drive the Power Stage.
17	OSCILLATOR	Rosc. External resistor connected to ground determines the constant charging current
		of Cosc.
18	OSCILLATOR	Cosc. External capacitor connected to ground determines (with Rosc) the switching
		frequency.
20	OUTPUT	Regulator Output.

3/22

L4974A

CIRCUIT OPERATION

The L4974A is a 3.5A monolithic stepdown switching regulatorworking in continuousmode realized in the new BCD Technology. This technology allows theintegrationofisolatedverticalDMOS powertransistors plus mixed CMOS/Bipolar transistors.

The device can deliver3.5A at anoutputvoltageadjustable from 5.1V to 40V and contains diagnostic and control functions that make it particularly suitable for microprocessor based systems.

BLOCK DIAGRAM

The block diagram shows the DMOS power transistors and the PWM control loop. Integrated functions include a reference voltage trimmed to 5.1V

± 2%,soft start, undervoltagelockout, oscillator with feedforward control, pulse by pulse current limit, thermal shutdown and finally the reset and power fail circuit. The reset and power fail circuit provides an output signal for a microprocessor indicating the status of the system.

Device turn on is around 11V with a typical 1V hysterysis, this threshold porvides a correct voltage for the driving stage of the DMOS gate and the hysterysis prevents instabilities.

An externalbootstrapcapacitorchargeto 12V by an internal voltage reference is needed to provide correct gate drive to the power DMOS. The driving circuit is able to source and sink peak currents of around 0.5A to the gate of the DMOS transistor. A typical switching time of the current in the DMOS transistor is 50ns. Due to the fast commutation switching frequencies up to 200kHz are possible.

The PWM control loop consists of a sawtooth oscillator, error amplifier, comparator, latch and the output stage. An error signal is producedby comparing theoutputvoltagewiththeprecise5.1V ± 2% onchip reference. This error signal is then compared with the sawtooth oscillator in order to generate frixed frequency pulse width modulated drive for the output stage. A PWM latch is included to eliminate multiple pulsing within a period even in noisy environments.

The gain and stabilityof the loop can be adjustedby

an external RC network connected to the output of the error amplifier. A voltage feedforward control has been added to the oscillator, this maintains superior line regulation over a wide input voltage range. Closing the loop directly gives an outputvoltage of 5.1V, highervoltages areobtained by inserting a voltage divider.

At turn on, outputovercurrents are preventedby the soft start function (fig. 2). The error amplifier is initially clamped by an externalcapacitor,Css, and allowed to rise linearly under the charge of an internal constant current source.

Output overload protection is provided by a current limit circuit. The load current is sensedby a internal metalresistor connectedto a comparator.When the load current exceeds a preset threshold, the output of the comparator sets a flip flop which turns off the power DMOS. The next clockpulse, froman internal 40kHzoscillator, will reset the flip flopand the power DMOS will again conduct. This current protection method,ensuresa constantcurrent outputwhenthe systemis overloadedor shortcircuited and limitsthe switching frequency, in this condition,to 40kHz. The Reset and Power fail circuit (fig. 4), generates an output signal when the supply voltage exceeds a threshold programmed by an external voltage divider. The reset signal, is generated with a delay time programmedby a externalcapacitor on the delay pin. When the supply voltage falls below the threshold or the output voltage goes below 5V, the resetoutput goes low immediately. The reset output is an open drain.

Fig. 4A shows the case when the supply voltage is higher than the threshold, but the output voltage is not yet 5V.

Fig. 4B shows the case when the output is 5.1V, but the supply voltage is not yet higher than the fixed threshold.

The thermal protection disables circuit operation when the junction temperature reaches about 150°C and has a hysterysis to prevent unstable conditions.

4/22

L4974A

Figure 1 : Feedforward Waveform.

Figure 2 : Soft Start Function.

Figure 3 : Limiting Current Function.

5/22

L4974A

Figure 4 : Reset and Power Fail Functions.

A

B

6/22

										L4974A
ELECTRICAL CHARACTERISTICS (refer to the test circuit, TJ = 25°C, Vi = 35V, R4 = 30KΩ,
C9 = 2.7nF, fSW = 100KHztyp, unless otherwise specified)
DYNAMIC CHARACTERISTICS
Symbo l	Parameter				T est Co nd iti ons	Mi n.	T yp.	Max.	Unit	Fig .
Vi	Input Volt. Range (pin 11)			Vo = Vref to 40V		15		50	V	5
				Io = 3.5A (*)
Vo	Output Voltage			Vi =15V to 50V		5	5.1	5.2	V	5
				Io = 2A; Vo = Vref
Vo	Line Regulation			VI = 15V to 50V			12	30	mV
				Io = 1A; Vo = Vref
Vo	Load Regulation			VO = Vref Io = 1A to 3.5A			8	25	mV
				Io = 2A to 3A			4	10	mV
Vd	Dropout Voltage between			Io = 2A			0.25	0.4	V
	Pin 11 and 20			Io = 3.5A			0.45	0.7
I20L	Max Limiting Current			Vi = 15V to 50V		4	4.75	5.5	A
				Vo = Vref to 40V
η	Efficiency			Io = 3.5A, f = 100KHz
				Vo = Vref		80	85		%
				Vo = 12V			90		%
SVR	Supply Voltage Ripple			Vi = 2VRMS; Io = 5A		56	60		dB	5
	Rejection			f = 100Hz; Vo = Vref
f	Switching Frequency					90	100	110	KHz	5
f/ Vi	Voltage	Stability	of	Vi	= 15V to 45V		2	6	%	5
	Switching
	Frequency
f/Tj	Temperature Stability of			Tj	= 0 to 125°C		1		%	5
	Switching Frequency
fmax	Maximum Operating			Vo = Vref R4 = 15KΩ		200			KHz	5
	Switching Frequency			Io = 3.5A C9 = 2.2nF
(*) Pulse testing with a low duty cycle
Vref SECTION (pin 13)
Symbo l	Parameter				T est Cond iti on	Mi n.	T yp.	Max.	Unit	Fig .
V13	Reference Voltage					5	5.1	5.2	V	7
V13	Line Regulation			Vi = 15V to 50V			10	25	mV	7
V13	Load Regulation			I13	= 0 to 1mA		20	40	mV	7
V13	Average	Temperature		Tj = 0°C to 125°C			0.4		mV/°C	7
T	Coefficient	Reference
	Voltage
I13 short	Short Circuit Current Limit			V13 = 0			70		mA	7
VSTART SECTION (pin 15)
Symbo l	Parameter				T est Cond iti on	Mi n.	T yp.	Max.	Unit	Fig .
V14	Reference Voltage					11.4	12	12.6	V	7
V14	Line Regulation			Vi = 15 to 50V			0.6	1.4	V	7
V14	Load Regulation			I14 = 0 to 1mA			50	200	mV	7
I14 short	Short Circuit Current Limit			V15 = 0V			80		mA	7

7/22